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1 | .. SPDX-License-Identifier: GPL-2.0 |
2 | ||
3 | Kernel driver max16601 | |
4 | ====================== | |
5 | ||
6 | Supported chips: | |
7 | ||
8 | * Maxim MAX16601 | |
9 | ||
10 | Prefix: 'max16601' | |
11 | ||
12 | Addresses scanned: - | |
13 | ||
14 | Datasheet: Not published | |
15 | ||
16 | Author: Guenter Roeck <linux@roeck-us.net> | |
17 | ||
18 | ||
19 | Description | |
20 | ----------- | |
21 | ||
22 | This driver supports the MAX16601 VR13.HC Dual-Output Voltage Regulator | |
23 | Chipset. | |
24 | ||
25 | The driver is a client driver to the core PMBus driver. | |
26 | Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers. | |
27 | ||
28 | ||
29 | Usage Notes | |
30 | ----------- | |
31 | ||
32 | This driver does not auto-detect devices. You will have to instantiate the | |
33 | devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for | |
34 | details. | |
35 | ||
36 | ||
37 | Platform data support | |
38 | --------------------- | |
39 | ||
40 | The driver supports standard PMBus driver platform data. | |
41 | ||
42 | ||
43 | Sysfs entries | |
44 | ------------- | |
45 | ||
46 | The following attributes are supported. | |
47 | ||
48 | ======================= ======================================================= | |
49 | in1_label "vin1" | |
50 | in1_input VCORE input voltage. | |
51 | in1_alarm Input voltage alarm. | |
52 | ||
53 | in2_label "vout1" | |
54 | in2_input VCORE output voltage. | |
55 | in2_alarm Output voltage alarm. | |
56 | ||
57 | curr1_label "iin1" | |
58 | curr1_input VCORE input current, derived from duty cycle and output | |
59 | current. | |
60 | curr1_max Maximum input current. | |
61 | curr1_max_alarm Current high alarm. | |
62 | ||
63 | curr2_label "iin1.0" | |
64 | curr2_input VCORE phase 0 input current. | |
65 | ||
66 | curr3_label "iin1.1" | |
67 | curr3_input VCORE phase 1 input current. | |
68 | ||
69 | curr4_label "iin1.2" | |
70 | curr4_input VCORE phase 2 input current. | |
71 | ||
72 | curr5_label "iin1.3" | |
73 | curr5_input VCORE phase 3 input current. | |
74 | ||
75 | curr6_label "iin1.4" | |
76 | curr6_input VCORE phase 4 input current. | |
77 | ||
78 | curr7_label "iin1.5" | |
79 | curr7_input VCORE phase 5 input current. | |
80 | ||
81 | curr8_label "iin1.6" | |
82 | curr8_input VCORE phase 6 input current. | |
83 | ||
84 | curr9_label "iin1.7" | |
85 | curr9_input VCORE phase 7 input current. | |
86 | ||
87 | curr10_label "iin2" | |
88 | curr10_input VCORE input current, derived from sensor element. | |
89 | ||
90 | curr11_label "iin3" | |
91 | curr11_input VSA input current. | |
92 | ||
93 | curr12_label "iout1" | |
94 | curr12_input VCORE output current. | |
95 | curr12_crit Critical output current. | |
96 | curr12_crit_alarm Output current critical alarm. | |
97 | curr12_max Maximum output current. | |
98 | curr12_max_alarm Output current high alarm. | |
99 | ||
100 | curr13_label "iout1.0" | |
101 | curr13_input VCORE phase 0 output current. | |
102 | ||
103 | curr14_label "iout1.1" | |
104 | curr14_input VCORE phase 1 output current. | |
105 | ||
106 | curr15_label "iout1.2" | |
107 | curr15_input VCORE phase 2 output current. | |
108 | ||
109 | curr16_label "iout1.3" | |
110 | curr16_input VCORE phase 3 output current. | |
111 | ||
112 | curr17_label "iout1.4" | |
113 | curr17_input VCORE phase 4 output current. | |
114 | ||
115 | curr18_label "iout1.5" | |
116 | curr18_input VCORE phase 5 output current. | |
117 | ||
118 | curr19_label "iout1.6" | |
119 | curr19_input VCORE phase 6 output current. | |
120 | ||
121 | curr20_label "iout1.7" | |
122 | curr20_input VCORE phase 7 output current. | |
123 | ||
124 | curr21_label "iout3" | |
125 | curr21_input VSA output current. | |
126 | curr21_highest Historical maximum VSA output current. | |
127 | curr21_reset_history Write any value to reset curr21_highest. | |
128 | curr21_crit Critical output current. | |
129 | curr21_crit_alarm Output current critical alarm. | |
130 | curr21_max Maximum output current. | |
131 | curr21_max_alarm Output current high alarm. | |
132 | ||
133 | power1_label "pin1" | |
134 | power1_input Input power, derived from duty cycle and output current. | |
135 | power1_alarm Input power alarm. | |
136 | ||
137 | power2_label "pin2" | |
138 | power2_input Input power, derived from input current sensor. | |
139 | ||
140 | power3_label "pout" | |
141 | power3_input Output power. | |
142 | ||
143 | temp1_input VCORE temperature. | |
144 | temp1_crit Critical high temperature. | |
145 | temp1_crit_alarm Chip temperature critical high alarm. | |
146 | temp1_max Maximum temperature. | |
147 | temp1_max_alarm Chip temperature high alarm. | |
148 | ||
149 | temp2_input TSENSE_0 temperature | |
150 | temp3_input TSENSE_1 temperature | |
151 | temp4_input TSENSE_2 temperature | |
152 | temp5_input TSENSE_3 temperature | |
153 | ||
154 | temp6_input VSA temperature. | |
155 | temp6_crit Critical high temperature. | |
156 | temp6_crit_alarm Chip temperature critical high alarm. | |
157 | temp6_max Maximum temperature. | |
158 | temp6_max_alarm Chip temperature high alarm. | |
159 | ======================= ======================================================= |