projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| ceeadc5c | 1 | Kernel driver ina209 |
| b32570a4 | 2 | ==================== |
| ceeadc5c GR |
3 | |
| 4 | Supported chips: | |
| b32570a4 | 5 | |
| ceeadc5c | 6 | * Burr-Brown / Texas Instruments INA209 |
| b32570a4 | 7 | |
| ceeadc5c | 8 | Prefix: 'ina209' |
| b32570a4 | 9 | |
| ceeadc5c | 10 | Addresses scanned: - |
| b32570a4 | 11 | |
| ceeadc5c | 12 | Datasheet: |
| 009f429f | 13 | https://www.ti.com/lit/gpn/ina209 |
| ceeadc5c | 14 | |
| b32570a4 MCC |
15 | Author: |
| 16 | - Paul Hays <Paul.Hays@cattail.ca> | |
| 17 | - Ira W. Snyder <iws@ovro.caltech.edu> | |
| 18 | - Guenter Roeck <linux@roeck-us.net> | |
| ceeadc5c GR |
19 | |
| 20 | ||
| 21 | Description | |
| 22 | ----------- | |
| 23 | ||
| 24 | The TI / Burr-Brown INA209 monitors voltage, current, and power on the high side | |
| 25 | of a D.C. power supply. It can perform measurements and calculations in the | |
| 26 | background to supply readings at any time. It includes a programmable | |
| 27 | calibration multiplier to scale the displayed current and power values. | |
| 28 | ||
| 29 | ||
| 30 | Sysfs entries | |
| 31 | ------------- | |
| 32 | ||
| 33 | The INA209 chip is highly configurable both via hardwiring and via | |
| 34 | the I2C bus. See the datasheet for details. | |
| 35 | ||
| 36 | This tries to expose most monitoring features of the hardware via | |
| 37 | sysfs. It does not support every feature of this chip. | |
| 38 | ||
| b32570a4 | 39 | ======================= ======================================================= |
| ceeadc5c GR |
40 | in0_input shunt voltage (mV) |
| 41 | in0_input_highest shunt voltage historical maximum reading (mV) | |
| 42 | in0_input_lowest shunt voltage historical minimum reading (mV) | |
| 43 | in0_reset_history reset shunt voltage history | |
| 44 | in0_max shunt voltage max alarm limit (mV) | |
| 45 | in0_min shunt voltage min alarm limit (mV) | |
| 46 | in0_crit_max shunt voltage crit max alarm limit (mV) | |
| 47 | in0_crit_min shunt voltage crit min alarm limit (mV) | |
| 48 | in0_max_alarm shunt voltage max alarm limit exceeded | |
| 49 | in0_min_alarm shunt voltage min alarm limit exceeded | |
| 50 | in0_crit_max_alarm shunt voltage crit max alarm limit exceeded | |
| 51 | in0_crit_min_alarm shunt voltage crit min alarm limit exceeded | |
| 52 | ||
| 53 | in1_input bus voltage (mV) | |
| 54 | in1_input_highest bus voltage historical maximum reading (mV) | |
| 55 | in1_input_lowest bus voltage historical minimum reading (mV) | |
| 56 | in1_reset_history reset bus voltage history | |
| 57 | in1_max bus voltage max alarm limit (mV) | |
| 58 | in1_min bus voltage min alarm limit (mV) | |
| 59 | in1_crit_max bus voltage crit max alarm limit (mV) | |
| 60 | in1_crit_min bus voltage crit min alarm limit (mV) | |
| 61 | in1_max_alarm bus voltage max alarm limit exceeded | |
| 62 | in1_min_alarm bus voltage min alarm limit exceeded | |
| 63 | in1_crit_max_alarm bus voltage crit max alarm limit exceeded | |
| 64 | in1_crit_min_alarm bus voltage crit min alarm limit exceeded | |
| 65 | ||
| 66 | power1_input power measurement (uW) | |
| 67 | power1_input_highest power historical maximum reading (uW) | |
| 68 | power1_reset_history reset power history | |
| 69 | power1_max power max alarm limit (uW) | |
| 70 | power1_crit power crit alarm limit (uW) | |
| 71 | power1_max_alarm power max alarm limit exceeded | |
| 72 | power1_crit_alarm power crit alarm limit exceeded | |
| 73 | ||
| 74 | curr1_input current measurement (mA) | |
| 75 | ||
| 76 | update_interval data conversion time; affects number of samples used | |
| 77 | to average results for shunt and bus voltages. | |
| b32570a4 | 78 | ======================= ======================================================= |
| ceeadc5c GR |
79 | |
| 80 | General Remarks | |
| 81 | --------------- | |
| 82 | ||
| 83 | The power and current registers in this chip require that the calibration | |
| 84 | register is programmed correctly before they are used. Normally this is expected | |
| 85 | to be done in the BIOS. In the absence of BIOS programming, the shunt resistor | |
| 86 | voltage can be provided using platform data. The driver uses platform data from | |
| 87 | the ina2xx driver for this purpose. If calibration register data is not provided | |
| 88 | via platform data, the driver checks if the calibration register has been | |
| 89 | programmed (ie has a value not equal to zero). If so, this value is retained. | |
| 90 | Otherwise, a default value reflecting a shunt resistor value of 10 mOhm is | |
| 91 | programmed into the calibration register. | |
| 92 | ||
| 93 | ||
| 94 | Output Pins | |
| 95 | ----------- | |
| 96 | ||
| 97 | Output pin programming is a board feature which depends on the BIOS. It is | |
| 98 | outside the scope of a hardware monitoring driver to enable or disable output | |
| 99 | pins. |