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bcf1d9fa JC |
1 | ===================== |
2 | MSM Crash Dump Format | |
3 | ===================== | |
4 | ||
5 | Following a GPU hang the MSM driver outputs debugging information via | |
6 | /sys/kernel/dri/X/show or via devcoredump (/sys/class/devcoredump/dcdX/data). | |
7 | This document describes how the output is formatted. | |
8 | ||
9 | Each entry is in the form key: value. Sections headers will not have a value | |
10 | and all the contents of a section will be indented two spaces from the header. | |
11 | Each section might have multiple array entries the start of which is designated | |
12 | by a (-). | |
13 | ||
14 | Mappings | |
15 | -------- | |
16 | ||
17 | kernel | |
18 | The kernel version that generated the dump (UTS_RELEASE). | |
19 | ||
20 | module | |
21 | The module that generated the crashdump. | |
22 | ||
23 | time | |
24 | The kernel time at crash formated as seconds.microseconds. | |
25 | ||
26 | comm | |
27 | Comm string for the binary that generated the fault. | |
28 | ||
29 | cmdline | |
30 | Command line for the binary that generated the fault. | |
31 | ||
32 | revision | |
33 | ID of the GPU that generated the crash formatted as | |
34 | core.major.minor.patchlevel separated by dots. | |
35 | ||
36 | rbbm-status | |
37 | The current value of RBBM_STATUS which shows what top level GPU | |
38 | components are in use at the time of crash. | |
39 | ||
40 | ringbuffer | |
41 | Section containing the contents of each ringbuffer. Each ringbuffer is | |
42 | identified with an id number. | |
43 | ||
44 | id | |
45 | Ringbuffer ID (0 based index). Each ringbuffer in the section | |
46 | will have its own unique id. | |
47 | iova | |
48 | GPU address of the ringbuffer. | |
49 | ||
50 | last-fence | |
51 | The last fence that was issued on the ringbuffer | |
52 | ||
53 | retired-fence | |
54 | The last fence retired on the ringbuffer. | |
55 | ||
56 | rptr | |
57 | The current read pointer (rptr) for the ringbuffer. | |
58 | ||
59 | wptr | |
60 | The current write pointer (wptr) for the ringbuffer. | |
61 | ||
43a56687 JC |
62 | size |
63 | Maximum size of the ringbuffer programmed in the hardware. | |
64 | ||
65 | data | |
66 | The contents of the ring encoded as ascii85. Only the used | |
67 | portions of the ring will be printed. | |
68 | ||
cdb95931 JC |
69 | bo |
70 | List of buffers from the hanging submission if available. | |
71 | Each buffer object will have a uinque iova. | |
72 | ||
73 | iova | |
74 | GPU address of the buffer object. | |
75 | ||
76 | size | |
77 | Allocated size of the buffer object. | |
78 | ||
79 | data | |
80 | The contents of the buffer object encoded with ascii85. Only | |
81 | Trailing zeros at the end of the buffer will be skipped. | |
82 | ||
bcf1d9fa JC |
83 | registers |
84 | Set of registers values. Each entry is on its own line enclosed | |
85 | by brackets { }. | |
86 | ||
87 | offset | |
88 | Byte offset of the register from the start of the | |
89 | GPU memory region. | |
90 | ||
91 | value | |
92 | Hexadecimal value of the register. | |
50f8d218 JC |
93 | |
94 | registers-hlsq | |
95 | (5xx only) Register values from the HLSQ aperture. | |
96 | Same format as the register section. |