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4c20386c DB |
1 | GPIO Interfaces |
2 | ||
3 | This provides an overview of GPIO access conventions on Linux. | |
4 | ||
5 | ||
6 | What is a GPIO? | |
7 | =============== | |
8 | A "General Purpose Input/Output" (GPIO) is a flexible software-controlled | |
9 | digital signal. They are provided from many kinds of chip, and are familiar | |
10 | to Linux developers working with embedded and custom hardware. Each GPIO | |
11 | represents a bit connected to a particular pin, or "ball" on Ball Grid Array | |
12 | (BGA) packages. Board schematics show which external hardware connects to | |
13 | which GPIOs. Drivers can be written generically, so that board setup code | |
14 | passes such pin configuration data to drivers. | |
15 | ||
16 | System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every | |
17 | non-dedicated pin can be configured as a GPIO; and most chips have at least | |
18 | several dozen of them. Programmable logic devices (like FPGAs) can easily | |
19 | provide GPIOs; multifunction chips like power managers, and audio codecs | |
20 | often have a few such pins to help with pin scarcity on SOCs; and there are | |
21 | also "GPIO Expander" chips that connect using the I2C or SPI serial busses. | |
22 | Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS | |
23 | firmware knowing how they're used). | |
24 | ||
25 | The exact capabilities of GPIOs vary between systems. Common options: | |
26 | ||
27 | - Output values are writable (high=1, low=0). Some chips also have | |
28 | options about how that value is driven, so that for example only one | |
29 | value might be driven ... supporting "wire-OR" and similar schemes | |
1668be71 | 30 | for the other value (notably, "open drain" signaling). |
4c20386c DB |
31 | |
32 | - Input values are likewise readable (1, 0). Some chips support readback | |
33 | of pins configured as "output", which is very useful in such "wire-OR" | |
34 | cases (to support bidirectional signaling). GPIO controllers may have | |
7c2db759 | 35 | input de-glitch/debounce logic, sometimes with software controls. |
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36 | |
37 | - Inputs can often be used as IRQ signals, often edge triggered but | |
38 | sometimes level triggered. Such IRQs may be configurable as system | |
39 | wakeup events, to wake the system from a low power state. | |
40 | ||
41 | - Usually a GPIO will be configurable as either input or output, as needed | |
42 | by different product boards; single direction ones exist too. | |
43 | ||
44 | - Most GPIOs can be accessed while holding spinlocks, but those accessed | |
45 | through a serial bus normally can't. Some systems support both types. | |
46 | ||
47 | On a given board each GPIO is used for one specific purpose like monitoring | |
48 | MMC/SD card insertion/removal, detecting card writeprotect status, driving | |
49 | a LED, configuring a transceiver, bitbanging a serial bus, poking a hardware | |
50 | watchdog, sensing a switch, and so on. | |
51 | ||
52 | ||
53 | GPIO conventions | |
54 | ================ | |
55 | Note that this is called a "convention" because you don't need to do it this | |
56 | way, and it's no crime if you don't. There **are** cases where portability | |
57 | is not the main issue; GPIOs are often used for the kind of board-specific | |
58 | glue logic that may even change between board revisions, and can't ever be | |
59 | used on a board that's wired differently. Only least-common-denominator | |
60 | functionality can be very portable. Other features are platform-specific, | |
61 | and that can be critical for glue logic. | |
62 | ||
7c2db759 | 63 | Plus, this doesn't require any implementation framework, just an interface. |
4c20386c DB |
64 | One platform might implement it as simple inline functions accessing chip |
65 | registers; another might implement it by delegating through abstractions | |
7c2db759 DB |
66 | used for several very different kinds of GPIO controller. (There is some |
67 | optional code supporting such an implementation strategy, described later | |
68 | in this document, but drivers acting as clients to the GPIO interface must | |
69 | not care how it's implemented.) | |
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70 | |
71 | That said, if the convention is supported on their platform, drivers should | |
32993b79 DB |
72 | use it when possible. Platforms should declare GENERIC_GPIO support in |
73 | Kconfig (boolean true), which multi-platform drivers can depend on when | |
74 | using the include file: | |
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75 | |
76 | #include <asm/gpio.h> | |
77 | ||
78 | If you stick to this convention then it'll be easier for other developers to | |
79 | see what your code is doing, and help maintain it. | |
80 | ||
a0a99835 DB |
81 | Note that these operations include I/O barriers on platforms which need to |
82 | use them; drivers don't need to add them explicitly. | |
83 | ||
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84 | |
85 | Identifying GPIOs | |
86 | ----------------- | |
87 | GPIOs are identified by unsigned integers in the range 0..MAX_INT. That | |
88 | reserves "negative" numbers for other purposes like marking signals as | |
f5de6111 DB |
89 | "not available on this board", or indicating faults. Code that doesn't |
90 | touch the underlying hardware treats these integers as opaque cookies. | |
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91 | |
92 | Platforms define how they use those integers, and usually #define symbols | |
93 | for the GPIO lines so that board-specific setup code directly corresponds | |
94 | to the relevant schematics. In contrast, drivers should only use GPIO | |
95 | numbers passed to them from that setup code, using platform_data to hold | |
96 | board-specific pin configuration data (along with other board specific | |
97 | data they need). That avoids portability problems. | |
98 | ||
99 | So for example one platform uses numbers 32-159 for GPIOs; while another | |
100 | uses numbers 0..63 with one set of GPIO controllers, 64-79 with another | |
101 | type of GPIO controller, and on one particular board 80-95 with an FPGA. | |
102 | The numbers need not be contiguous; either of those platforms could also | |
103 | use numbers 2000-2063 to identify GPIOs in a bank of I2C GPIO expanders. | |
104 | ||
105 | Whether a platform supports multiple GPIO controllers is currently a | |
106 | platform-specific implementation issue. | |
107 | ||
108 | ||
109 | Using GPIOs | |
110 | ----------- | |
111 | One of the first things to do with a GPIO, often in board setup code when | |
112 | setting up a platform_device using the GPIO, is mark its direction: | |
113 | ||
114 | /* set as input or output, returning 0 or negative errno */ | |
115 | int gpio_direction_input(unsigned gpio); | |
28735a72 | 116 | int gpio_direction_output(unsigned gpio, int value); |
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117 | |
118 | The return value is zero for success, else a negative errno. It should | |
119 | be checked, since the get/set calls don't have error returns and since | |
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120 | misconfiguration is possible. You should normally issue these calls from |
121 | a task context. However, for spinlock-safe GPIOs it's OK to use them | |
122 | before tasking is enabled, as part of early board setup. | |
4c20386c | 123 | |
28735a72 DB |
124 | For output GPIOs, the value provided becomes the initial output value. |
125 | This helps avoid signal glitching during system startup. | |
126 | ||
7c2db759 DB |
127 | For compatibility with legacy interfaces to GPIOs, setting the direction |
128 | of a GPIO implicitly requests that GPIO (see below) if it has not been | |
129 | requested already. That compatibility may be removed in the future; | |
130 | explicitly requesting GPIOs is strongly preferred. | |
131 | ||
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132 | Setting the direction can fail if the GPIO number is invalid, or when |
133 | that particular GPIO can't be used in that mode. It's generally a bad | |
134 | idea to rely on boot firmware to have set the direction correctly, since | |
135 | it probably wasn't validated to do more than boot Linux. (Similarly, | |
136 | that board setup code probably needs to multiplex that pin as a GPIO, | |
137 | and configure pullups/pulldowns appropriately.) | |
138 | ||
139 | ||
140 | Spinlock-Safe GPIO access | |
141 | ------------------------- | |
142 | Most GPIO controllers can be accessed with memory read/write instructions. | |
143 | That doesn't need to sleep, and can safely be done from inside IRQ handlers. | |
7c2db759 | 144 | (That includes hardirq contexts on RT kernels.) |
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145 | |
146 | Use these calls to access such GPIOs: | |
147 | ||
148 | /* GPIO INPUT: return zero or nonzero */ | |
149 | int gpio_get_value(unsigned gpio); | |
150 | ||
151 | /* GPIO OUTPUT */ | |
152 | void gpio_set_value(unsigned gpio, int value); | |
153 | ||
154 | The values are boolean, zero for low, nonzero for high. When reading the | |
155 | value of an output pin, the value returned should be what's seen on the | |
156 | pin ... that won't always match the specified output value, because of | |
7c2db759 | 157 | issues including open-drain signaling and output latencies. |
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158 | |
159 | The get/set calls have no error returns because "invalid GPIO" should have | |
be1ff386 | 160 | been reported earlier from gpio_direction_*(). However, note that not all |
4c20386c | 161 | platforms can read the value of output pins; those that can't should always |
f5de6111 DB |
162 | return zero. Also, using these calls for GPIOs that can't safely be accessed |
163 | without sleeping (see below) is an error. | |
4c20386c | 164 | |
f5de6111 | 165 | Platform-specific implementations are encouraged to optimize the two |
4c20386c DB |
166 | calls to access the GPIO value in cases where the GPIO number (and for |
167 | output, value) are constant. It's normal for them to need only a couple | |
168 | of instructions in such cases (reading or writing a hardware register), | |
169 | and not to need spinlocks. Such optimized calls can make bitbanging | |
170 | applications a lot more efficient (in both space and time) than spending | |
171 | dozens of instructions on subroutine calls. | |
172 | ||
173 | ||
174 | GPIO access that may sleep | |
175 | -------------------------- | |
176 | Some GPIO controllers must be accessed using message based busses like I2C | |
177 | or SPI. Commands to read or write those GPIO values require waiting to | |
178 | get to the head of a queue to transmit a command and get its response. | |
179 | This requires sleeping, which can't be done from inside IRQ handlers. | |
180 | ||
181 | Platforms that support this type of GPIO distinguish them from other GPIOs | |
7c2db759 DB |
182 | by returning nonzero from this call (which requires a valid GPIO number, |
183 | either explicitly or implicitly requested): | |
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184 | |
185 | int gpio_cansleep(unsigned gpio); | |
186 | ||
187 | To access such GPIOs, a different set of accessors is defined: | |
188 | ||
189 | /* GPIO INPUT: return zero or nonzero, might sleep */ | |
190 | int gpio_get_value_cansleep(unsigned gpio); | |
191 | ||
192 | /* GPIO OUTPUT, might sleep */ | |
193 | void gpio_set_value_cansleep(unsigned gpio, int value); | |
194 | ||
195 | Other than the fact that these calls might sleep, and will not be ignored | |
196 | for GPIOs that can't be accessed from IRQ handlers, these calls act the | |
197 | same as the spinlock-safe calls. | |
198 | ||
199 | ||
200 | Claiming and Releasing GPIOs (OPTIONAL) | |
201 | --------------------------------------- | |
202 | To help catch system configuration errors, two calls are defined. | |
203 | However, many platforms don't currently support this mechanism. | |
204 | ||
205 | /* request GPIO, returning 0 or negative errno. | |
206 | * non-null labels may be useful for diagnostics. | |
207 | */ | |
208 | int gpio_request(unsigned gpio, const char *label); | |
209 | ||
210 | /* release previously-claimed GPIO */ | |
211 | void gpio_free(unsigned gpio); | |
212 | ||
213 | Passing invalid GPIO numbers to gpio_request() will fail, as will requesting | |
214 | GPIOs that have already been claimed with that call. The return value of | |
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215 | gpio_request() must be checked. You should normally issue these calls from |
216 | a task context. However, for spinlock-safe GPIOs it's OK to request GPIOs | |
217 | before tasking is enabled, as part of early board setup. | |
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218 | |
219 | These calls serve two basic purposes. One is marking the signals which | |
220 | are actually in use as GPIOs, for better diagnostics; systems may have | |
221 | several hundred potential GPIOs, but often only a dozen are used on any | |
7c2db759 DB |
222 | given board. Another is to catch conflicts, identifying errors when |
223 | (a) two or more drivers wrongly think they have exclusive use of that | |
224 | signal, or (b) something wrongly believes it's safe to remove drivers | |
225 | needed to manage a signal that's in active use. That is, requesting a | |
226 | GPIO can serve as a kind of lock. | |
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227 | |
228 | These two calls are optional because not not all current Linux platforms | |
229 | offer such functionality in their GPIO support; a valid implementation | |
230 | could return success for all gpio_request() calls. Unlike the other calls, | |
231 | the state they represent doesn't normally match anything from a hardware | |
232 | register; it's just a software bitmap which clearly is not necessary for | |
233 | correct operation of hardware or (bug free) drivers. | |
234 | ||
235 | Note that requesting a GPIO does NOT cause it to be configured in any | |
236 | way; it just marks that GPIO as in use. Separate code must handle any | |
237 | pin setup (e.g. controlling which pin the GPIO uses, pullup/pulldown). | |
238 | ||
7c2db759 DB |
239 | Also note that it's your responsibility to have stopped using a GPIO |
240 | before you free it. | |
241 | ||
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242 | |
243 | GPIOs mapped to IRQs | |
244 | -------------------- | |
245 | GPIO numbers are unsigned integers; so are IRQ numbers. These make up | |
246 | two logically distinct namespaces (GPIO 0 need not use IRQ 0). You can | |
247 | map between them using calls like: | |
248 | ||
249 | /* map GPIO numbers to IRQ numbers */ | |
250 | int gpio_to_irq(unsigned gpio); | |
251 | ||
252 | /* map IRQ numbers to GPIO numbers */ | |
253 | int irq_to_gpio(unsigned irq); | |
254 | ||
255 | Those return either the corresponding number in the other namespace, or | |
256 | else a negative errno code if the mapping can't be done. (For example, | |
7c2db759 | 257 | some GPIOs can't be used as IRQs.) It is an unchecked error to use a GPIO |
be1ff386 | 258 | number that wasn't set up as an input using gpio_direction_input(), or |
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259 | to use an IRQ number that didn't originally come from gpio_to_irq(). |
260 | ||
261 | These two mapping calls are expected to cost on the order of a single | |
262 | addition or subtraction. They're not allowed to sleep. | |
263 | ||
264 | Non-error values returned from gpio_to_irq() can be passed to request_irq() | |
265 | or free_irq(). They will often be stored into IRQ resources for platform | |
266 | devices, by the board-specific initialization code. Note that IRQ trigger | |
267 | options are part of the IRQ interface, e.g. IRQF_TRIGGER_FALLING, as are | |
268 | system wakeup capabilities. | |
269 | ||
270 | Non-error values returned from irq_to_gpio() would most commonly be used | |
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271 | with gpio_get_value(), for example to initialize or update driver state |
272 | when the IRQ is edge-triggered. | |
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273 | |
274 | ||
1668be71 DB |
275 | Emulating Open Drain Signals |
276 | ---------------------------- | |
277 | Sometimes shared signals need to use "open drain" signaling, where only the | |
278 | low signal level is actually driven. (That term applies to CMOS transistors; | |
279 | "open collector" is used for TTL.) A pullup resistor causes the high signal | |
280 | level. This is sometimes called a "wire-AND"; or more practically, from the | |
281 | negative logic (low=true) perspective this is a "wire-OR". | |
282 | ||
283 | One common example of an open drain signal is a shared active-low IRQ line. | |
284 | Also, bidirectional data bus signals sometimes use open drain signals. | |
285 | ||
286 | Some GPIO controllers directly support open drain outputs; many don't. When | |
287 | you need open drain signaling but your hardware doesn't directly support it, | |
288 | there's a common idiom you can use to emulate it with any GPIO pin that can | |
289 | be used as either an input or an output: | |
290 | ||
291 | LOW: gpio_direction_output(gpio, 0) ... this drives the signal | |
292 | and overrides the pullup. | |
293 | ||
294 | HIGH: gpio_direction_input(gpio) ... this turns off the output, | |
295 | so the pullup (or some other device) controls the signal. | |
296 | ||
297 | If you are "driving" the signal high but gpio_get_value(gpio) reports a low | |
298 | value (after the appropriate rise time passes), you know some other component | |
299 | is driving the shared signal low. That's not necessarily an error. As one | |
300 | common example, that's how I2C clocks are stretched: a slave that needs a | |
301 | slower clock delays the rising edge of SCK, and the I2C master adjusts its | |
302 | signaling rate accordingly. | |
303 | ||
4c20386c DB |
304 | |
305 | What do these conventions omit? | |
306 | =============================== | |
307 | One of the biggest things these conventions omit is pin multiplexing, since | |
308 | this is highly chip-specific and nonportable. One platform might not need | |
309 | explicit multiplexing; another might have just two options for use of any | |
310 | given pin; another might have eight options per pin; another might be able | |
311 | to route a given GPIO to any one of several pins. (Yes, those examples all | |
312 | come from systems that run Linux today.) | |
313 | ||
314 | Related to multiplexing is configuration and enabling of the pullups or | |
315 | pulldowns integrated on some platforms. Not all platforms support them, | |
316 | or support them in the same way; and any given board might use external | |
317 | pullups (or pulldowns) so that the on-chip ones should not be used. | |
7c2db759 | 318 | (When a circuit needs 5 kOhm, on-chip 100 kOhm resistors won't do.) |
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319 | |
320 | There are other system-specific mechanisms that are not specified here, | |
321 | like the aforementioned options for input de-glitching and wire-OR output. | |
322 | Hardware may support reading or writing GPIOs in gangs, but that's usually | |
f5de6111 | 323 | configuration dependent: for GPIOs sharing the same bank. (GPIOs are |
4c20386c | 324 | commonly grouped in banks of 16 or 32, with a given SOC having several such |
7c2db759 DB |
325 | banks.) Some systems can trigger IRQs from output GPIOs, or read values |
326 | from pins not managed as GPIOs. Code relying on such mechanisms will | |
327 | necessarily be nonportable. | |
4c20386c | 328 | |
7c2db759 | 329 | Dynamic definition of GPIOs is not currently standard; for example, as |
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330 | a side effect of configuring an add-on board with some GPIO expanders. |
331 | ||
332 | These calls are purely for kernel space, but a userspace API could be built | |
7c2db759 DB |
333 | on top of them. |
334 | ||
335 | ||
336 | GPIO implementor's framework (OPTIONAL) | |
337 | ======================================= | |
338 | As noted earlier, there is an optional implementation framework making it | |
339 | easier for platforms to support different kinds of GPIO controller using | |
340 | the same programming interface. | |
341 | ||
342 | As a debugging aid, if debugfs is available a /sys/kernel/debug/gpio file | |
343 | will be found there. That will list all the controllers registered through | |
344 | this framework, and the state of the GPIOs currently in use. | |
345 | ||
346 | ||
347 | Controller Drivers: gpio_chip | |
348 | ----------------------------- | |
349 | In this framework each GPIO controller is packaged as a "struct gpio_chip" | |
350 | with information common to each controller of that type: | |
351 | ||
352 | - methods to establish GPIO direction | |
353 | - methods used to access GPIO values | |
354 | - flag saying whether calls to its methods may sleep | |
355 | - optional debugfs dump method (showing extra state like pullup config) | |
356 | - label for diagnostics | |
357 | ||
358 | There is also per-instance data, which may come from device.platform_data: | |
359 | the number of its first GPIO, and how many GPIOs it exposes. | |
360 | ||
361 | The code implementing a gpio_chip should support multiple instances of the | |
362 | controller, possibly using the driver model. That code will configure each | |
363 | gpio_chip and issue gpiochip_add(). Removing a GPIO controller should be | |
364 | rare; use gpiochip_remove() when it is unavoidable. | |
365 | ||
366 | Most often a gpio_chip is part of an instance-specific structure with state | |
367 | not exposed by the GPIO interfaces, such as addressing, power management, | |
368 | and more. Chips such as codecs will have complex non-GPIO state, | |
369 | ||
370 | Any debugfs dump method should normally ignore signals which haven't been | |
371 | requested as GPIOs. They can use gpiochip_is_requested(), which returns | |
372 | either NULL or the label associated with that GPIO when it was requested. | |
373 | ||
374 | ||
375 | Platform Support | |
376 | ---------------- | |
377 | To support this framework, a platform's Kconfig will "select HAVE_GPIO_LIB" | |
378 | and arrange that its <asm/gpio.h> includes <asm-generic/gpio.h> and defines | |
379 | three functions: gpio_get_value(), gpio_set_value(), and gpio_cansleep(). | |
380 | They may also want to provide a custom value for ARCH_NR_GPIOS. | |
381 | ||
382 | Trivial implementations of those functions can directly use framework | |
383 | code, which always dispatches through the gpio_chip: | |
384 | ||
385 | #define gpio_get_value __gpio_get_value | |
386 | #define gpio_set_value __gpio_set_value | |
387 | #define gpio_cansleep __gpio_cansleep | |
388 | ||
389 | Fancier implementations could instead define those as inline functions with | |
390 | logic optimizing access to specific SOC-based GPIOs. For example, if the | |
391 | referenced GPIO is the constant "12", getting or setting its value could | |
392 | cost as little as two or three instructions, never sleeping. When such an | |
393 | optimization is not possible those calls must delegate to the framework | |
394 | code, costing at least a few dozen instructions. For bitbanged I/O, such | |
395 | instruction savings can be significant. | |
396 | ||
397 | For SOCs, platform-specific code defines and registers gpio_chip instances | |
398 | for each bank of on-chip GPIOs. Those GPIOs should be numbered/labeled to | |
399 | match chip vendor documentation, and directly match board schematics. They | |
400 | may well start at zero and go up to a platform-specific limit. Such GPIOs | |
401 | are normally integrated into platform initialization to make them always be | |
402 | available, from arch_initcall() or earlier; they can often serve as IRQs. | |
403 | ||
404 | ||
405 | Board Support | |
406 | ------------- | |
407 | For external GPIO controllers -- such as I2C or SPI expanders, ASICs, multi | |
408 | function devices, FPGAs or CPLDs -- most often board-specific code handles | |
409 | registering controller devices and ensures that their drivers know what GPIO | |
410 | numbers to use with gpiochip_add(). Their numbers often start right after | |
411 | platform-specific GPIOs. | |
412 | ||
413 | For example, board setup code could create structures identifying the range | |
414 | of GPIOs that chip will expose, and passes them to each GPIO expander chip | |
415 | using platform_data. Then the chip driver's probe() routine could pass that | |
416 | data to gpiochip_add(). | |
417 | ||
418 | Initialization order can be important. For example, when a device relies on | |
419 | an I2C-based GPIO, its probe() routine should only be called after that GPIO | |
420 | becomes available. That may mean the device should not be registered until | |
421 | calls for that GPIO can work. One way to address such dependencies is for | |
422 | such gpio_chip controllers to provide setup() and teardown() callbacks to | |
423 | board specific code; those board specific callbacks would register devices | |
424 | once all the necessary resources are available. |