Commit | Line | Data |
---|---|---|
a17efbc5 GP |
1 | * Freescale Low Power SPI (LPSPI) for i.MX |
2 | ||
3 | Required properties: | |
4 | - compatible : | |
5 | - "fsl,imx7ulp-spi" for LPSPI compatible with the one integrated on i.MX7ULP soc | |
0c903aaf | 6 | - "fsl,imx8qxp-spi" for LPSPI compatible with the one integrated on i.MX8QXP soc |
a17efbc5 | 7 | - reg : address and length of the lpspi master registers |
a17efbc5 GP |
8 | - interrupts : lpspi interrupt |
9 | - clocks : lpspi clock specifier | |
10 | ||
11 | Examples: | |
12 | ||
13 | lpspi2: lpspi@40290000 { | |
14 | compatible = "fsl,imx7ulp-spi"; | |
15 | reg = <0x40290000 0x10000>; | |
16 | interrupt-parent = <&intc>; | |
17 | interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; | |
18 | clocks = <&clks IMX7ULP_CLK_LPSPI2>; | |
19 | }; |