Commit | Line | Data |
---|---|---|
51e5084e SS |
1 | * Rockchip SPDIF transceiver |
2 | ||
3 | The S/PDIF audio block is a stereo transceiver that allows the | |
4 | processor to receive and transmit digital audio via an coaxial cable or | |
5 | a fibre cable. | |
6 | ||
7 | Required properties: | |
8 | ||
9 | - compatible: should be one of the following: | |
ab877394 SZ |
10 | - "rockchip,rk3066-spdif" |
11 | - "rockchip,rk3188-spdif" | |
55f42d2e | 12 | - "rockchip,rk3228-spdif" |
ab877394 | 13 | - "rockchip,rk3288-spdif" |
55f42d2e | 14 | - "rockchip,rk3328-spdif" |
ab877394 SZ |
15 | - "rockchip,rk3366-spdif" |
16 | - "rockchip,rk3368-spdif" | |
17 | - "rockchip,rk3399-spdif" | |
51e5084e SS |
18 | - reg: physical base address of the controller and length of memory mapped |
19 | region. | |
20 | - interrupts: should contain the SPDIF interrupt. | |
51e5084e SS |
21 | - dmas: DMA specifiers for tx dma. See the DMA client binding, |
22 | Documentation/devicetree/bindings/dma/dma.txt | |
23 | - dma-names: should be "tx" | |
24 | - clocks: a list of phandle + clock-specifier pairs, one for each entry | |
25 | in clock-names. | |
26 | - clock-names: should contain following: | |
27 | - "hclk": clock for SPDIF controller | |
28 | - "mclk" : clock for SPDIF bus | |
29 | ||
30 | Required properties on RK3288: | |
31 | - rockchip,grf: the phandle of the syscon node for the general register | |
32 | file (GRF) | |
33 | ||
34 | Example for the rk3188 SPDIF controller: | |
35 | ||
4c9847b7 | 36 | spdif: spdif@1011e000 { |
51e5084e SS |
37 | compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif"; |
38 | reg = <0x1011e000 0x2000>; | |
39 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; | |
51e5084e SS |
40 | dmas = <&dmac1_s 8>; |
41 | dma-names = "tx"; | |
42 | clock-names = "hclk", "mclk"; | |
43 | clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>; | |
51e5084e SS |
44 | #sound-dai-cells = <0>; |
45 | }; |