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4b381d7e R |
1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
2 | %YAML 1.2 | |
3 | --- | |
4 | $id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml# | |
5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
6 | ||
7 | title: Qualcomm Technologies Inc. LPASS CPU dai driver bindings | |
8 | ||
9 | maintainers: | |
10 | - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | |
11 | - Rohit kumar <rohitkr@codeaurora.org> | |
12 | ||
13 | description: | | |
14 | Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist | |
15 | of MI2S interface for audio data transfer on external codecs. LPASS cpu driver | |
16 | is a module to configure Low-Power Audio Interface(LPAIF) core registers | |
17 | across different IP versions. | |
18 | ||
19 | properties: | |
20 | compatible: | |
21 | enum: | |
22 | - qcom,lpass-cpu | |
23 | - qcom,apq8016-lpass-cpu | |
24 | - qcom,sc7180-lpass-cpu | |
f3fc4fbf | 25 | - qcom,sc7280-lpass-cpu |
4b381d7e R |
26 | |
27 | reg: | |
94c65dff | 28 | minItems: 1 |
f3fc4fbf | 29 | maxItems: 6 |
4b381d7e | 30 | description: LPAIF core registers |
6ad8838d | 31 | |
8e3fdc52 | 32 | reg-names: |
94c65dff | 33 | minItems: 1 |
f3fc4fbf | 34 | maxItems: 6 |
6ad8838d | 35 | |
4b381d7e R |
36 | clocks: |
37 | minItems: 3 | |
f3fc4fbf | 38 | maxItems: 7 |
4b381d7e R |
39 | |
40 | clock-names: | |
98b7630a SRM |
41 | minItems: 1 |
42 | maxItems: 10 | |
4b381d7e R |
43 | |
44 | interrupts: | |
94c65dff | 45 | minItems: 1 |
f3fc4fbf | 46 | maxItems: 4 |
4b381d7e | 47 | description: LPAIF DMA buffer interrupt |
6ad8838d | 48 | |
8e3fdc52 | 49 | interrupt-names: |
94c65dff | 50 | minItems: 1 |
f3fc4fbf | 51 | maxItems: 4 |
6ad8838d | 52 | |
4b381d7e R |
53 | qcom,adsp: |
54 | $ref: /schemas/types.yaml#/definitions/phandle | |
55 | description: Phandle for the audio DSP node | |
56 | ||
57 | iommus: | |
f3fc4fbf SRM |
58 | minItems: 2 |
59 | maxItems: 3 | |
4b381d7e R |
60 | description: Phandle to apps_smmu node with sid mask |
61 | ||
62 | power-domains: | |
63 | maxItems: 1 | |
64 | ||
98b7630a SRM |
65 | power-domain-names: |
66 | maxItems: 1 | |
67 | ||
4b381d7e R |
68 | '#sound-dai-cells': |
69 | const: 1 | |
70 | ||
71 | '#address-cells': | |
72 | const: 1 | |
73 | ||
74 | '#size-cells': | |
75 | const: 0 | |
76 | ||
77 | patternProperties: | |
8e3fdc52 | 78 | "^dai-link@[0-9a-f]$": |
4b381d7e | 79 | type: object |
8e3fdc52 | 80 | description: | |
f3fc4fbf | 81 | LPASS CPU dai node for each I2S device or Soundwire device. Bindings of each node |
8e3fdc52 SKR |
82 | depends on the specific driver providing the functionality and |
83 | properties. | |
4b381d7e R |
84 | properties: |
85 | reg: | |
86 | maxItems: 1 | |
87 | description: Must be one of the DAI ID | |
88 | ||
89 | qcom,playback-sd-lines: | |
90 | $ref: /schemas/types.yaml#/definitions/uint32-array | |
91 | description: list of MI2S data lines for playback | |
92 | ||
93 | qcom,capture-sd-lines: | |
94 | $ref: /schemas/types.yaml#/definitions/uint32-array | |
95 | description: list of MI2S data lines for capture | |
96 | ||
97 | required: | |
98 | - reg | |
99 | ||
100 | additionalProperties: false | |
101 | ||
102 | required: | |
103 | - compatible | |
104 | - reg | |
8e3fdc52 | 105 | - reg-names |
4b381d7e R |
106 | - clocks |
107 | - clock-names | |
108 | - interrupts | |
8e3fdc52 | 109 | - interrupt-names |
4b381d7e R |
110 | - '#sound-dai-cells' |
111 | ||
112 | additionalProperties: false | |
113 | ||
114 | allOf: | |
115 | - if: | |
116 | properties: | |
117 | compatible: | |
118 | contains: | |
119 | const: qcom,lpass-cpu | |
120 | ||
121 | then: | |
122 | properties: | |
123 | clock-names: | |
124 | items: | |
125 | - const: ahbix-clk | |
126 | - const: mi2s-osr-clk | |
127 | - const: mi2s-bit-clk | |
128 | ||
129 | - if: | |
130 | properties: | |
131 | compatible: | |
132 | contains: | |
133 | const: qcom,apq8016-lpass-cpu | |
134 | ||
135 | then: | |
136 | properties: | |
137 | clock-names: | |
138 | items: | |
139 | - const: ahbix-clk | |
140 | - const: mi2s-bit-clk0 | |
141 | - const: mi2s-bit-clk1 | |
142 | - const: mi2s-bit-clk2 | |
143 | - const: mi2s-bit-clk3 | |
144 | - const: pcnoc-mport-clk | |
145 | - const: pcnoc-sway-clk | |
146 | ||
147 | - if: | |
148 | properties: | |
149 | compatible: | |
150 | contains: | |
151 | const: qcom,sc7180-lpass-cpu | |
152 | ||
153 | then: | |
154 | properties: | |
155 | clock-names: | |
8e3fdc52 | 156 | oneOf: |
6ad8838d RH |
157 | - items: #for I2S |
158 | - const: pcnoc-sway-clk | |
159 | - const: audio-core | |
160 | - const: mclk0 | |
161 | - const: pcnoc-mport-clk | |
162 | - const: mi2s-bit-clk0 | |
163 | - const: mi2s-bit-clk1 | |
164 | - items: #for HDMI | |
165 | - const: pcnoc-sway-clk | |
166 | - const: audio-core | |
167 | - const: pcnoc-mport-clk | |
8e3fdc52 SKR |
168 | reg-names: |
169 | anyOf: | |
170 | - items: #for I2S | |
6ad8838d | 171 | - const: lpass-lpaif |
8e3fdc52 | 172 | - items: #for I2S and HDMI |
6ad8838d RH |
173 | - const: lpass-hdmiif |
174 | - const: lpass-lpaif | |
8e3fdc52 SKR |
175 | interrupt-names: |
176 | anyOf: | |
177 | - items: #for I2S | |
6ad8838d | 178 | - const: lpass-irq-lpaif |
8e3fdc52 | 179 | - items: #for I2S and HDMI |
6ad8838d RH |
180 | - const: lpass-irq-lpaif |
181 | - const: lpass-irq-hdmi | |
4b381d7e R |
182 | required: |
183 | - iommus | |
184 | - power-domains | |
185 | ||
f3fc4fbf SRM |
186 | - if: |
187 | properties: | |
188 | compatible: | |
189 | contains: | |
190 | const: qcom,sc7280-lpass-cpu | |
191 | ||
192 | then: | |
193 | properties: | |
194 | clock-names: | |
195 | oneOf: | |
196 | - items: #for I2S | |
197 | - const: aon_cc_audio_hm_h | |
98b7630a | 198 | - const: audio_cc_ext_mclk0 |
f3fc4fbf | 199 | - const: core_cc_sysnoc_mport_core |
98b7630a | 200 | - const: core_cc_ext_if0_ibit |
f3fc4fbf SRM |
201 | - const: core_cc_ext_if1_ibit |
202 | - items: #for Soundwire | |
203 | - const: aon_cc_audio_hm_h | |
98b7630a | 204 | - const: audio_cc_codec_mem |
f3fc4fbf SRM |
205 | - const: audio_cc_codec_mem0 |
206 | - const: audio_cc_codec_mem1 | |
207 | - const: audio_cc_codec_mem2 | |
98b7630a | 208 | - const: aon_cc_va_mem0 |
f3fc4fbf | 209 | - items: #for HDMI |
98b7630a | 210 | - const: core_cc_sysnoc_mport_core |
f3fc4fbf SRM |
211 | |
212 | reg-names: | |
213 | anyOf: | |
214 | - items: #for I2S | |
215 | - const: lpass-lpaif | |
216 | - items: #for I2S and HDMI | |
217 | - const: lpass-hdmiif | |
218 | - const: lpass-lpaif | |
219 | - items: #for I2S, soundwire and HDMI | |
220 | - const: lpass-hdmiif | |
221 | - const: lpass-lpaif | |
222 | - const: lpass-rxtx-cdc-dma-lpm | |
223 | - const: lpass-rxtx-lpaif | |
224 | - const: lpass-va-lpaif | |
225 | - const: lpass-va-cdc-dma-lpm | |
226 | interrupt-names: | |
227 | anyOf: | |
228 | - items: #for I2S | |
229 | - const: lpass-irq-lpaif | |
230 | - items: #for I2S and HDMI | |
231 | - const: lpass-irq-lpaif | |
232 | - const: lpass-irq-hdmi | |
233 | - items: #for I2S, soundwire and HDMI | |
234 | - const: lpass-irq-lpaif | |
235 | - const: lpass-irq-hdmi | |
236 | - const: lpass-irq-vaif | |
237 | - const: lpass-irq-rxtxif | |
98b7630a SRM |
238 | power-domain-names: |
239 | allOf: | |
240 | - items: | |
241 | - const: lcx | |
f3fc4fbf SRM |
242 | |
243 | required: | |
244 | - iommus | |
245 | - power-domains | |
246 | ||
4b381d7e R |
247 | examples: |
248 | - | | |
249 | #include <dt-bindings/sound/sc7180-lpass.h> | |
250 | ||
251 | soc { | |
252 | #address-cells = <2>; | |
253 | #size-cells = <2>; | |
8e3fdc52 | 254 | lpass@62d80000 { |
4b381d7e R |
255 | compatible = "qcom,sc7180-lpass-cpu"; |
256 | ||
8e3fdc52 SKR |
257 | reg = <0 0x62d87000 0 0x68000>, |
258 | <0 0x62f00000 0 0x29000>; | |
259 | reg-names = "lpass-hdmiif", | |
260 | "lpass-lpaif"; | |
261 | iommus = <&apps_smmu 0x1020 0>, | |
262 | <&apps_smmu 0x1032 0>; | |
4b381d7e R |
263 | power-domains = <&lpass_hm 0>; |
264 | ||
265 | clocks = <&gcc 131>, | |
266 | <&lpasscorecc 6>, | |
267 | <&lpasscorecc 7>, | |
268 | <&lpasscorecc 10>, | |
269 | <&lpasscorecc 8>, | |
270 | <&lpasscorecc 9>; | |
271 | ||
272 | clock-names = "pcnoc-sway-clk", "audio-core", | |
273 | "mclk0", "pcnoc-mport-clk", | |
274 | "mi2s-bit-clk0", "mi2s-bit-clk1"; | |
275 | ||
8e3fdc52 SKR |
276 | interrupts = <0 160 1>, |
277 | <0 268 1>; | |
278 | interrupt-names = "lpass-irq-lpaif", | |
279 | "lpass-irq-hdmi"; | |
4b381d7e R |
280 | #sound-dai-cells = <1>; |
281 | ||
282 | #address-cells = <1>; | |
283 | #size-cells = <0>; | |
284 | /* Optional to set different MI2S SD lines */ | |
8e3fdc52 | 285 | dai-link@0 { |
4b381d7e R |
286 | reg = <MI2S_PRIMARY>; |
287 | qcom,playback-sd-lines = <1>; | |
288 | qcom,capture-sd-lines = <0>; | |
289 | }; | |
290 | }; | |
291 | }; | |
292 | ||
293 | ... |