Commit | Line | Data |
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76ce6770 MB |
1 | * Mediatek Universal Asynchronous Receiver/Transmitter (UART) |
2 | ||
3 | Required properties: | |
4 | - compatible should contain: | |
02eca173 | 5 | * "mediatek,mt2701-uart" for MT2701 compatible UARTS |
c6f0f58a | 6 | * "mediatek,mt2712-uart" for MT2712 compatible UARTS |
02eca173 EL |
7 | * "mediatek,mt6580-uart" for MT6580 compatible UARTS |
8 | * "mediatek,mt6582-uart" for MT6582 compatible UARTS | |
9 | * "mediatek,mt6589-uart" for MT6589 compatible UARTS | |
94613fa6 | 10 | * "mediatek,mt6755-uart" for MT6755 compatible UARTS |
eb3c74c2 | 11 | * "mediatek,mt6765-uart" for MT6765 compatible UARTS |
02eca173 | 12 | * "mediatek,mt6795-uart" for MT6795 compatible UARTS |
1be88348 | 13 | * "mediatek,mt6797-uart" for MT6797 compatible UARTS |
5f004746 | 14 | * "mediatek,mt7622-uart" for MT7622 compatible UARTS |
0c922413 | 15 | * "mediatek,mt7623-uart" for MT7623 compatible UARTS |
ab407df7 | 16 | * "mediatek,mt8127-uart" for MT8127 compatible UARTS |
02eca173 | 17 | * "mediatek,mt8135-uart" for MT8135 compatible UARTS |
83af225c | 18 | * "mediatek,mt8173-uart" for MT8173 compatible UARTS |
02eca173 | 19 | * "mediatek,mt6577-uart" for MT6577 and all of the above |
76ce6770 MB |
20 | |
21 | - reg: The base address of the UART register bank. | |
22 | ||
23 | - interrupts: A single interrupt specifier. | |
24 | ||
c1c325d7 SH |
25 | - clocks : Must contain an entry for each entry in clock-names. |
26 | See ../clocks/clock-bindings.txt for details. | |
27 | - clock-names: | |
28 | - "baud": The clock the baudrate is derived from | |
29 | - "bus": The bus clock for register accesses (optional) | |
30 | ||
31 | For compatibility with older device trees an unnamed clock is used for the | |
32 | baud clock if the baudclk does not exist. Do not use this for new designs. | |
76ce6770 MB |
33 | |
34 | Example: | |
35 | ||
36 | uart0: serial@11006000 { | |
37 | compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart"; | |
38 | reg = <0x11006000 0x400>; | |
39 | interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>; | |
c1c325d7 SH |
40 | clocks = <&uart_clk>, <&bus_clk>; |
41 | clock-names = "baud", "bus"; | |
76ce6770 | 42 | }; |