Commit | Line | Data |
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7260d251 YS |
1 | * Renesas R-Car PWM Timer Controller |
2 | ||
3 | Required Properties: | |
cdc13708 | 4 | - compatible: should be "renesas,pwm-rcar" and one of the following. |
9d7e7285 FC |
5 | - "renesas,pwm-r8a7743": for RZ/G1M |
6 | - "renesas,pwm-r8a7745": for RZ/G1E | |
7260d251 YS |
7 | - "renesas,pwm-r8a7778": for R-Car M1A |
8 | - "renesas,pwm-r8a7779": for R-Car H1 | |
9 | - "renesas,pwm-r8a7790": for R-Car H2 | |
10 | - "renesas,pwm-r8a7791": for R-Car M2-W | |
11 | - "renesas,pwm-r8a7794": for R-Car E2 | |
396d502c | 12 | - "renesas,pwm-r8a7795": for R-Car H3 |
df8f4c6c | 13 | - "renesas,pwm-r8a7796": for R-Car M3-W |
aa7c4932 | 14 | - "renesas,pwm-r8a77965": for R-Car M3-N |
ccb4e74a | 15 | - "renesas,pwm-r8a77995": for R-Car D3 |
7260d251 YS |
16 | - reg: base address and length of the registers block for the PWM. |
17 | - #pwm-cells: should be 2. See pwm.txt in this directory for a description of | |
18 | the cells format. | |
19 | - clocks: clock phandle and specifier pair. | |
20 | - pinctrl-0: phandle, referring to a default pin configuration node. | |
21 | - pinctrl-names: Set to "default". | |
22 | ||
9d7e7285 | 23 | Example: R8A7743 (RZ/G1M) PWM Timer node |
7260d251 YS |
24 | |
25 | pwm0: pwm@e6e30000 { | |
9d7e7285 | 26 | compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; |
7260d251 | 27 | reg = <0 0xe6e30000 0 0x8>; |
9d7e7285 FC |
28 | clocks = <&cpg CPG_MOD 523>; |
29 | power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; | |
30 | resets = <&cpg 523>; | |
7260d251 | 31 | #pwm-cells = <2>; |
7260d251 YS |
32 | pinctrl-0 = <&pwm0_pins>; |
33 | pinctrl-names = "default"; | |
34 | }; |