dt-bindings: PCI: Add PCI RC DT binding documentation for AM654
[linux-2.6-block.git] / Documentation / devicetree / bindings / pci / pci-keystone.txt
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1TI Keystone PCIe interface
2
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3Keystone PCI host Controller is based on the Synopsys DesignWare PCI
4hardware version 3.65. It shares common functions with the PCIe DesignWare
5core driver and inherits common properties defined in
e5ca4259 6Documentation/devicetree/bindings/pci/designware-pcie.txt
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e5ca4259 8Please refer to Documentation/devicetree/bindings/pci/designware-pcie.txt
96291d56 9for the details of DesignWare DT bindings. Additional properties are
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10described here as well as properties that are not applicable.
11
12Required Properties:-
13
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14compatibility: Should be "ti,keystone-pcie" for RC on Keystone2 SoC
15 Should be "ti,am654-pcie-rc" for RC on AM654x SoC
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16reg: Three register ranges as listed in the reg-names property
17reg-names: "dbics" for the DesignWare PCIe registers, "app" for the
18 TI specific application registers, "config" for the
19 configuration space address
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20
21pcie_msi_intc : Interrupt controller device node for MSI IRQ chip
22 interrupt-cells: should be set to 1
0c4ffcfe 23 interrupts: GIC interrupt lines connected to PCI MSI interrupt lines
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24 (required if the compatible is "ti,keystone-pcie")
25msi-map: As specified in Documentation/devicetree/bindings/pci/pci-msi.txt
26 (required if the compatible is "ti,am654-pcie-rc".
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28ti,syscon-pcie-id : phandle to the device control module required to set device
29 id and vendor id.
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30ti,syscon-pcie-mode : phandle to the device control module required to configure
31 PCI in either RC mode or EP mode.
03d17838 32
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33 Example:
34 pcie_msi_intc: msi-interrupt-controller {
35 interrupt-controller;
36 #interrupt-cells = <1>;
37 interrupt-parent = <&gic>;
38 interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
39 <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>,
40 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
41 <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
42 <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
43 <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
44 <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
45 <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>;
46 };
47
48pcie_intc: Interrupt controller device node for Legacy IRQ chip
49 interrupt-cells: should be set to 1
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50
51 Example:
52 pcie_intc: legacy-interrupt-controller {
53 interrupt-controller;
54 #interrupt-cells = <1>;
55 interrupt-parent = <&gic>;
56 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>,
57 <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>,
58 <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
59 <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
60 };
61
62Optional properties:-
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63 phys: phandle to generic Keystone SerDes PHY for PCI
64 phy-names: name of the generic Keystone SerDes PHY for PCI
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65 - If boot loader already does PCI link establishment, then phys and
66 phy-names shouldn't be present.
025dd3da 67 interrupts: platform interrupt for error interrupts.
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96291d56 69DesignWare DT Properties not applicable for Keystone PCI
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70
711. pcie_bus clock-names not used. Instead, a phandle to phys is used.