net: stmmac: Rename clk_ptp_ref clock to ptp_ref
[linux-2.6-block.git] / Documentation / devicetree / bindings / net / stmmac.txt
CommitLineData
6a228452
SR
1* STMicroelectronics 10/100/1000 Ethernet driver (GMAC)
2
3Required properties:
6357d15e 4- compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac"
84c9f8c4 5 For backwards compatibility: "st,spear600-gmac" is also supported.
6a228452
SR
6- reg: Address and length of the register set for the device
7- interrupt-parent: Should be the phandle for the interrupt controller
8 that services interrupts for this device
9- interrupts: Should contain the STMMAC interrupts
10- interrupt-names: Should contain the interrupt names "macirq"
11 "eth_wake_irq" if this interrupt is supported in the "interrupts"
12 property
e8f08ee0 13- phy-mode: See ethernet.txt file in the same directory.
0e076471
SK
14- snps,reset-gpio gpio number for phy reset.
15- snps,reset-active-low boolean flag to indicate if phy reset is active low.
16- snps,reset-delays-us is triplet of delays
17 The 1st cell is reset pre-delay in micro seconds.
18 The 2nd cell is reset pulse in micro seconds.
19 The 3rd cell is reset post-delay in micro seconds.
afea0365
GC
20
21Optional properties:
22- resets: Should contain a phandle to the STMMAC reset signal, if any
23- reset-names: Should contain the reset signal name "stmmaceth", if a
24 reset phandle is given
25- max-frame-size: See ethernet.txt file in the same directory
26- clocks: If present, the first clock should be the GMAC main clock and
27 the second clock should be peripheral's register interface clock. Further
28 clocks may be specified in derived bindings.
29- clock-names: One name for each entry in the clocks property, the
30 first one should be "stmmaceth" and the second one should be "pclk".
9fbb9dd8
TR
31- ptp_ref: this is the PTP reference clock; in case of the PTP is available
32 this clock is used for programming the Timestamp Addend Register. If not
33 passed then the system clock will be used and this is fine on some
afea0365
GC
34 platforms.
35- tx-fifo-depth: See ethernet.txt file in the same directory
36- rx-fifo-depth: See ethernet.txt file in the same directory
89caaa2d
NC
37- snps,pbl Programmable Burst Length (tx and rx)
38- snps,txpbl Tx Programmable Burst Length. Only for GMAC and newer.
39 If set, DMA tx will use this value rather than snps,pbl.
40- snps,rxpbl Rx Programmable Burst Length. Only for GMAC and newer.
41 If set, DMA rx will use this value rather than snps,pbl.
4022d039
NC
42- snps,no-pbl-x8 Don't multiply the pbl/txpbl/rxpbl values by 8.
43 For core rev < 3.50, don't multiply the values by 4.
afea0365 44- snps,aal Address-Aligned Beats
25c83b5c
SK
45- snps,fixed-burst Program the DMA to use the fixed burst mode
46- snps,mixed-burst Program the DMA to use the mixed burst mode
e2a240c7
SZ
47- snps,force_thresh_dma_mode Force DMA to use the threshold mode for
48 both tx and rx
49- snps,force_sf_dma_mode Force DMA to use the Store and Forward
50 mode for both tx and rx. This flag is
51 ignored if force_thresh_dma_mode is set.
b4b7b772 52- snps,en-tx-lpi-clockgating Enable gating of the MAC TX clock during
53 TX low-power mode
94ceaa26
VB
54- snps,multicast-filter-bins: Number of multicast filter hash bins
55 supported by this device instance
56- snps,perfect-filter-entries: Number of perfect filter entries supported
57 by this device instance
02e57b9d
GC
58- snps,ps-speed: port selection speed that can be passed to the core when
59 PCS is supported. For example, this is used in case of SGMII
60 and MAC2MAC connection.
6357d15e
NC
61- snps,tso: this enables the TSO feature otherwise it will be managed by
62 MAC HW capability register. Only for GMAC4 and newer.
afea0365
GC
63- AXI BUS Mode parameters: below the list of all the parameters to program the
64 AXI register inside the DMA module:
65 - snps,lpi_en: enable Low Power Interface
66 - snps,xit_frm: unlock on WoL
dd346f27
EE
67 - snps,wr_osr_lmt: max write outstanding req. limit
68 - snps,rd_osr_lmt: max read outstanding req. limit
afea0365 69 - snps,kbbe: do not cross 1KiB boundary.
afea0365
GC
70 - snps,blen: this is a vector of supported burst length.
71 - snps,fb: fixed-burst
72 - snps,mb: mixed-burst
73 - snps,rb: rebuild INCRx Burst
e34d6569 74- mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
6a228452
SR
75
76Examples:
77
afea0365
GC
78 stmmac_axi_setup: stmmac-axi-config {
79 snps,wr_osr_lmt = <0xf>;
80 snps,rd_osr_lmt = <0xf>;
81 snps,blen = <256 128 64 32 0 0 0>;
82 };
83
6a228452
SR
84 gmac0: ethernet@e0800000 {
85 compatible = "st,spear600-gmac";
86 reg = <0xe0800000 0x8000>;
87 interrupt-parent = <&vic1>;
88 interrupts = <24 23>;
89 interrupt-names = "macirq", "eth_wake_irq";
90 mac-address = [000000000000]; /* Filled in by U-Boot */
369ea818 91 max-frame-size = <3800>;
6a228452 92 phy-mode = "gmii";
94ceaa26
VB
93 snps,multicast-filter-bins = <256>;
94 snps,perfect-filter-entries = <128>;
13967f0c
VB
95 rx-fifo-depth = <16384>;
96 tx-fifo-depth = <16384>;
50b4af41 97 clocks = <&clock>;
924064e9 98 clock-names = "stmmaceth";
afea0365 99 snps,axi-config = <&stmmac_axi_setup>;
e34d6569
PR
100 mdio0 {
101 #address-cells = <1>;
102 #size-cells = <0>;
103 compatible = "snps,dwmac-mdio";
104 phy1: ethernet-phy@0 {
105 };
106 };
6a228452 107 };