Commit | Line | Data |
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7db3545a MR |
1 | # SPDX-License-Identifier: GPL-2.0 |
2 | %YAML 1.2 | |
3 | --- | |
4 | $id: http://devicetree.org/schemas/net/snps,dwmac.yaml# | |
5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
6 | ||
dd3cb467 | 7 | title: Synopsys DesignWare MAC |
7db3545a MR |
8 | |
9 | maintainers: | |
f4eedebd | 10 | - Alexandre Torgue <alexandre.torgue@foss.st.com> |
7db3545a MR |
11 | - Giuseppe Cavallaro <peppe.cavallaro@st.com> |
12 | - Jose Abreu <joabreu@synopsys.com> | |
13 | ||
14 | # Select every compatible, including the deprecated ones. This way, we | |
15 | # will be able to report a warning when we have that compatible, since | |
16 | # we will validate the node thanks to the select, but won't report it | |
17 | # as a valid value in the compatible property description | |
18 | select: | |
19 | properties: | |
20 | compatible: | |
21 | contains: | |
22 | enum: | |
23 | - snps,dwmac | |
3781b6ad | 24 | - snps,dwmac-3.40a |
7db3545a MR |
25 | - snps,dwmac-3.50a |
26 | - snps,dwmac-3.610 | |
27 | - snps,dwmac-3.70a | |
28 | - snps,dwmac-3.710 | |
29 | - snps,dwmac-4.00 | |
30 | - snps,dwmac-4.10a | |
f2253143 | 31 | - snps,dwmac-4.20a |
bdad810e | 32 | - snps,dwmac-5.10a |
7db3545a MR |
33 | - snps,dwxgmac |
34 | - snps,dwxgmac-2.10 | |
35 | ||
36 | # Deprecated | |
37 | - st,spear600-gmac | |
38 | ||
39 | required: | |
40 | - compatible | |
41 | ||
42 | properties: | |
43 | ||
44 | # We need to include all the compatibles from schemas that will | |
45 | # include that schemas, otherwise compatible won't validate for | |
46 | # those. | |
47 | compatible: | |
48 | contains: | |
49 | enum: | |
4b859450 | 50 | - allwinner,sun7i-a20-gmac |
0569929d MR |
51 | - allwinner,sun8i-a83t-emac |
52 | - allwinner,sun8i-h3-emac | |
b33be51c | 53 | - allwinner,sun8i-r40-gmac |
0569929d MR |
54 | - allwinner,sun8i-v3s-emac |
55 | - allwinner,sun50i-a64-emac | |
d5a57e4e NA |
56 | - amlogic,meson6-dwmac |
57 | - amlogic,meson8b-dwmac | |
58 | - amlogic,meson8m2-dwmac | |
59 | - amlogic,meson-gxbb-dwmac | |
60 | - amlogic,meson-axg-dwmac | |
3b840106 ZY |
61 | - ingenic,jz4775-mac |
62 | - ingenic,x1000-mac | |
63 | - ingenic,x1600-mac | |
64 | - ingenic,x1830-mac | |
65 | - ingenic,x2000-mac | |
ce8b3ad1 DY |
66 | - loongson,ls2k-dwmac |
67 | - loongson,ls7a-dwmac | |
d7cc14bc CL |
68 | - renesas,r9a06g032-gmac |
69 | - renesas,rzn1-gmac | |
517a882a EG |
70 | - rockchip,px30-gmac |
71 | - rockchip,rk3128-gmac | |
72 | - rockchip,rk3228-gmac | |
73 | - rockchip,rk3288-gmac | |
74 | - rockchip,rk3328-gmac | |
75 | - rockchip,rk3366-gmac | |
76 | - rockchip,rk3368-gmac | |
a2b77831 | 77 | - rockchip,rk3588-gmac |
517a882a EG |
78 | - rockchip,rk3399-gmac |
79 | - rockchip,rv1108-gmac | |
7db3545a | 80 | - snps,dwmac |
3781b6ad | 81 | - snps,dwmac-3.40a |
7db3545a MR |
82 | - snps,dwmac-3.50a |
83 | - snps,dwmac-3.610 | |
84 | - snps,dwmac-3.70a | |
85 | - snps,dwmac-3.710 | |
86 | - snps,dwmac-4.00 | |
87 | - snps,dwmac-4.10a | |
f2253143 | 88 | - snps,dwmac-4.20a |
bdad810e | 89 | - snps,dwmac-5.10a |
7db3545a MR |
90 | - snps,dwxgmac |
91 | - snps,dwxgmac-2.10 | |
92 | ||
93 | reg: | |
57b77df7 NA |
94 | minItems: 1 |
95 | maxItems: 2 | |
7db3545a MR |
96 | |
97 | interrupts: | |
98 | minItems: 1 | |
7db3545a MR |
99 | items: |
100 | - description: Combined signal for various interrupt events | |
101 | - description: The interrupt to manage the remote wake-up packet detection | |
102 | - description: The interrupt that occurs when Rx exits the LPI state | |
103 | ||
104 | interrupt-names: | |
105 | minItems: 1 | |
7db3545a MR |
106 | items: |
107 | - const: macirq | |
108 | - const: eth_wake_irq | |
109 | - const: eth_lpi | |
110 | ||
111 | clocks: | |
112 | minItems: 1 | |
517a882a | 113 | maxItems: 8 |
f2253143 | 114 | additionalItems: true |
7db3545a MR |
115 | items: |
116 | - description: GMAC main clock | |
117 | - description: Peripheral registers interface clock | |
118 | - description: | |
119 | PTP reference clock. This clock is used for programming the | |
120 | Timestamp Addend Register. If not passed then the system | |
121 | clock will be used and this is fine on some platforms. | |
122 | ||
123 | clock-names: | |
f2253143 | 124 | minItems: 1 |
517a882a | 125 | maxItems: 8 |
7db3545a MR |
126 | additionalItems: true |
127 | contains: | |
128 | enum: | |
129 | - stmmaceth | |
130 | - pclk | |
131 | - ptp_ref | |
132 | ||
133 | resets: | |
134 | maxItems: 1 | |
135 | description: | |
136 | MAC Reset signal. | |
137 | ||
138 | reset-names: | |
139 | const: stmmaceth | |
140 | ||
955fe312 CL |
141 | power-domains: |
142 | maxItems: 1 | |
143 | ||
9c15d359 | 144 | mac-mode: |
9e5c8d39 | 145 | $ref: ethernet-controller.yaml#/properties/phy-connection-type |
9c15d359 AA |
146 | description: |
147 | The property is identical to 'phy-mode', and assumes that there is mode | |
148 | converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter | |
149 | can be passive (no SW requirement), and requires that the MAC operate | |
150 | in a different mode than the PHY in order to function. | |
151 | ||
7db3545a | 152 | snps,axi-config: |
d69c6ddd | 153 | $ref: /schemas/types.yaml#/definitions/phandle |
7db3545a MR |
154 | description: |
155 | AXI BUS Mode parameters. Phandle to a node that can contain the | |
156 | following properties | |
157 | * snps,lpi_en, enable Low Power Interface | |
158 | * snps,xit_frm, unlock on WoL | |
159 | * snps,wr_osr_lmt, max write outstanding req. limit | |
160 | * snps,rd_osr_lmt, max read outstanding req. limit | |
161 | * snps,kbbe, do not cross 1KiB boundary. | |
162 | * snps,blen, this is a vector of supported burst length. | |
163 | * snps,fb, fixed-burst | |
164 | * snps,mb, mixed-burst | |
165 | * snps,rb, rebuild INCRx Burst | |
166 | ||
167 | snps,mtl-rx-config: | |
d69c6ddd | 168 | $ref: /schemas/types.yaml#/definitions/phandle |
7db3545a MR |
169 | description: |
170 | Multiple RX Queues parameters. Phandle to a node that can | |
171 | contain the following properties | |
172 | * snps,rx-queues-to-use, number of RX queues to be used in the | |
173 | driver | |
174 | * Choose one of these RX scheduling algorithms | |
175 | * snps,rx-sched-sp, Strict priority | |
176 | * snps,rx-sched-wsp, Weighted Strict priority | |
177 | * For each RX queue | |
178 | * Choose one of these modes | |
179 | * snps,dcb-algorithm, Queue to be enabled as DCB | |
180 | * snps,avb-algorithm, Queue to be enabled as AVB | |
181 | * snps,map-to-dma-channel, Channel to map | |
182 | * Specifiy specific packet routing | |
183 | * snps,route-avcp, AV Untagged Control packets | |
184 | * snps,route-ptp, PTP Packets | |
185 | * snps,route-dcbcp, DCB Control Packets | |
186 | * snps,route-up, Untagged Packets | |
187 | * snps,route-multi-broad, Multicast & Broadcast Packets | |
93828834 SL |
188 | * snps,priority, bitmask of the tagged frames priorities assigned to |
189 | the queue | |
7db3545a MR |
190 | |
191 | snps,mtl-tx-config: | |
d69c6ddd | 192 | $ref: /schemas/types.yaml#/definitions/phandle |
7db3545a MR |
193 | description: |
194 | Multiple TX Queues parameters. Phandle to a node that can | |
195 | contain the following properties | |
196 | * snps,tx-queues-to-use, number of TX queues to be used in the | |
197 | driver | |
198 | * Choose one of these TX scheduling algorithms | |
199 | * snps,tx-sched-wrr, Weighted Round Robin | |
200 | * snps,tx-sched-wfq, Weighted Fair Queuing | |
201 | * snps,tx-sched-dwrr, Deficit Weighted Round Robin | |
202 | * snps,tx-sched-sp, Strict priority | |
203 | * For each TX queue | |
204 | * snps,weight, TX queue weight (if using a DCB weight | |
205 | algorithm) | |
206 | * Choose one of these modes | |
207 | * snps,dcb-algorithm, TX queue will be working in DCB | |
208 | * snps,avb-algorithm, TX queue will be working in AVB | |
209 | [Attention] Queue 0 is reserved for legacy traffic | |
210 | and so no AVB is available in this queue. | |
211 | * Configure Credit Base Shaper (if AVB Mode selected) | |
212 | * snps,send_slope, enable Low Power Interface | |
213 | * snps,idle_slope, unlock on WoL | |
214 | * snps,high_credit, max write outstanding req. limit | |
215 | * snps,low_credit, max read outstanding req. limit | |
93828834 SL |
216 | * snps,priority, bitmask of the priorities assigned to the queue. |
217 | When a PFC frame is received with priorities matching the bitmask, | |
218 | the queue is blocked from transmitting for the pause time specified | |
219 | in the PFC frame. | |
7db3545a MR |
220 | |
221 | snps,reset-gpio: | |
f80b1dfc | 222 | deprecated: true |
7db3545a MR |
223 | maxItems: 1 |
224 | description: | |
225 | PHY Reset GPIO | |
226 | ||
227 | snps,reset-active-low: | |
f80b1dfc | 228 | deprecated: true |
d69c6ddd | 229 | $ref: /schemas/types.yaml#/definitions/flag |
7db3545a MR |
230 | description: |
231 | Indicates that the PHY Reset is active low | |
232 | ||
233 | snps,reset-delays-us: | |
f80b1dfc | 234 | deprecated: true |
7db3545a MR |
235 | description: |
236 | Triplet of delays. The 1st cell is reset pre-delay in micro | |
237 | seconds. The 2nd cell is reset pulse in micro seconds. The 3rd | |
238 | cell is reset post-delay in micro seconds. | |
3d21a460 RH |
239 | minItems: 3 |
240 | maxItems: 3 | |
7db3545a MR |
241 | |
242 | snps,aal: | |
d69c6ddd | 243 | $ref: /schemas/types.yaml#/definitions/flag |
7db3545a MR |
244 | description: |
245 | Use Address-Aligned Beats | |
246 | ||
247 | snps,fixed-burst: | |
d69c6ddd | 248 | $ref: /schemas/types.yaml#/definitions/flag |
7db3545a MR |
249 | description: |
250 | Program the DMA to use the fixed burst mode | |
251 | ||
252 | snps,mixed-burst: | |
d69c6ddd | 253 | $ref: /schemas/types.yaml#/definitions/flag |
7db3545a MR |
254 | description: |
255 | Program the DMA to use the mixed burst mode | |
256 | ||
257 | snps,force_thresh_dma_mode: | |
d69c6ddd | 258 | $ref: /schemas/types.yaml#/definitions/flag |
7db3545a MR |
259 | description: |
260 | Force DMA to use the threshold mode for both tx and rx | |
261 | ||
262 | snps,force_sf_dma_mode: | |
d69c6ddd | 263 | $ref: /schemas/types.yaml#/definitions/flag |
7db3545a MR |
264 | description: |
265 | Force DMA to use the Store and Forward mode for both tx and | |
266 | rx. This flag is ignored if force_thresh_dma_mode is set. | |
267 | ||
268 | snps,en-tx-lpi-clockgating: | |
d69c6ddd | 269 | $ref: /schemas/types.yaml#/definitions/flag |
7db3545a MR |
270 | description: |
271 | Enable gating of the MAC TX clock during TX low-power mode | |
272 | ||
273 | snps,multicast-filter-bins: | |
d69c6ddd | 274 | $ref: /schemas/types.yaml#/definitions/uint32 |
7db3545a MR |
275 | description: |
276 | Number of multicast filter hash bins supported by this device | |
277 | instance | |
278 | ||
279 | snps,perfect-filter-entries: | |
d69c6ddd | 280 | $ref: /schemas/types.yaml#/definitions/uint32 |
7db3545a MR |
281 | description: |
282 | Number of perfect filter entries supported by this device | |
283 | instance | |
284 | ||
285 | snps,ps-speed: | |
d69c6ddd | 286 | $ref: /schemas/types.yaml#/definitions/uint32 |
7db3545a MR |
287 | description: |
288 | Port selection speed that can be passed to the core when PCS | |
289 | is supported. For example, this is used in case of SGMII and | |
290 | MAC2MAC connection. | |
291 | ||
22ba1afd JZ |
292 | snps,clk-csr: |
293 | $ref: /schemas/types.yaml#/definitions/uint32 | |
294 | description: | |
295 | Frequency division factor for MDC clock. | |
296 | ||
7db3545a | 297 | mdio: |
b2d28642 RH |
298 | $ref: mdio.yaml# |
299 | unevaluatedProperties: false | |
7db3545a MR |
300 | description: |
301 | Creates and registers an MDIO bus. | |
302 | ||
303 | properties: | |
304 | compatible: | |
305 | const: snps,dwmac-mdio | |
306 | ||
307 | required: | |
308 | - compatible | |
309 | ||
5361660a MV |
310 | stmmac-axi-config: |
311 | type: object | |
312 | unevaluatedProperties: false | |
313 | description: | |
314 | AXI BUS Mode parameters. | |
315 | ||
316 | properties: | |
317 | snps,lpi_en: | |
318 | $ref: /schemas/types.yaml#/definitions/flag | |
319 | description: | |
320 | enable Low Power Interface | |
321 | ||
322 | snps,xit_frm: | |
323 | $ref: /schemas/types.yaml#/definitions/flag | |
324 | description: | |
325 | unlock on WoL | |
326 | ||
327 | snps,wr_osr_lmt: | |
328 | $ref: /schemas/types.yaml#/definitions/uint32 | |
329 | description: | |
330 | max write outstanding req. limit | |
331 | ||
332 | snps,rd_osr_lmt: | |
333 | $ref: /schemas/types.yaml#/definitions/uint32 | |
334 | description: | |
335 | max read outstanding req. limit | |
336 | ||
337 | snps,kbbe: | |
338 | $ref: /schemas/types.yaml#/definitions/uint32 | |
339 | description: | |
340 | do not cross 1KiB boundary. | |
341 | ||
342 | snps,blen: | |
343 | $ref: /schemas/types.yaml#/definitions/uint32-array | |
344 | description: | |
345 | this is a vector of supported burst length. | |
346 | minItems: 7 | |
347 | maxItems: 7 | |
348 | ||
349 | snps,fb: | |
350 | $ref: /schemas/types.yaml#/definitions/flag | |
351 | description: | |
352 | fixed-burst | |
353 | ||
354 | snps,mb: | |
355 | $ref: /schemas/types.yaml#/definitions/flag | |
356 | description: | |
357 | mixed-burst | |
358 | ||
359 | snps,rb: | |
360 | $ref: /schemas/types.yaml#/definitions/flag | |
361 | description: | |
362 | rebuild INCRx Burst | |
363 | ||
7db3545a MR |
364 | required: |
365 | - compatible | |
366 | - reg | |
367 | - interrupts | |
368 | - interrupt-names | |
67d0da99 | 369 | - phy-mode |
7db3545a MR |
370 | |
371 | dependencies: | |
372 | snps,reset-active-low: ["snps,reset-gpio"] | |
373 | snps,reset-delay-us: ["snps,reset-gpio"] | |
374 | ||
375 | allOf: | |
376 | - $ref: "ethernet-controller.yaml#" | |
377 | - if: | |
378 | properties: | |
379 | compatible: | |
380 | contains: | |
381 | enum: | |
4b859450 | 382 | - allwinner,sun7i-a20-gmac |
0569929d MR |
383 | - allwinner,sun8i-a83t-emac |
384 | - allwinner,sun8i-h3-emac | |
b33be51c | 385 | - allwinner,sun8i-r40-gmac |
0569929d MR |
386 | - allwinner,sun8i-v3s-emac |
387 | - allwinner,sun50i-a64-emac | |
3b840106 ZY |
388 | - ingenic,jz4775-mac |
389 | - ingenic,x1000-mac | |
390 | - ingenic,x1600-mac | |
391 | - ingenic,x1830-mac | |
392 | - ingenic,x2000-mac | |
1d01efaf RH |
393 | - snps,dwmac-3.50a |
394 | - snps,dwmac-4.10a | |
395 | - snps,dwmac-4.20a | |
7db3545a MR |
396 | - snps,dwxgmac |
397 | - snps,dwxgmac-2.10 | |
398 | - st,spear600-gmac | |
399 | ||
400 | then: | |
401 | properties: | |
402 | snps,pbl: | |
7db3545a MR |
403 | description: |
404 | Programmable Burst Length (tx and rx) | |
d69c6ddd | 405 | $ref: /schemas/types.yaml#/definitions/uint32 |
09a2fb41 | 406 | enum: [1, 2, 4, 8, 16, 32] |
7db3545a MR |
407 | |
408 | snps,txpbl: | |
7db3545a MR |
409 | description: |
410 | Tx Programmable Burst Length. If set, DMA tx will use this | |
411 | value rather than snps,pbl. | |
d69c6ddd | 412 | $ref: /schemas/types.yaml#/definitions/uint32 |
09a2fb41 | 413 | enum: [1, 2, 4, 8, 16, 32] |
7db3545a MR |
414 | |
415 | snps,rxpbl: | |
7db3545a MR |
416 | description: |
417 | Rx Programmable Burst Length. If set, DMA rx will use this | |
418 | value rather than snps,pbl. | |
d69c6ddd | 419 | $ref: /schemas/types.yaml#/definitions/uint32 |
09a2fb41 | 420 | enum: [1, 2, 4, 8, 16, 32] |
7db3545a MR |
421 | |
422 | snps,no-pbl-x8: | |
d69c6ddd | 423 | $ref: /schemas/types.yaml#/definitions/flag |
7db3545a MR |
424 | description: |
425 | Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core | |
426 | rev < 3.50, don\'t multiply the values by 4. | |
427 | ||
428 | - if: | |
429 | properties: | |
430 | compatible: | |
431 | contains: | |
432 | enum: | |
4b859450 | 433 | - allwinner,sun7i-a20-gmac |
0569929d MR |
434 | - allwinner,sun8i-a83t-emac |
435 | - allwinner,sun8i-h3-emac | |
b33be51c | 436 | - allwinner,sun8i-r40-gmac |
0569929d MR |
437 | - allwinner,sun8i-v3s-emac |
438 | - allwinner,sun50i-a64-emac | |
68277749 QZ |
439 | - loongson,ls2k-dwmac |
440 | - loongson,ls7a-dwmac | |
3b840106 ZY |
441 | - ingenic,jz4775-mac |
442 | - ingenic,x1000-mac | |
443 | - ingenic,x1600-mac | |
444 | - ingenic,x1830-mac | |
445 | - ingenic,x2000-mac | |
7db3545a MR |
446 | - snps,dwmac-4.00 |
447 | - snps,dwmac-4.10a | |
f2253143 | 448 | - snps,dwmac-4.20a |
bdad810e | 449 | - snps,dwmac-5.10a |
7db3545a MR |
450 | - snps,dwxgmac |
451 | - snps,dwxgmac-2.10 | |
452 | - st,spear600-gmac | |
453 | ||
454 | then: | |
dbce0b65 | 455 | properties: |
7db3545a | 456 | snps,tso: |
d69c6ddd | 457 | $ref: /schemas/types.yaml#/definitions/flag |
7db3545a MR |
458 | description: |
459 | Enables the TSO feature otherwise it will be managed by | |
460 | MAC HW capability register. | |
461 | ||
6a0e321e RH |
462 | additionalProperties: true |
463 | ||
7db3545a MR |
464 | examples: |
465 | - | | |
466 | stmmac_axi_setup: stmmac-axi-config { | |
467 | snps,wr_osr_lmt = <0xf>; | |
468 | snps,rd_osr_lmt = <0xf>; | |
469 | snps,blen = <256 128 64 32 0 0 0>; | |
470 | }; | |
471 | ||
472 | mtl_rx_setup: rx-queues-config { | |
473 | snps,rx-queues-to-use = <1>; | |
474 | snps,rx-sched-sp; | |
475 | queue0 { | |
476 | snps,dcb-algorithm; | |
477 | snps,map-to-dma-channel = <0x0>; | |
478 | snps,priority = <0x0>; | |
479 | }; | |
480 | }; | |
481 | ||
482 | mtl_tx_setup: tx-queues-config { | |
483 | snps,tx-queues-to-use = <2>; | |
484 | snps,tx-sched-wrr; | |
485 | queue0 { | |
486 | snps,weight = <0x10>; | |
487 | snps,dcb-algorithm; | |
488 | snps,priority = <0x0>; | |
489 | }; | |
490 | ||
491 | queue1 { | |
492 | snps,avb-algorithm; | |
493 | snps,send_slope = <0x1000>; | |
494 | snps,idle_slope = <0x1000>; | |
495 | snps,high_credit = <0x3E800>; | |
496 | snps,low_credit = <0xFFC18000>; | |
497 | snps,priority = <0x1>; | |
498 | }; | |
499 | }; | |
500 | ||
501 | gmac0: ethernet@e0800000 { | |
502 | compatible = "snps,dwxgmac-2.10", "snps,dwxgmac"; | |
503 | reg = <0xe0800000 0x8000>; | |
504 | interrupt-parent = <&vic1>; | |
505 | interrupts = <24 23 22>; | |
506 | interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; | |
507 | mac-address = [000000000000]; /* Filled in by U-Boot */ | |
508 | max-frame-size = <3800>; | |
67d0da99 | 509 | phy-mode = "gmii"; |
7db3545a MR |
510 | snps,multicast-filter-bins = <256>; |
511 | snps,perfect-filter-entries = <128>; | |
512 | rx-fifo-depth = <16384>; | |
513 | tx-fifo-depth = <16384>; | |
514 | clocks = <&clock>; | |
515 | clock-names = "stmmaceth"; | |
516 | snps,axi-config = <&stmmac_axi_setup>; | |
517 | snps,mtl-rx-config = <&mtl_rx_setup>; | |
518 | snps,mtl-tx-config = <&mtl_tx_setup>; | |
519 | mdio0 { | |
520 | #address-cells = <1>; | |
521 | #size-cells = <0>; | |
522 | compatible = "snps,dwmac-mdio"; | |
523 | phy1: ethernet-phy@0 { | |
524 | reg = <0>; | |
525 | }; | |
526 | }; | |
527 | }; | |
528 | ||
529 | # FIXME: We should set it, but it would report all the generic | |
530 | # properties as additional properties. | |
531 | # additionalProperties: false | |
532 | ||
533 | ... |