Commit | Line | Data |
---|---|---|
806700ba | 1 | Micrel KSZ9021/KSZ9031/KSZ9131 Gigabit Ethernet PHY |
4b405efb | 2 | |
2ad7b756 AL |
3 | Some boards require special tuning values, particularly when it comes |
4 | to clock delays. You can specify clock delay values in the PHY OF | |
5 | device node. Deprecated, but still supported, these properties can | |
6 | also be added to an Ethernet OF device node. | |
4b405efb HC |
7 | |
8 | Note that these settings are applied after any phy-specific fixup from | |
9 | phy_fixup_list (see phy_init_hw() from drivers/net/phy/phy_device.c), | |
10 | and therefore may overwrite them. | |
11 | ||
12 | KSZ9021: | |
13 | ||
14 | All skew control options are specified in picoseconds. The minimum | |
20b3f7d7 JB |
15 | value is 0, the maximum value is 3000, and it can be specified in 200ps |
16 | steps, *but* these values are in not fact what you get because this chip's | |
17 | skew values actually increase in 120ps steps, starting from -840ps. The | |
18 | incorrect values came from an error in the original KSZ9021 datasheet | |
19 | before it was corrected in revision 1.2 (Feb 2014), but it is too late to | |
20 | change the driver now because of the many existing device trees that have | |
21 | been created using values that go up in increments of 200. | |
22 | ||
23 | The following table shows the actual skew delay you will get for each of the | |
24 | possible devicetree values, and the number that will be programmed into the | |
25 | corresponding pad skew register: | |
26 | ||
27 | Device Tree Value Delay Pad Skew Register Value | |
28 | ----------------------------------------------------- | |
29 | 0 -840ps 0000 | |
30 | 200 -720ps 0001 | |
31 | 400 -600ps 0010 | |
32 | 600 -480ps 0011 | |
33 | 800 -360ps 0100 | |
34 | 1000 -240ps 0101 | |
35 | 1200 -120ps 0110 | |
36 | 1400 0ps 0111 | |
37 | 1600 120ps 1000 | |
38 | 1800 240ps 1001 | |
39 | 2000 360ps 1010 | |
40 | 2200 480ps 1011 | |
41 | 2400 600ps 1100 | |
42 | 2600 720ps 1101 | |
43 | 2800 840ps 1110 | |
44 | 3000 960ps 1111 | |
4b405efb HC |
45 | |
46 | Optional properties: | |
47 | ||
48 | - rxc-skew-ps : Skew control of RXC pad | |
49 | - rxdv-skew-ps : Skew control of RX CTL pad | |
50 | - txc-skew-ps : Skew control of TXC pad | |
51 | - txen-skew-ps : Skew control of TX CTL pad | |
52 | - rxd0-skew-ps : Skew control of RX data 0 pad | |
53 | - rxd1-skew-ps : Skew control of RX data 1 pad | |
54 | - rxd2-skew-ps : Skew control of RX data 2 pad | |
55 | - rxd3-skew-ps : Skew control of RX data 3 pad | |
56 | - txd0-skew-ps : Skew control of TX data 0 pad | |
57 | - txd1-skew-ps : Skew control of TX data 1 pad | |
58 | - txd2-skew-ps : Skew control of TX data 2 pad | |
59 | - txd3-skew-ps : Skew control of TX data 3 pad | |
60 | ||
61 | KSZ9031: | |
62 | ||
63 | All skew control options are specified in picoseconds. The minimum | |
64 | value is 0, and the maximum is property-dependent. The increment | |
3d9e133f ML |
65 | step is 60ps. The default value is the neutral setting, so setting |
66 | rxc-skew-ps=<0> actually results in -900 picoseconds adjustment. | |
4b405efb | 67 | |
3ed14d8d DN |
68 | The KSZ9031 hardware supports a range of skew values from negative to |
69 | positive, where the specific range is property dependent. All values | |
70 | specified in the devicetree are offset by the minimum value so they | |
71 | can be represented as positive integers in the devicetree since it's | |
72 | difficult to represent a negative number in the devictree. | |
73 | ||
74 | The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps. | |
75 | ||
76 | Pad Skew Value Delay (ps) Devicetree Value | |
77 | ------------------------------------------------------ | |
78 | 0_0000 -900ps 0 | |
79 | 0_0001 -840ps 60 | |
80 | 0_0010 -780ps 120 | |
81 | 0_0011 -720ps 180 | |
82 | 0_0100 -660ps 240 | |
83 | 0_0101 -600ps 300 | |
84 | 0_0110 -540ps 360 | |
85 | 0_0111 -480ps 420 | |
86 | 0_1000 -420ps 480 | |
87 | 0_1001 -360ps 540 | |
88 | 0_1010 -300ps 600 | |
89 | 0_1011 -240ps 660 | |
90 | 0_1100 -180ps 720 | |
91 | 0_1101 -120ps 780 | |
92 | 0_1110 -60ps 840 | |
93 | 0_1111 0ps 900 | |
94 | 1_0000 60ps 960 | |
95 | 1_0001 120ps 1020 | |
96 | 1_0010 180ps 1080 | |
97 | 1_0011 240ps 1140 | |
98 | 1_0100 300ps 1200 | |
99 | 1_0101 360ps 1260 | |
100 | 1_0110 420ps 1320 | |
101 | 1_0111 480ps 1380 | |
102 | 1_1000 540ps 1440 | |
103 | 1_1001 600ps 1500 | |
104 | 1_1010 660ps 1560 | |
105 | 1_1011 720ps 1620 | |
106 | 1_1100 780ps 1680 | |
107 | 1_1101 840ps 1740 | |
108 | 1_1110 900ps 1800 | |
109 | 1_1111 960ps 1860 | |
110 | ||
111 | The following 4-bit values table apply to the txdX-skew-ps, rxdX-skew-ps | |
112 | data pads, and the rxdv-skew-ps, txen-skew-ps control pads. | |
113 | ||
114 | Pad Skew Value Delay (ps) Devicetree Value | |
115 | ------------------------------------------------------ | |
116 | 0000 -420ps 0 | |
117 | 0001 -360ps 60 | |
118 | 0010 -300ps 120 | |
119 | 0011 -240ps 180 | |
120 | 0100 -180ps 240 | |
121 | 0101 -120ps 300 | |
122 | 0110 -60ps 360 | |
123 | 0111 0ps 420 | |
124 | 1000 60ps 480 | |
125 | 1001 120ps 540 | |
126 | 1010 180ps 600 | |
127 | 1011 240ps 660 | |
128 | 1100 300ps 720 | |
129 | 1101 360ps 780 | |
130 | 1110 420ps 840 | |
131 | 1111 480ps 900 | |
132 | ||
4b405efb HC |
133 | Optional properties: |
134 | ||
3d9e133f | 135 | Maximum value of 1860, default value 900: |
4b405efb HC |
136 | |
137 | - rxc-skew-ps : Skew control of RX clock pad | |
138 | - txc-skew-ps : Skew control of TX clock pad | |
139 | ||
3d9e133f | 140 | Maximum value of 900, default value 420: |
4b405efb HC |
141 | |
142 | - rxdv-skew-ps : Skew control of RX CTL pad | |
143 | - txen-skew-ps : Skew control of TX CTL pad | |
144 | - rxd0-skew-ps : Skew control of RX data 0 pad | |
145 | - rxd1-skew-ps : Skew control of RX data 1 pad | |
146 | - rxd2-skew-ps : Skew control of RX data 2 pad | |
147 | - rxd3-skew-ps : Skew control of RX data 3 pad | |
148 | - txd0-skew-ps : Skew control of TX data 0 pad | |
149 | - txd1-skew-ps : Skew control of TX data 1 pad | |
150 | - txd2-skew-ps : Skew control of TX data 2 pad | |
151 | - txd3-skew-ps : Skew control of TX data 3 pad | |
152 | ||
e1b505a6 MN |
153 | - micrel,force-master: |
154 | Boolean, force phy to master mode. Only set this option if the phy | |
155 | reference clock provided at CLK125_NDO pin is used as MAC reference | |
156 | clock because the clock jitter in slave mode is to high (errata#2). | |
157 | Attention: The link partner must be configurable as slave otherwise | |
158 | no link will be established. | |
159 | ||
806700ba | 160 | KSZ9131: |
33e581d7 | 161 | LAN8841: |
806700ba YO |
162 | |
163 | All skew control options are specified in picoseconds. The increment | |
164 | step is 100ps. Unlike KSZ9031, the values represent picoseccond delays. | |
165 | A negative value can be assigned as rxc-skew-psec = <(-100)>;. | |
166 | ||
167 | Optional properties: | |
168 | ||
169 | Range of the value -700 to 2400, default value 0: | |
170 | ||
171 | - rxc-skew-psec : Skew control of RX clock pad | |
172 | - txc-skew-psec : Skew control of TX clock pad | |
173 | ||
174 | Range of the value -700 to 800, default value 0: | |
175 | ||
176 | - rxdv-skew-psec : Skew control of RX CTL pad | |
177 | - txen-skew-psec : Skew control of TX CTL pad | |
178 | - rxd0-skew-psec : Skew control of RX data 0 pad | |
179 | - rxd1-skew-psec : Skew control of RX data 1 pad | |
180 | - rxd2-skew-psec : Skew control of RX data 2 pad | |
181 | - rxd3-skew-psec : Skew control of RX data 3 pad | |
182 | - txd0-skew-psec : Skew control of TX data 0 pad | |
183 | - txd1-skew-psec : Skew control of TX data 1 pad | |
184 | - txd2-skew-psec : Skew control of TX data 2 pad | |
185 | - txd3-skew-psec : Skew control of TX data 3 pad | |
186 | ||
4b405efb HC |
187 | Examples: |
188 | ||
3ed14d8d DN |
189 | /* Attach to an Ethernet device with autodetected PHY */ |
190 | &enet { | |
191 | rxc-skew-ps = <1800>; | |
192 | rxdv-skew-ps = <0>; | |
193 | txc-skew-ps = <1800>; | |
194 | txen-skew-ps = <0>; | |
195 | status = "okay"; | |
196 | }; | |
197 | ||
198 | /* Attach to an explicitly-specified PHY */ | |
4b405efb HC |
199 | mdio { |
200 | phy0: ethernet-phy@0 { | |
3ed14d8d | 201 | rxc-skew-ps = <1800>; |
4b405efb | 202 | rxdv-skew-ps = <0>; |
3ed14d8d | 203 | txc-skew-ps = <1800>; |
4b405efb HC |
204 | txen-skew-ps = <0>; |
205 | reg = <0>; | |
206 | }; | |
207 | }; | |
208 | ethernet@70000 { | |
4b405efb HC |
209 | phy = <&phy0>; |
210 | phy-mode = "rgmii-id"; | |
211 | }; | |
3ed14d8d DN |
212 | |
213 | References | |
214 | ||
215 | Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014. | |
216 | http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf | |
217 | ||
218 | Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014. | |
219 | http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf | |
220 | ||
221 | Notes: | |
222 | ||
223 | Note that a previous version of the Micrel ksz9021rl/rn Data Sheet | |
224 | was missing extended register 106 (transmit data pad skews), and | |
225 | incorrectly specified the ps per step as 200ps/step instead of | |
226 | 120ps/step. The latest update to this document reflects the latest | |
227 | revision of the Micrel specification even though usage in the kernel | |
228 | still reflects that incorrect document. |