Merge tag 'for-f2fs-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk...
[linux-2.6-block.git] / Documentation / devicetree / bindings / net / hisilicon-hip04-net.txt
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1Hisilicon hip04 Ethernet Controller
2
3* Ethernet controller node
4
5Required properties:
6- compatible: should be "hisilicon,hip04-mac".
7- reg: address and length of the register set for the device.
8- interrupts: interrupt for the device.
9- port-handle: <phandle port channel>
10 phandle, specifies a reference to the syscon ppe node
11 port, port number connected to the controller
12 channel, recv channel start from channel * number (RX_DESC_NUM)
13- phy-mode: see ethernet.txt [1].
14
15Optional properties:
16- phy-handle: see ethernet.txt [1].
17
18[1] Documentation/devicetree/bindings/net/ethernet.txt
19
20
21* Ethernet ppe node:
22Control rx & tx fifos of all ethernet controllers.
23Have 2048 recv channels shared by all ethernet controllers, only if no overlap.
24Each controller's recv channel start from channel * number (RX_DESC_NUM).
25
26Required properties:
27- compatible: "hisilicon,hip04-ppe", "syscon".
28- reg: address and length of the register set for the device.
29
30
31* MDIO bus node:
32
33Required properties:
34
fc7e37c6 35- compatible: should be "hisilicon,mdio".
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36- Inherits from MDIO bus node binding [2]
37[2] Documentation/devicetree/bindings/net/phy.txt
38
39Example:
40 mdio {
fc7e37c6 41 compatible = "hisilicon,mdio";
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42 reg = <0x28f1000 0x1000>;
43 #address-cells = <1>;
44 #size-cells = <0>;
45
46 phy0: ethernet-phy@0 {
47 compatible = "ethernet-phy-ieee802.3-c22";
48 reg = <0>;
49 marvell,reg-init = <18 0x14 0 0x8001>;
50 };
51
52 phy1: ethernet-phy@1 {
53 compatible = "ethernet-phy-ieee802.3-c22";
54 reg = <1>;
55 marvell,reg-init = <18 0x14 0 0x8001>;
56 };
57 };
58
59 ppe: ppe@28c0000 {
60 compatible = "hisilicon,hip04-ppe", "syscon";
61 reg = <0x28c0000 0x10000>;
62 };
63
64 fe: ethernet@28b0000 {
65 compatible = "hisilicon,hip04-mac";
66 reg = <0x28b0000 0x10000>;
67 interrupts = <0 413 4>;
68 phy-mode = "mii";
69 port-handle = <&ppe 31 0>;
70 };
71
72 ge0: ethernet@2800000 {
73 compatible = "hisilicon,hip04-mac";
74 reg = <0x2800000 0x10000>;
75 interrupts = <0 402 4>;
76 phy-mode = "sgmii";
77 port-handle = <&ppe 0 1>;
78 phy-handle = <&phy0>;
79 };
80
81 ge8: ethernet@2880000 {
82 compatible = "hisilicon,hip04-mac";
83 reg = <0x2880000 0x10000>;
84 interrupts = <0 410 4>;
85 phy-mode = "sgmii";
86 port-handle = <&ppe 8 2>;
87 phy-handle = <&phy1>;
88 };