Merge tag 'block-6.1-2022-10-20' of git://git.kernel.dk/linux
[linux-block.git] / Documentation / devicetree / bindings / mtd / arm,pl353-nand-r2p1.yaml
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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/arm,pl353-nand-r2p1.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
dd3cb467 7title: PL353 NAND Controller
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8
9allOf:
10 - $ref: "nand-controller.yaml"
11
12maintainers:
13 - Miquel Raynal <miquel.raynal@bootlin.com>
14 - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
15
16properties:
17 compatible:
18 items:
19 - const: arm,pl353-nand-r2p1
20
21 reg:
22 items:
23 - items:
24 - description: CS with regard to the parent ranges property
25 - description: Offset of the memory region requested by the device
26 - description: Length of the memory region requested by the device
27
28required:
29 - compatible
30 - reg
31
32unevaluatedProperties: false
33
34examples:
35 - |
36 smcc: memory-controller@e000e000 {
37 compatible = "arm,pl353-smc-r2p1", "arm,primecell";
38 reg = <0xe000e000 0x0001000>;
39 clock-names = "memclk", "apb_pclk";
40 clocks = <&clkc 11>, <&clkc 44>;
41 ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
42 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
43 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
44 #address-cells = <2>;
45 #size-cells = <1>;
46
47 nfc0: nand-controller@0,0 {
48 compatible = "arm,pl353-nand-r2p1";
49 reg = <0 0 0x1000000>;
50 #address-cells = <1>;
51 #size-cells = <0>;
52 };
53 };