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275173b2 GL |
1 | * NVIDIA Tegra Secure Digital Host Controller |
2 | ||
3 | This controller on Tegra family SoCs provides an interface for MMC, SD, | |
4 | and SDIO types of memory cards. | |
5 | ||
4efafee0 CB |
6 | This file documents differences between the core properties described |
7 | by mmc.txt and the properties used by the sdhci-tegra driver. | |
8 | ||
275173b2 | 9 | Required properties: |
193c9d23 PW |
10 | - compatible : For Tegra20, must contain "nvidia,tegra20-sdhci". |
11 | For Tegra30, must contain "nvidia,tegra30-sdhci". For Tegra114, | |
12 | must contain "nvidia,tegra114-sdhci". For Tegra124, must contain | |
13 | "nvidia,tegra124-sdhci". Otherwise, must contain "nvidia,<chip>-sdhci", | |
14 | plus one of the above, where <chip> is tegra132 or tegra210. | |
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15 | - clocks : Must contain one entry, for the module clock. |
16 | See ../clocks/clock-bindings.txt for details. | |
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17 | - resets : Must contain an entry for each entry in reset-names. |
18 | See ../reset/reset.txt for details. | |
19 | - reset-names : Must include the following entries: | |
20 | - sdhci | |
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21 | |
22 | Optional properties: | |
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23 | - power-gpios : Specify GPIOs for power control |
24 | ||
25 | Example: | |
26 | ||
27 | sdhci@c8000200 { | |
28 | compatible = "nvidia,tegra20-sdhci"; | |
29 | reg = <0xc8000200 0x200>; | |
30 | interrupts = <47>; | |
d8f64797 | 31 | clocks = <&tegra_car 14>; |
07999587 SW |
32 | resets = <&tegra_car 14>; |
33 | reset-names = "sdhci"; | |
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34 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
35 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | |
36 | power-gpios = <&gpio 155 0>; /* gpio PT3 */ | |
7f217794 | 37 | bus-width = <8>; |
275173b2 | 38 | }; |