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a5565a21 BS |
1 | * Freescale Management Complex |
2 | ||
3 | The Freescale Management Complex (fsl-mc) is a hardware resource | |
4 | manager that manages specialized hardware objects used in | |
5 | network-oriented packet processing applications. After the fsl-mc | |
6 | block is enabled, pools of hardware resources are available, such as | |
7 | queues, buffer pools, I/O interfaces. These resources are building | |
8 | blocks that can be used to create functional hardware objects/devices | |
9 | such as network interfaces, crypto accelerator instances, L2 switches, | |
10 | etc. | |
11 | ||
c9d8d661 NG |
12 | For an overview of the DPAA2 architecture and fsl-mc bus see: |
13 | Documentation/networking/dpaa2/overview.rst | |
14 | ||
15 | As described in the above overview, all DPAA2 objects in a DPRC share the | |
16 | same hardware "isolation context" and a 10-bit value called an ICID | |
17 | (isolation context id) is expressed by the hardware to identify | |
18 | the requester. | |
19 | ||
20 | The generic 'iommus' property is insufficient to describe the relationship | |
21 | between ICIDs and IOMMUs, so an iommu-map property is used to define | |
22 | the set of possible ICIDs under a root DPRC and how they map to | |
23 | an IOMMU. | |
24 | ||
25 | For generic IOMMU bindings, see | |
26 | Documentation/devicetree/bindings/iommu/iommu.txt. | |
27 | ||
28 | For arm-smmu binding, see: | |
29 | Documentation/devicetree/bindings/iommu/arm,smmu.txt. | |
30 | ||
a5565a21 BS |
31 | Required properties: |
32 | ||
33 | - compatible | |
34 | Value type: <string> | |
35 | Definition: Must be "fsl,qoriq-mc". A Freescale Management Complex | |
36 | compatible with this binding must have Block Revision | |
37 | Registers BRR1 and BRR2 at offset 0x0BF8 and 0x0BFC in | |
38 | the MC control register region. | |
39 | ||
40 | - reg | |
41 | Value type: <prop-encoded-array> | |
42 | Definition: A standard property. Specifies one or two regions | |
43 | defining the MC's registers: | |
44 | ||
45 | -the first region is the command portal for the | |
46 | this machine and must always be present | |
47 | ||
48 | -the second region is the MC control registers. This | |
49 | region may not be present in some scenarios, such | |
50 | as in the device tree presented to a virtual machine. | |
51 | ||
85222403 SY |
52 | - msi-parent |
53 | Value type: <phandle> | |
54 | Definition: Must be present and point to the MSI controller node | |
55 | handling message interrupts for the MC. | |
56 | ||
57 | - ranges | |
58 | Value type: <prop-encoded-array> | |
59 | Definition: A standard property. Defines the mapping between the child | |
60 | MC address space and the parent system address space. | |
61 | ||
62 | The MC address space is defined by 3 components: | |
63 | <region type> <offset hi> <offset lo> | |
64 | ||
65 | Valid values for region type are | |
66 | 0x0 - MC portals | |
67 | 0x1 - QBMAN portals | |
68 | ||
69 | - #address-cells | |
70 | Value type: <u32> | |
71 | Definition: Must be 3. (see definition in 'ranges' property) | |
72 | ||
73 | - #size-cells | |
74 | Value type: <u32> | |
75 | Definition: Must be 1. | |
76 | ||
77 | Sub-nodes: | |
78 | ||
79 | The fsl-mc node may optionally have dpmac sub-nodes that describe | |
80 | the relationship between the Ethernet MACs which belong to the MC | |
81 | and the Ethernet PHYs on the system board. | |
82 | ||
83 | The dpmac nodes must be under a node named "dpmacs" which contains | |
84 | the following properties: | |
85 | ||
86 | - #address-cells | |
87 | Value type: <u32> | |
88 | Definition: Must be present if dpmac sub-nodes are defined and must | |
89 | have a value of 1. | |
90 | ||
91 | - #size-cells | |
92 | Value type: <u32> | |
93 | Definition: Must be present if dpmac sub-nodes are defined and must | |
94 | have a value of 0. | |
95 | ||
96 | These nodes must have the following properties: | |
97 | ||
98 | - compatible | |
99 | Value type: <string> | |
100 | Definition: Must be "fsl,qoriq-mc-dpmac". | |
101 | ||
102 | - reg | |
103 | Value type: <prop-encoded-array> | |
104 | Definition: Specifies the id of the dpmac. | |
105 | ||
106 | - phy-handle | |
107 | Value type: <phandle> | |
108 | Definition: Specifies the phandle to the PHY device node associated | |
109 | with the this dpmac. | |
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110 | Optional properties: |
111 | ||
112 | - iommu-map: Maps an ICID to an IOMMU and associated iommu-specifier | |
113 | data. | |
114 | ||
115 | The property is an arbitrary number of tuples of | |
116 | (icid-base,iommu,iommu-base,length). | |
117 | ||
118 | Any ICID i in the interval [icid-base, icid-base + length) is | |
119 | associated with the listed IOMMU, with the iommu-specifier | |
120 | (i - icid-base + iommu-base). | |
85222403 | 121 | |
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122 | Example: |
123 | ||
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124 | smmu: iommu@5000000 { |
125 | compatible = "arm,mmu-500"; | |
126 | #iommu-cells = <1>; | |
127 | stream-match-mask = <0x7C00>; | |
128 | ... | |
129 | }; | |
130 | ||
a5565a21 BS |
131 | fsl_mc: fsl-mc@80c000000 { |
132 | compatible = "fsl,qoriq-mc"; | |
133 | reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ | |
134 | <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ | |
85222403 | 135 | msi-parent = <&its>; |
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136 | /* define map for ICIDs 23-64 */ |
137 | iommu-map = <23 &smmu 23 41>; | |
85222403 SY |
138 | #address-cells = <3>; |
139 | #size-cells = <1>; | |
140 | ||
141 | /* | |
142 | * Region type 0x0 - MC portals | |
143 | * Region type 0x1 - QBMAN portals | |
144 | */ | |
145 | ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000 | |
146 | 0x1 0x0 0x0 0x8 0x18000000 0x8000000>; | |
a5565a21 | 147 | |
85222403 SY |
148 | dpmacs { |
149 | #address-cells = <1>; | |
150 | #size-cells = <0>; | |
151 | ||
152 | dpmac@1 { | |
153 | compatible = "fsl,qoriq-mc-dpmac"; | |
154 | reg = <1>; | |
155 | phy-handle = <&mdio0_phy0>; | |
156 | } | |
157 | } | |
158 | }; |