Commit | Line | Data |
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dcc7310e JC |
1 | MIPS CPU interrupt controller |
2 | ||
afe8dc25 | 3 | On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU |
dcc7310e JC |
4 | IRQs from a devicetree file and create a irq_domain for IRQ controller. |
5 | ||
6 | With the irq_domain in place we can describe how the 8 IRQs are wired to the | |
7 | platforms internal interrupt controller cascade. | |
8 | ||
9 | Below is an example of a platform describing the cascade inside the devicetree | |
10 | and the code used to load it inside arch_init_irq(). | |
11 | ||
12 | Required properties: | |
13 | - compatible : Should be "mti,cpu-interrupt-controller" | |
14 | ||
15 | Example devicetree: | |
5214cae7 | 16 | cpu-irq: cpu-irq { |
dcc7310e JC |
17 | #address-cells = <0>; |
18 | ||
19 | interrupt-controller; | |
20 | #interrupt-cells = <1>; | |
21 | ||
22 | compatible = "mti,cpu-interrupt-controller"; | |
23 | }; | |
24 | ||
25 | intc: intc@200 { | |
26 | compatible = "ralink,rt2880-intc"; | |
27 | reg = <0x200 0x100>; | |
28 | ||
29 | interrupt-controller; | |
30 | #interrupt-cells = <1>; | |
31 | ||
32 | interrupt-parent = <&cpu-irq>; | |
33 | interrupts = <2>; | |
34 | }; | |
35 | ||
36 | ||
37 | Example platform irq.c: | |
38 | static struct of_device_id __initdata of_irq_ids[] = { | |
afe8dc25 | 39 | { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init }, |
dcc7310e JC |
40 | { .compatible = "ralink,rt2880-intc", .data = intc_of_init }, |
41 | {}, | |
42 | }; | |
43 | ||
44 | void __init arch_init_irq(void) | |
45 | { | |
46 | of_irq_init(of_irq_ids); | |
47 | } |