[linux-2.6-block.git] / Documentation / devicetree / bindings / marvell.txt

Marvell Discovery mv64[345]6x System Controller chips
===========================================================

The Marvell mv64[345]60 series of system controller chips contain
many of the peripherals needed to implement a complete computer
system.  In this section, we define device tree nodes to describe
the system controller chip itself and each of the peripherals
which it contains.  Compatible string values for each node are
prefixed with the string "marvell,", for Marvell Technology Group Ltd.

1) The /system-controller node

  This node is used to represent the system-controller and must be
  present when the system uses a system controller chip. The top-level
  system-controller node contains information that is global to all
  devices within the system controller chip. The node name begins
  with "system-controller" followed by the unit address, which is
  the base address of the memory-mapped register set for the system
  controller chip.

  Required properties:

    - ranges : Describes the translation of system controller addresses
      for memory mapped registers.
    - clock-frequency: Contains the main clock frequency for the system
      controller chip.
    - reg : This property defines the address and size of the
      memory-mapped registers contained within the system controller
      chip.  The address specified in the "reg" property should match
      the unit address of the system-controller node.
    - #address-cells : Address representation for system controller
      devices.  This field represents the number of cells needed to
      represent the address of the memory-mapped registers of devices
      within the system controller chip.
    - #size-cells : Size representation for the memory-mapped
      registers within the system controller chip.
    - #interrupt-cells : Defines the width of cells used to represent
      interrupts.

  Optional properties:

    - model : The specific model of the system controller chip.  Such
      as, "mv64360", "mv64460", or "mv64560".
    - compatible : A string identifying the compatibility identifiers
      of the system controller chip.

  The system-controller node contains child nodes for each system
  controller device that the platform uses.  Nodes should not be created
  for devices which exist on the system controller chip but are not used

  Example Marvell Discovery mv64360 system-controller node:

    system-controller@f1000000 { /* Marvell Discovery mv64360 */
	    #address-cells = <1>;
	    #size-cells = <1>;
	    model = "mv64360";                      /* Default */
	    compatible = "marvell,mv64360";
	    clock-frequency = <133333333>;
	    reg = <0xf1000000 0x10000>;
	    virtual-reg = <0xf1000000>;
	    ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
		    0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
		    0xa0000000 0xa0000000 0x4000000 /* User FLASH */
		    0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
		    0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */

	    [ child node definitions... ]
    }

2) Child nodes of /system-controller

   a) Marvell Discovery MDIO bus

   The MDIO is a bus to which the PHY devices are connected.  For each
   device that exists on this bus, a child node should be created.  See
   the definition of the PHY node below for an example of how to define
   a PHY.

   Required properties:
     - #address-cells : Should be <1>
     - #size-cells : Should be <0>
     - device_type : Should be "mdio"
     - compatible : Should be "marvell,mv64360-mdio"

   Example:

     mdio {
	     #address-cells = <1>;
	     #size-cells = <0>;
	     device_type = "mdio";
	     compatible = "marvell,mv64360-mdio";

	     ethernet-phy@0 {
		     ......
	     };
     };


   b) Marvell Discovery ethernet controller

   The Discover ethernet controller is described with two levels
   of nodes.  The first level describes an ethernet silicon block
   and the second level describes up to 3 ethernet nodes within
   that block.  The reason for the multiple levels is that the
   registers for the node are interleaved within a single set
   of registers.  The "ethernet-block" level describes the
   shared register set, and the "ethernet" nodes describe ethernet
   port-specific properties.

   Ethernet block node

   Required properties:
     - #address-cells : <1>
     - #size-cells : <0>
     - compatible : "marvell,mv64360-eth-block"
     - reg : Offset and length of the register set for this block

   Example Discovery Ethernet block node:
     ethernet-block@2000 {
	     #address-cells = <1>;
	     #size-cells = <0>;
	     compatible = "marvell,mv64360-eth-block";
	     reg = <0x2000 0x2000>;
	     ethernet@0 {
		     .......
	     };
     };

   Ethernet port node

   Required properties:
     - device_type : Should be "network".
     - compatible : Should be "marvell,mv64360-eth".
     - reg : Should be <0>, <1>, or <2>, according to which registers
       within the silicon block the device uses.
     - interrupts : <a> where a is the interrupt number for the port.
     - interrupt-parent : the phandle for the interrupt controller
       that services interrupts for this device.
     - phy : the phandle for the PHY connected to this ethernet
       controller.
     - local-mac-address : 6 bytes, MAC address

   Example Discovery Ethernet port node:
     ethernet@0 {
	     device_type = "network";
	     compatible = "marvell,mv64360-eth";
	     reg = <0>;
	     interrupts = <32>;
	     interrupt-parent = <&PIC>;
	     phy = <&PHY0>;
	     local-mac-address = [ 00 00 00 00 00 00 ];
     };


   c) Marvell Discovery PHY nodes

   Required properties:
     - device_type : Should be "ethernet-phy"
     - interrupts : <a> where a is the interrupt number for this phy.
     - interrupt-parent : the phandle for the interrupt controller that
       services interrupts for this device.
     - reg : The ID number for the phy, usually a small integer

   Example Discovery PHY node:
     ethernet-phy@1 {
	     device_type = "ethernet-phy";
	     compatible = "broadcom,bcm5421";
	     interrupts = <76>;      /* GPP 12 */
	     interrupt-parent = <&PIC>;
	     reg = <1>;
     };


   d) Marvell Discovery SDMA nodes

   Represent DMA hardware associated with the MPSC (multiprotocol
   serial controllers).

   Required properties:
     - compatible : "marvell,mv64360-sdma"
     - reg : Offset and length of the register set for this device
     - interrupts : <a> where a is the interrupt number for the DMA
       device.
     - interrupt-parent : the phandle for the interrupt controller
       that services interrupts for this device.

   Example Discovery SDMA node:
     sdma@4000 {
	     compatible = "marvell,mv64360-sdma";
	     reg = <0x4000 0xc18>;
	     virtual-reg = <0xf1004000>;
	     interrupts = <36>;
	     interrupt-parent = <&PIC>;
     };


   e) Marvell Discovery BRG nodes

   Represent baud rate generator hardware associated with the MPSC
   (multiprotocol serial controllers).

   Required properties:
     - compatible : "marvell,mv64360-brg"
     - reg : Offset and length of the register set for this device
     - clock-src : A value from 0 to 15 which selects the clock
       source for the baud rate generator.  This value corresponds
       to the CLKS value in the BRGx configuration register.  See
       the mv64x60 User's Manual.
     - clock-frequence : The frequency (in Hz) of the baud rate
       generator's input clock.
     - current-speed : The current speed setting (presumably by
       firmware) of the baud rate generator.

   Example Discovery BRG node:
     brg@b200 {
	     compatible = "marvell,mv64360-brg";
	     reg = <0xb200 0x8>;
	     clock-src = <8>;
	     clock-frequency = <133333333>;
	     current-speed = <9600>;
     };


   f) Marvell Discovery CUNIT nodes

   Represent the Serial Communications Unit device hardware.

   Required properties:
     - reg : Offset and length of the register set for this device

   Example Discovery CUNIT node:
     cunit@f200 {
	     reg = <0xf200 0x200>;
     };


   g) Marvell Discovery MPSCROUTING nodes

   Represent the Discovery's MPSC routing hardware

   Required properties:
     - reg : Offset and length of the register set for this device

   Example Discovery CUNIT node:
     mpscrouting@b500 {
	     reg = <0xb400 0xc>;
     };


   h) Marvell Discovery MPSCINTR nodes

   Represent the Discovery's MPSC DMA interrupt hardware registers
   (SDMA cause and mask registers).

   Required properties:
     - reg : Offset and length of the register set for this device

   Example Discovery MPSCINTR node:
     mpsintr@b800 {
	     reg = <0xb800 0x100>;
     };


   i) Marvell Discovery MPSC nodes

   Represent the Discovery's MPSC (Multiprotocol Serial Controller)
   serial port.

   Required properties:
     - device_type : "serial"
     - compatible : "marvell,mv64360-mpsc"
     - reg : Offset and length of the register set for this device
     - sdma : the phandle for the SDMA node used by this port
     - brg : the phandle for the BRG node used by this port
     - cunit : the phandle for the CUNIT node used by this port
     - mpscrouting : the phandle for the MPSCROUTING node used by this port
     - mpscintr : the phandle for the MPSCINTR node used by this port
     - cell-index : the hardware index of this cell in the MPSC core
     - max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
       register
     - interrupts : <a> where a is the interrupt number for the MPSC.
     - interrupt-parent : the phandle for the interrupt controller
       that services interrupts for this device.

   Example Discovery MPSCINTR node:
     mpsc@8000 {
	     device_type = "serial";
	     compatible = "marvell,mv64360-mpsc";
	     reg = <0x8000 0x38>;
	     virtual-reg = <0xf1008000>;
	     sdma = <&SDMA0>;
	     brg = <&BRG0>;
	     cunit = <&CUNIT>;
	     mpscrouting = <&MPSCROUTING>;
	     mpscintr = <&MPSCINTR>;
	     cell-index = <0>;
	     max_idle = <40>;
	     interrupts = <40>;
	     interrupt-parent = <&PIC>;
     };


   j) Marvell Discovery Watch Dog Timer nodes

   Represent the Discovery's watchdog timer hardware

   Required properties:
     - compatible : "marvell,mv64360-wdt"
     - reg : Offset and length of the register set for this device

   Example Discovery Watch Dog Timer node:
     wdt@b410 {
	     compatible = "marvell,mv64360-wdt";
	     reg = <0xb410 0x8>;
     };


   k) Marvell Discovery I2C nodes

   Represent the Discovery's I2C hardware

   Required properties:
     - device_type : "i2c"
     - compatible : "marvell,mv64360-i2c"
     - reg : Offset and length of the register set for this device
     - interrupts : <a> where a is the interrupt number for the I2C.
     - interrupt-parent : the phandle for the interrupt controller
       that services interrupts for this device.

   Example Discovery I2C node:
	     compatible = "marvell,mv64360-i2c";
	     reg = <0xc000 0x20>;
	     virtual-reg = <0xf100c000>;
	     interrupts = <37>;
	     interrupt-parent = <&PIC>;
     };


   l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes

   Represent the Discovery's PIC hardware

   Required properties:
     - #interrupt-cells : <1>
     - #address-cells : <0>
     - compatible : "marvell,mv64360-pic"
     - reg : Offset and length of the register set for this device
     - interrupt-controller

   Example Discovery PIC node:
     pic {
	     #interrupt-cells = <1>;
	     #address-cells = <0>;
	     compatible = "marvell,mv64360-pic";
	     reg = <0x0 0x88>;
	     interrupt-controller;
     };


   m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes

   Represent the Discovery's MPP hardware

   Required properties:
     - compatible : "marvell,mv64360-mpp"
     - reg : Offset and length of the register set for this device

   Example Discovery MPP node:
     mpp@f000 {
	     compatible = "marvell,mv64360-mpp";
	     reg = <0xf000 0x10>;
     };


   n) Marvell Discovery GPP (General Purpose Pins) nodes

   Represent the Discovery's GPP hardware

   Required properties:
     - compatible : "marvell,mv64360-gpp"
     - reg : Offset and length of the register set for this device

   Example Discovery GPP node:
     gpp@f000 {
	     compatible = "marvell,mv64360-gpp";
	     reg = <0xf100 0x20>;
     };


   o) Marvell Discovery PCI host bridge node

   Represents the Discovery's PCI host bridge device.  The properties
   for this node conform to Rev 2.1 of the PCI Bus Binding to IEEE
   1275-1994.  A typical value for the compatible property is
   "marvell,mv64360-pci".

   Example Discovery PCI host bridge node
     pci@80000000 {
	     #address-cells = <3>;
	     #size-cells = <2>;
	     #interrupt-cells = <1>;
	     device_type = "pci";
	     compatible = "marvell,mv64360-pci";
	     reg = <0xcf8 0x8>;
	     ranges = <0x01000000 0x0        0x0
			     0x88000000 0x0 0x01000000
		       0x02000000 0x0 0x80000000
			     0x80000000 0x0 0x08000000>;
	     bus-range = <0 255>;
	     clock-frequency = <66000000>;
	     interrupt-parent = <&PIC>;
	     interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
	     interrupt-map = <
		     /* IDSEL 0x0a */
		     0x5000 0 0 1 &PIC 80
		     0x5000 0 0 2 &PIC 81
		     0x5000 0 0 3 &PIC 91
		     0x5000 0 0 4 &PIC 93

		     /* IDSEL 0x0b */
		     0x5800 0 0 1 &PIC 91
		     0x5800 0 0 2 &PIC 93
		     0x5800 0 0 3 &PIC 80
		     0x5800 0 0 4 &PIC 81

		     /* IDSEL 0x0c */
		     0x6000 0 0 1 &PIC 91
		     0x6000 0 0 2 &PIC 93
		     0x6000 0 0 3 &PIC 80
		     0x6000 0 0 4 &PIC 81

		     /* IDSEL 0x0d */
		     0x6800 0 0 1 &PIC 93
		     0x6800 0 0 2 &PIC 80
		     0x6800 0 0 3 &PIC 81
		     0x6800 0 0 4 &PIC 91
	     >;
     };


   p) Marvell Discovery CPU Error nodes

   Represent the Discovery's CPU error handler device.

   Required properties:
     - compatible : "marvell,mv64360-cpu-error"
     - reg : Offset and length of the register set for this device
     - interrupts : the interrupt number for this device
     - interrupt-parent : the phandle for the interrupt controller
       that services interrupts for this device.

   Example Discovery CPU Error node:
     cpu-error@0070 {
	     compatible = "marvell,mv64360-cpu-error";
	     reg = <0x70 0x10 0x128 0x28>;
	     interrupts = <3>;
	     interrupt-parent = <&PIC>;
     };


   q) Marvell Discovery SRAM Controller nodes

   Represent the Discovery's SRAM controller device.

   Required properties:
     - compatible : "marvell,mv64360-sram-ctrl"
     - reg : Offset and length of the register set for this device
     - interrupts : the interrupt number for this device
     - interrupt-parent : the phandle for the interrupt controller
       that services interrupts for this device.

   Example Discovery SRAM Controller node:
     sram-ctrl@0380 {
	     compatible = "marvell,mv64360-sram-ctrl";
	     reg = <0x380 0x80>;
	     interrupts = <13>;
	     interrupt-parent = <&PIC>;
     };


   r) Marvell Discovery PCI Error Handler nodes

   Represent the Discovery's PCI error handler device.

   Required properties:
     - compatible : "marvell,mv64360-pci-error"
     - reg : Offset and length of the register set for this device
     - interrupts : the interrupt number for this device
     - interrupt-parent : the phandle for the interrupt controller
       that services interrupts for this device.

   Example Discovery PCI Error Handler node:
     pci-error@1d40 {
	     compatible = "marvell,mv64360-pci-error";
	     reg = <0x1d40 0x40 0xc28 0x4>;
	     interrupts = <12>;
	     interrupt-parent = <&PIC>;
     };


   s) Marvell Discovery Memory Controller nodes

   Represent the Discovery's memory controller device.

   Required properties:
     - compatible : "marvell,mv64360-mem-ctrl"
     - reg : Offset and length of the register set for this device
     - interrupts : the interrupt number for this device
     - interrupt-parent : the phandle for the interrupt controller
       that services interrupts for this device.

   Example Discovery Memory Controller node:
     mem-ctrl@1400 {
	     compatible = "marvell,mv64360-mem-ctrl";
	     reg = <0x1400 0x60>;
	     interrupts = <17>;
	     interrupt-parent = <&PIC>;
     };
Commit	Line	Data
b053dc5a KG	1	Marvell Discovery mv64[345]6x System Controller chips
	2	===========================================================
	3
	4	The Marvell mv64[345]60 series of system controller chips contain
	5	many of the peripherals needed to implement a complete computer
	6	system. In this section, we define device tree nodes to describe
	7	the system controller chip itself and each of the peripherals
	8	which it contains. Compatible string values for each node are
	9	prefixed with the string "marvell,", for Marvell Technology Group Ltd.
	10
	11	1) The /system-controller node
	12
	13	This node is used to represent the system-controller and must be
	14	present when the system uses a system controller chip. The top-level
	15	system-controller node contains information that is global to all
	16	devices within the system controller chip. The node name begins
	17	with "system-controller" followed by the unit address, which is
	18	the base address of the memory-mapped register set for the system
	19	controller chip.
	20
	21	Required properties:
	22
	23	- ranges : Describes the translation of system controller addresses
	24	for memory mapped registers.
	25	- clock-frequency: Contains the main clock frequency for the system
	26	controller chip.
	27	- reg : This property defines the address and size of the
	28	memory-mapped registers contained within the system controller
	29	chip. The address specified in the "reg" property should match
	30	the unit address of the system-controller node.
	31	- #address-cells : Address representation for system controller
	32	devices. This field represents the number of cells needed to
	33	represent the address of the memory-mapped registers of devices
	34	within the system controller chip.
411c9403	35	- #size-cells : Size representation for the memory-mapped
b053dc5a KG	36	registers within the system controller chip.
	37	- #interrupt-cells : Defines the width of cells used to represent
	38	interrupts.
	39
	40	Optional properties:
	41
	42	- model : The specific model of the system controller chip. Such
	43	as, "mv64360", "mv64460", or "mv64560".
	44	- compatible : A string identifying the compatibility identifiers
	45	of the system controller chip.
	46
	47	The system-controller node contains child nodes for each system
	48	controller device that the platform uses. Nodes should not be created
	49	for devices which exist on the system controller chip but are not used
	50
	51	Example Marvell Discovery mv64360 system-controller node:
	52
	53	system-controller@f1000000 { /* Marvell Discovery mv64360 */
	54	#address-cells = <1>;
	55	#size-cells = <1>;
	56	model = "mv64360"; /* Default */
	57	compatible = "marvell,mv64360";
	58	clock-frequency = <133333333>;
	59	reg = <0xf1000000 0x10000>;
	60	virtual-reg = <0xf1000000>;
	61	ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
	62	0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
	63	0xa0000000 0xa0000000 0x4000000 /* User FLASH */
	64	0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
	65	0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
	66
	67	[ child node definitions... ]
	68	}
	69
	70	2) Child nodes of /system-controller
	71
	72	a) Marvell Discovery MDIO bus
	73
	74	The MDIO is a bus to which the PHY devices are connected. For each
	75	device that exists on this bus, a child node should be created. See
	76	the definition of the PHY node below for an example of how to define
	77	a PHY.
	78
	79	Required properties:
	80	- #address-cells : Should be <1>
	81	- #size-cells : Should be <0>
	82	- device_type : Should be "mdio"
	83	- compatible : Should be "marvell,mv64360-mdio"
	84
	85	Example:
	86
	87	mdio {
	88	#address-cells = <1>;
	89	#size-cells = <0>;
	90	device_type = "mdio";
	91	compatible = "marvell,mv64360-mdio";
	92
	93	ethernet-phy@0 {
	94	......
	95	};
	96	};
	97
	98
	99	b) Marvell Discovery ethernet controller
100
101	The Discover ethernet controller is described with two levels
102	of nodes. The first level describes an ethernet silicon block
103	and the second level describes up to 3 ethernet nodes within
104	that block. The reason for the multiple levels is that the
105	registers for the node are interleaved within a single set
106	of registers. The "ethernet-block" level describes the
107	shared register set, and the "ethernet" nodes describe ethernet
108	port-specific properties.
109
110	Ethernet block node
111
112	Required properties:
113	- #address-cells : <1>
114	- #size-cells : <0>
115	- compatible : "marvell,mv64360-eth-block"
116	- reg : Offset and length of the register set for this block
117
118	Example Discovery Ethernet block node:
119	ethernet-block@2000 {
120	#address-cells = <1>;
121	#size-cells = <0>;
122	compatible = "marvell,mv64360-eth-block";
123	reg = <0x2000 0x2000>;
124	ethernet@0 {
125	.......
126	};
127	};
128
129	Ethernet port node
130
131	Required properties:
132	- device_type : Should be "network".
133	- compatible : Should be "marvell,mv64360-eth".
134	- reg : Should be <0>, <1>, or <2>, according to which registers
135	within the silicon block the device uses.
136	- interrupts : <a> where a is the interrupt number for the port.
137	- interrupt-parent : the phandle for the interrupt controller
138	that services interrupts for this device.
139	- phy : the phandle for the PHY connected to this ethernet
140	controller.
141	- local-mac-address : 6 bytes, MAC address
142
143	Example Discovery Ethernet port node:
144	ethernet@0 {
145	device_type = "network";
146	compatible = "marvell,mv64360-eth";
147	reg = <0>;
148	interrupts = <32>;
149	interrupt-parent = <&PIC>;
150	phy = <&PHY0>;
151	local-mac-address = [ 00 00 00 00 00 00 ];
152	};
153
154
155
156	c) Marvell Discovery PHY nodes
157
158	Required properties:
159	- device_type : Should be "ethernet-phy"
160	- interrupts : <a> where a is the interrupt number for this phy.
161	- interrupt-parent : the phandle for the interrupt controller that
162	services interrupts for this device.
163	- reg : The ID number for the phy, usually a small integer
164
165	Example Discovery PHY node:
166	ethernet-phy@1 {
167	device_type = "ethernet-phy";
168	compatible = "broadcom,bcm5421";
169	interrupts = <76>; /* GPP 12 */
170	interrupt-parent = <&PIC>;
171	reg = <1>;
172	};
173
174
175	d) Marvell Discovery SDMA nodes
176
177	Represent DMA hardware associated with the MPSC (multiprotocol
178	serial controllers).
179
180	Required properties:
181	- compatible : "marvell,mv64360-sdma"
182	- reg : Offset and length of the register set for this device
183	- interrupts : <a> where a is the interrupt number for the DMA
184	device.
185	- interrupt-parent : the phandle for the interrupt controller
186	that services interrupts for this device.
187
188	Example Discovery SDMA node:
189	sdma@4000 {
190	compatible = "marvell,mv64360-sdma";
191	reg = <0x4000 0xc18>;
192	virtual-reg = <0xf1004000>;
193	interrupts = <36>;
194	interrupt-parent = <&PIC>;
195	};
196
197
198	e) Marvell Discovery BRG nodes
199
200	Represent baud rate generator hardware associated with the MPSC
201	(multiprotocol serial controllers).
202
203	Required properties:
204	- compatible : "marvell,mv64360-brg"
205	- reg : Offset and length of the register set for this device
206	- clock-src : A value from 0 to 15 which selects the clock
207	source for the baud rate generator. This value corresponds
208	to the CLKS value in the BRGx configuration register. See
209	the mv64x60 User's Manual.
210	- clock-frequence : The frequency (in Hz) of the baud rate
211	generator's input clock.
212	- current-speed : The current speed setting (presumably by
213	firmware) of the baud rate generator.
214
215	Example Discovery BRG node:
216	brg@b200 {
217	compatible = "marvell,mv64360-brg";
218	reg = <0xb200 0x8>;
219	clock-src = <8>;
220	clock-frequency = <133333333>;
221	current-speed = <9600>;
222	};
223
224
225	f) Marvell Discovery CUNIT nodes
226
227	Represent the Serial Communications Unit device hardware.
228
229	Required properties:
230	- reg : Offset and length of the register set for this device
231
232	Example Discovery CUNIT node:
233	cunit@f200 {
234	reg = <0xf200 0x200>;
235	};
236
237
238	g) Marvell Discovery MPSCROUTING nodes
239
240	Represent the Discovery's MPSC routing hardware
241
242	Required properties:
243	- reg : Offset and length of the register set for this device
244
245	Example Discovery CUNIT node:
246	mpscrouting@b500 {
247	reg = <0xb400 0xc>;
248	};
249
250
251	h) Marvell Discovery MPSCINTR nodes
252
253	Represent the Discovery's MPSC DMA interrupt hardware registers
254	(SDMA cause and mask registers).
255
256	Required properties:
257	- reg : Offset and length of the register set for this device
258
259	Example Discovery MPSCINTR node:
260	mpsintr@b800 {
261	reg = <0xb800 0x100>;
262	};
263
264
265	i) Marvell Discovery MPSC nodes
266
267	Represent the Discovery's MPSC (Multiprotocol Serial Controller)
268	serial port.
269
270	Required properties:
271	- device_type : "serial"
272	- compatible : "marvell,mv64360-mpsc"
273	- reg : Offset and length of the register set for this device
274	- sdma : the phandle for the SDMA node used by this port
275	- brg : the phandle for the BRG node used by this port
276	- cunit : the phandle for the CUNIT node used by this port
277	- mpscrouting : the phandle for the MPSCROUTING node used by this port
278	- mpscintr : the phandle for the MPSCINTR node used by this port
279	- cell-index : the hardware index of this cell in the MPSC core
280	- max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
281	register
282	- interrupts : <a> where a is the interrupt number for the MPSC.
283	- interrupt-parent : the phandle for the interrupt controller
284	that services interrupts for this device.
285
286	Example Discovery MPSCINTR node:
287	mpsc@8000 {
288	device_type = "serial";
289	compatible = "marvell,mv64360-mpsc";
290	reg = <0x8000 0x38>;
291	virtual-reg = <0xf1008000>;
292	sdma = <&SDMA0>;
293	brg = <&BRG0>;
294	cunit = <&CUNIT>;
295	mpscrouting = <&MPSCROUTING>;
296	mpscintr = <&MPSCINTR>;
297	cell-index = <0>;
298	max_idle = <40>;
299	interrupts = <40>;
300	interrupt-parent = <&PIC>;
301	};
302
303
304	j) Marvell Discovery Watch Dog Timer nodes
305
306	Represent the Discovery's watchdog timer hardware
307
308	Required properties:
309	- compatible : "marvell,mv64360-wdt"
310	- reg : Offset and length of the register set for this device
311
312	Example Discovery Watch Dog Timer node:
313	wdt@b410 {
314	compatible = "marvell,mv64360-wdt";
315	reg = <0xb410 0x8>;
316	};
317
318
319	k) Marvell Discovery I2C nodes
320
321	Represent the Discovery's I2C hardware
322
323	Required properties:
324	- device_type : "i2c"
325	- compatible : "marvell,mv64360-i2c"
326	- reg : Offset and length of the register set for this device
327	- interrupts : <a> where a is the interrupt number for the I2C.
328	- interrupt-parent : the phandle for the interrupt controller
329	that services interrupts for this device.
330
331	Example Discovery I2C node:
332	compatible = "marvell,mv64360-i2c";
333	reg = <0xc000 0x20>;
334	virtual-reg = <0xf100c000>;
335	interrupts = <37>;
336	interrupt-parent = <&PIC>;
337	};
338
339
340	l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
341
342	Represent the Discovery's PIC hardware
343
344	Required properties:
345	- #interrupt-cells : <1>
346	- #address-cells : <0>
347	- compatible : "marvell,mv64360-pic"
348	- reg : Offset and length of the register set for this device
349	- interrupt-controller
350
351	Example Discovery PIC node:
352	pic {
353	#interrupt-cells = <1>;
354	#address-cells = <0>;
355	compatible = "marvell,mv64360-pic";
356	reg = <0x0 0x88>;
357	interrupt-controller;
358	};
359
360
361	m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
362
363	Represent the Discovery's MPP hardware
364
365	Required properties:
366	- compatible : "marvell,mv64360-mpp"
367	- reg : Offset and length of the register set for this device
368
369	Example Discovery MPP node:
370	mpp@f000 {
371	compatible = "marvell,mv64360-mpp";
372	reg = <0xf000 0x10>;
373	};
374
375
376	n) Marvell Discovery GPP (General Purpose Pins) nodes
377
378	Represent the Discovery's GPP hardware
379
380	Required properties:
381	- compatible : "marvell,mv64360-gpp"
382	- reg : Offset and length of the register set for this device
383
384	Example Discovery GPP node:
385	gpp@f000 {
386	compatible = "marvell,mv64360-gpp";
387	reg = <0xf100 0x20>;
388	};
389
390
391	o) Marvell Discovery PCI host bridge node
392
393	Represents the Discovery's PCI host bridge device. The properties
394	for this node conform to Rev 2.1 of the PCI Bus Binding to IEEE
395	1275-1994. A typical value for the compatible property is
396	"marvell,mv64360-pci".
397
398	Example Discovery PCI host bridge node
399	pci@80000000 {
400	#address-cells = <3>;
401	#size-cells = <2>;
402	#interrupt-cells = <1>;
403	device_type = "pci";
404	compatible = "marvell,mv64360-pci";
405	reg = <0xcf8 0x8>;
406	ranges = <0x01000000 0x0 0x0
407	0x88000000 0x0 0x01000000
408	0x02000000 0x0 0x80000000
409	0x80000000 0x0 0x08000000>;
410	bus-range = <0 255>;
411	clock-frequency = <66000000>;
412	interrupt-parent = <&PIC>;
413	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
414	interrupt-map = <
415	/* IDSEL 0x0a */
416	0x5000 0 0 1 &PIC 80
417	0x5000 0 0 2 &PIC 81
418	0x5000 0 0 3 &PIC 91
419	0x5000 0 0 4 &PIC 93
420
421	/* IDSEL 0x0b */
422	0x5800 0 0 1 &PIC 91
423	0x5800 0 0 2 &PIC 93
424	0x5800 0 0 3 &PIC 80
425	0x5800 0 0 4 &PIC 81
426
427	/* IDSEL 0x0c */
428	0x6000 0 0 1 &PIC 91
429	0x6000 0 0 2 &PIC 93
430	0x6000 0 0 3 &PIC 80
431	0x6000 0 0 4 &PIC 81
432
433	/* IDSEL 0x0d */
434	0x6800 0 0 1 &PIC 93
435	0x6800 0 0 2 &PIC 80
436	0x6800 0 0 3 &PIC 81
437	0x6800 0 0 4 &PIC 91
438	>;
439	};
440
441
442	p) Marvell Discovery CPU Error nodes
443
444	Represent the Discovery's CPU error handler device.
445
446	Required properties:
447	- compatible : "marvell,mv64360-cpu-error"
448	- reg : Offset and length of the register set for this device
449	- interrupts : the interrupt number for this device
450	- interrupt-parent : the phandle for the interrupt controller
451	that services interrupts for this device.
452
453	Example Discovery CPU Error node:
454	cpu-error@0070 {
455	compatible = "marvell,mv64360-cpu-error";
456	reg = <0x70 0x10 0x128 0x28>;
457	interrupts = <3>;
458	interrupt-parent = <&PIC>;
459	};
460
461
462	q) Marvell Discovery SRAM Controller nodes
463
464	Represent the Discovery's SRAM controller device.
465
466	Required properties:
467	- compatible : "marvell,mv64360-sram-ctrl"
468	- reg : Offset and length of the register set for this device
469	- interrupts : the interrupt number for this device
470	- interrupt-parent : the phandle for the interrupt controller
471	that services interrupts for this device.
472
473	Example Discovery SRAM Controller node:
474	sram-ctrl@0380 {
475	compatible = "marvell,mv64360-sram-ctrl";
476	reg = <0x380 0x80>;
477	interrupts = <13>;
478	interrupt-parent = <&PIC>;
479	};
480
481
482	r) Marvell Discovery PCI Error Handler nodes
483
484	Represent the Discovery's PCI error handler device.
485
486	Required properties:
487	- compatible : "marvell,mv64360-pci-error"
488	- reg : Offset and length of the register set for this device
489	- interrupts : the interrupt number for this device
490	- interrupt-parent : the phandle for the interrupt controller
491	that services interrupts for this device.
492
493	Example Discovery PCI Error Handler node:
494	pci-error@1d40 {
495	compatible = "marvell,mv64360-pci-error";
496	reg = <0x1d40 0x40 0xc28 0x4>;
497	interrupts = <12>;
498	interrupt-parent = <&PIC>;
499	};
500
501
502	s) Marvell Discovery Memory Controller nodes
503
504	Represent the Discovery's memory controller device.
505
506	Required properties:
507	- compatible : "marvell,mv64360-mem-ctrl"
508	- reg : Offset and length of the register set for this device
509	- interrupts : the interrupt number for this device
510	- interrupt-parent : the phandle for the interrupt controller
511	that services interrupts for this device.
512
513	Example Discovery Memory Controller node:
514	mem-ctrl@1400 {
515	compatible = "marvell,mv64360-mem-ctrl";
516	reg = <0x1400 0x60>;
517	interrupts = <17>;
518	interrupt-parent = <&PIC>;
519	};
520
521