projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| d839e821 | 1 | * NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers |
| f5c42271 RS |
2 | |
| 3 | Required properties: | |
| d839e821 VZ |
4 | - compatible: "nxp,lpc3220-mic" or "nxp,lpc3220-sic". |
| 5 | - reg: should contain IC registers location and length. | |
| 6 | - interrupt-controller: identifies the node as an interrupt controller. | |
| 7 | - #interrupt-cells: the number of cells to define an interrupt, should be 2. | |
| 8 | The first cell is the IRQ number, the second cell is used to specify | |
| 9 | one of the supported IRQ types: | |
| 10 | IRQ_TYPE_EDGE_RISING = low-to-high edge triggered, | |
| 11 | IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered, | |
| 12 | IRQ_TYPE_LEVEL_HIGH = active high level-sensitive, | |
| 13 | IRQ_TYPE_LEVEL_LOW = active low level-sensitive. | |
| 14 | Reset value is IRQ_TYPE_LEVEL_LOW. | |
| 15 | ||
| 16 | Optional properties: | |
| 17 | - interrupt-parent: empty for MIC interrupt controller, link to parent | |
| 18 | MIC interrupt controller for SIC1 and SIC2 | |
| 19 | - interrupts: empty for MIC interrupt controller, cascaded MIC | |
| 20 | hardware interrupts for SIC1 and SIC2 | |
| f5c42271 RS |
21 | |
| 22 | Examples: | |
| d839e821 VZ |
23 | |
| 24 | /* LPC32xx MIC, SIC1 and SIC2 interrupt controllers */ | |
| f5c42271 RS |
25 | mic: interrupt-controller@40008000 { |
| 26 | compatible = "nxp,lpc3220-mic"; | |
| d839e821 VZ |
27 | reg = <0x40008000 0x4000>; |
| 28 | interrupt-controller; | |
| 29 | #interrupt-cells = <2>; | |
| 30 | }; | |
| 31 | ||
| 32 | sic1: interrupt-controller@4000c000 { | |
| 33 | compatible = "nxp,lpc3220-sic"; | |
| 34 | reg = <0x4000c000 0x4000>; | |
| f5c42271 | 35 | interrupt-controller; |
| f5c42271 | 36 | #interrupt-cells = <2>; |
| d839e821 VZ |
37 | |
| 38 | interrupt-parent = <&mic>; | |
| 39 | interrupts = <0 IRQ_TYPE_LEVEL_LOW>, | |
| 40 | <30 IRQ_TYPE_LEVEL_LOW>; | |
| f5c42271 RS |
41 | }; |
| 42 | ||
| d839e821 VZ |
43 | sic2: interrupt-controller@40010000 { |
| 44 | compatible = "nxp,lpc3220-sic"; | |
| 45 | reg = <0x40010000 0x4000>; | |
| 46 | interrupt-controller; | |
| 47 | #interrupt-cells = <2>; | |
| 48 | ||
| 49 | interrupt-parent = <&mic>; | |
| 50 | interrupts = <1 IRQ_TYPE_LEVEL_LOW>, | |
| 51 | <31 IRQ_TYPE_LEVEL_LOW>; | |
| 52 | }; | |
| 53 | ||
| 54 | /* ADC */ | |
| f5c42271 RS |
55 | adc@40048000 { |
| 56 | compatible = "nxp,lpc3220-adc"; | |
| 57 | reg = <0x40048000 0x1000>; | |
| d839e821 VZ |
58 | interrupt-parent = <&sic1>; |
| 59 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; | |
| f5c42271 | 60 | }; |