Commit | Line | Data |
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2ff40400 AB |
1 | MIPS Global Interrupt Controller (GIC) |
2 | ||
3 | The MIPS GIC routes external interrupts to individual VPEs and IRQ pins. | |
4 | It also supports local (per-processor) interrupts and software-generated | |
5 | interrupts which can be used as IPIs. The GIC also includes a free-running | |
6 | global timer, per-CPU count/compare timers, and a watchdog. | |
7 | ||
8 | Required properties: | |
9 | - compatible : Should be "mti,gic". | |
10 | - interrupt-controller : Identifies the node as an interrupt controller | |
11 | - #interrupt-cells : Specifies the number of cells needed to encode an | |
12 | interrupt specifier. Should be 3. | |
13 | - The first cell is the type of interrupt, local or shared. | |
14 | See <include/dt-bindings/interrupt-controller/mips-gic.h>. | |
15 | - The second cell is the GIC interrupt number. | |
16 | - The third cell encodes the interrupt flags. | |
17 | See <include/dt-bindings/interrupt-controller/irq.h> for a list of valid | |
18 | flags. | |
19 | ||
20 | Optional properties: | |
21 | - reg : Base address and length of the GIC registers. If not present, | |
22 | the base address reported by the hardware GCR_GIC_BASE will be used. | |
23 | - mti,reserved-cpu-vectors : Specifies the list of CPU interrupt vectors | |
24 | to which the GIC may not route interrupts. Valid values are 2 - 7. | |
25 | This property is ignored if the CPU is started in EIC mode. | |
16a8083c QY |
26 | - mti,reserved-ipi-vectors : Specifies the range of GIC interrupts that are |
27 | reserved for IPIs. | |
28 | It accepts 2 values, the 1st is the starting interrupt and the 2nd is the size | |
29 | of the reserved range. | |
30 | If not specified, the driver will allocate the last 2 * number of VPEs in the | |
31 | system. | |
2ff40400 AB |
32 | |
33 | Required properties for timer sub-node: | |
34 | - compatible : Should be "mti,gic-timer". | |
35 | - interrupts : Interrupt for the GIC local timer. | |
5b4e8453 AB |
36 | |
37 | Optional properties for timer sub-node: | |
38 | - clocks : GIC timer operating clock. | |
2ff40400 AB |
39 | - clock-frequency : Clock frequency at which the GIC timers operate. |
40 | ||
5b4e8453 AB |
41 | Note that one of clocks or clock-frequency must be specified. |
42 | ||
2ff40400 AB |
43 | Example: |
44 | ||
45 | gic: interrupt-controller@1bdc0000 { | |
46 | compatible = "mti,gic"; | |
47 | reg = <0x1bdc0000 0x20000>; | |
48 | ||
49 | interrupt-controller; | |
50 | #interrupt-cells = <3>; | |
51 | ||
52 | mti,reserved-cpu-vectors = <7>; | |
16a8083c | 53 | mti,reserved-ipi-vectors = <40 8>; |
2ff40400 AB |
54 | |
55 | timer { | |
56 | compatible = "mti,gic-timer"; | |
57 | interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; | |
58 | clock-frequency = <50000000>; | |
59 | }; | |
60 | }; | |
61 | ||
62 | uart@18101400 { | |
63 | ... | |
64 | interrupt-parent = <&gic>; | |
65 | interrupts = <GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>; | |
66 | ... | |
67 | }; |