projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| c61f819a JE |
1 | NXP LPC18xx/43xx GPIO controller Device Tree Bindings |
| 2 | ----------------------------------------------------- | |
| 3 | ||
| 4 | Required properties: | |
| 5 | - compatible : Should be "nxp,lpc1850-gpio" | |
| e96fd5ce VZ |
6 | - reg : List of addresses and lengths of the GPIO controller |
| 7 | register sets | |
| 8 | - reg-names : Should be "gpio", "gpio-pin-ic", "gpio-group0-ic" and | |
| 9 | "gpio-gpoup1-ic" | |
| 10 | - clocks : Phandle and clock specifier pair for GPIO controller | |
| 11 | - resets : Phandle and reset specifier pair for GPIO controller | |
| 12 | - gpio-controller : Marks the device node as a GPIO controller | |
| 13 | - #gpio-cells : Should be two: | |
| 14 | - The first cell is the GPIO line number | |
| 15 | - The second cell is used to specify polarity | |
| 16 | - interrupt-controller : Marks the device node as an interrupt controller | |
| 17 | - #interrupt-cells : Should be two: | |
| 18 | - The first cell is an interrupt number within | |
| 19 | 0..9 range, for GPIO pin interrupts it is equal | |
| 20 | to 'nxp,gpio-pin-interrupt' property value of | |
| 21 | GPIO pin configuration, 8 is for GPIO GROUP0 | |
| 22 | interrupt, 9 is for GPIO GROUP1 interrupt | |
| 23 | - The second cell is used to specify interrupt type | |
| c61f819a JE |
24 | |
| 25 | Optional properties: | |
| 26 | - gpio-ranges : Mapping between GPIO and pinctrl | |
| 27 | ||
| 28 | Example: | |
| 29 | #define LPC_GPIO(port, pin) (port * 32 + pin) | |
| 30 | #define LPC_PIN(port, pin) (0x##port * 32 + pin) | |
| 31 | ||
| 32 | gpio: gpio@400f4000 { | |
| 33 | compatible = "nxp,lpc1850-gpio"; | |
| e96fd5ce VZ |
34 | reg = <0x400f4000 0x4000>, <0x40087000 0x1000>, |
| 35 | <0x40088000 0x1000>, <0x40089000 0x1000>; | |
| 36 | reg-names = "gpio", "gpio-pin-ic", | |
| 37 | "gpio-group0-ic", "gpio-gpoup1-ic"; | |
| c61f819a | 38 | clocks = <&ccu1 CLK_CPU_GPIO>; |
| e96fd5ce | 39 | resets = <&rgu 28>; |
| c61f819a JE |
40 | gpio-controller; |
| 41 | #gpio-cells = <2>; | |
| e96fd5ce VZ |
42 | interrupt-controller; |
| 43 | #interrupt-cells = <2>; | |
| c61f819a JE |
44 | gpio-ranges = <&pinctrl LPC_GPIO(0,0) LPC_PIN(0,0) 2>, |
| 45 | ... | |
| 46 | <&pinctrl LPC_GPIO(7,19) LPC_PIN(f,5) 7>; | |
| 47 | }; | |
| 48 | ||
| 49 | gpio_joystick { | |
| e96fd5ce | 50 | compatible = "gpio-keys"; |
| c61f819a JE |
51 | ... |
| 52 | ||
| e96fd5ce | 53 | button0 { |
| c61f819a | 54 | ... |
| e96fd5ce VZ |
55 | interrupt-parent = <&gpio>; |
| 56 | interrupts = <1 IRQ_TYPE_EDGE_BOTH>; | |
| c61f819a JE |
57 | gpios = <&gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW>; |
| 58 | }; | |
| 59 | }; |