projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 37586e0b ZG |
1 | * MARVELL MMP DMA controller |
| 2 | ||
| 3 | Marvell Peripheral DMA Controller | |
| af98715f | 4 | Used platforms: pxa688, pxa910, pxa3xx, etc |
| 37586e0b ZG |
5 | |
| 6 | Required properties: | |
| 7 | - compatible: Should be "marvell,pdma-1.0" | |
| 8 | - reg: Should contain DMA registers location and length. | |
| 9 | - interrupts: Either contain all of the per-channel DMA interrupts | |
| 10 | or one irq for pdma device | |
| af98715f LP |
11 | |
| 12 | Optional properties: | |
| 13 | - #dma-channels: Number of DMA channels supported by the controller (defaults | |
| 14 | to 32 when not specified) | |
| 9ab9ae55 RJ |
15 | - #dma-requests: Number of DMA requestor lines supported by the controller |
| 16 | (defaults to 32 when not specified) | |
| 37586e0b ZG |
17 | |
| 18 | "marvell,pdma-1.0" | |
| af98715f | 19 | Used platforms: pxa25x, pxa27x, pxa3xx, pxa93x, pxa168, pxa910, pxa688. |
| 37586e0b ZG |
20 | |
| 21 | Examples: | |
| 22 | ||
| 23 | /* | |
| 24 | * Each channel has specific irq | |
| 25 | * ICU parse out irq channel from ICU register, | |
| 26 | * while DMA controller may not able to distinguish the irq channel | |
| 27 | * Using this method, interrupt-parent is required as demuxer | |
| 28 | * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq, | |
| 29 | * 18~21 is ADMA irq | |
| 30 | */ | |
| 31 | pdma: dma-controller@d4000000 { | |
| 32 | compatible = "marvell,pdma-1.0"; | |
| 33 | reg = <0xd4000000 0x10000>; | |
| 34 | interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; | |
| 35 | interrupt-parent = <&intcmux32>; | |
| 36 | #dma-channels = <16>; | |
| 37 | }; | |
| 38 | ||
| 39 | /* | |
| 40 | * One irq for all channels | |
| 41 | * Dmaengine driver (DMA controller) distinguish irq channel via | |
| 42 | * parsing internal register | |
| 43 | */ | |
| 44 | pdma: dma-controller@d4000000 { | |
| 45 | compatible = "marvell,pdma-1.0"; | |
| 46 | reg = <0xd4000000 0x10000>; | |
| 47 | interrupts = <47>; | |
| 48 | #dma-channels = <16>; | |
| 49 | }; | |
| 50 | ||
| 51 | ||
| 52 | Marvell Two Channel DMA Controller used specifically for audio | |
| af98715f | 53 | Used platforms: pxa688, pxa910 |
| 37586e0b ZG |
54 | |
| 55 | Required properties: | |
| 56 | - compatible: Should be "marvell,adma-1.0" or "marvell,pxa910-squ" | |
| 57 | - reg: Should contain DMA registers location and length. | |
| 58 | - interrupts: Either contain all of the per-channel DMA interrupts | |
| 59 | or one irq for dma device | |
| 60 | ||
| 61 | "marvell,adma-1.0" used on pxa688 | |
| 62 | "marvell,pxa910-squ" used on pxa910 | |
| 63 | ||
| 64 | Examples: | |
| 65 | ||
| 66 | /* each channel has specific irq */ | |
| 67 | adma0: dma-controller@d42a0800 { | |
| 68 | compatible = "marvell,adma-1.0"; | |
| 69 | reg = <0xd42a0800 0x100>; | |
| 70 | interrupts = <18 19>; | |
| 71 | interrupt-parent = <&intcmux32>; | |
| 72 | }; | |
| 73 | ||
| 74 | /* One irq for all channels */ | |
| 75 | squ: dma-controller@d42a0800 { | |
| 76 | compatible = "marvell,pxa910-squ"; | |
| 77 | reg = <0xd42a0800 0x100>; | |
| 78 | interrupts = <46>; | |
| 79 | }; |