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1 | # SPDX-License-Identifier: GPL-2.0-only |
2 | %YAML 1.2 | |
3 | --- | |
4 | $id: http://devicetree.org/schemas/display/samsung/samsung,fimd.yaml# | |
5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
6 | ||
7 | title: Samsung S3C/S5P/Exynos SoC Fully Interactive Mobile Display (FIMD) | |
8 | ||
9 | maintainers: | |
10 | - Inki Dae <inki.dae@samsung.com> | |
e4fc20d7 KK |
11 | - Seung-Woo Kim <sw0312.kim@samsung.com> |
12 | - Kyungmin Park <kyungmin.park@samsung.com> | |
8a1e6bb3 | 13 | - Krzysztof Kozlowski <krzk@kernel.org> |
e4fc20d7 KK |
14 | |
15 | properties: | |
16 | compatible: | |
17 | enum: | |
18 | - samsung,s3c2443-fimd | |
19 | - samsung,s3c6400-fimd | |
20 | - samsung,s5pv210-fimd | |
21 | - samsung,exynos3250-fimd | |
22 | - samsung,exynos4210-fimd | |
23 | - samsung,exynos5250-fimd | |
24 | - samsung,exynos5420-fimd | |
25 | ||
26 | '#address-cells': | |
27 | const: 1 | |
28 | ||
29 | clocks: | |
e4fc20d7 KK |
30 | maxItems: 2 |
31 | ||
32 | clock-names: | |
33 | items: | |
34 | - const: sclk_fimd | |
35 | - const: fimd | |
36 | ||
37 | display-timings: | |
38 | $ref: ../panel/display-timings.yaml# | |
39 | ||
40 | i80-if-timings: | |
41 | type: object | |
ba007062 | 42 | additionalProperties: false |
e4fc20d7 KK |
43 | description: | |
44 | Timing configuration for lcd i80 interface support. | |
45 | The parameters are defined as:: | |
46 | VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|?? | |
47 | : : : : : | |
48 | Address Output --:<XXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XX | |
49 | | cs-setup+1 | : : : | |
50 | |<---------->| : : : | |
51 | Chip Select ???????????????|____________:____________:____________|?? | |
52 | | wr-setup+1 | | wr-hold+1 | | |
53 | |<---------->| |<---------->| | |
54 | Write Enable ????????????????????????????|____________|??????????????? | |
55 | | wr-active+1| | |
56 | |<---------->| | |
57 | Video Data ----------------------------<XXXXXXXXXXXXXXXXXXXXXXXXX>-- | |
58 | ||
59 | properties: | |
60 | cs-setup: | |
61 | $ref: /schemas/types.yaml#/definitions/uint32 | |
62 | description: | |
63 | Clock cycles for the active period of address signal is enabled until | |
64 | chip select is enabled. | |
65 | default: 0 | |
66 | ||
67 | wr-active: | |
68 | $ref: /schemas/types.yaml#/definitions/uint32 | |
69 | description: | |
70 | Clock cycles for the active period of CS is enabled. | |
71 | default: 1 | |
72 | ||
73 | wr-hold: | |
74 | $ref: /schemas/types.yaml#/definitions/uint32 | |
75 | description: | |
76 | Clock cycles for the active period of CS is disabled until write | |
77 | signal is disabled. | |
78 | default: 0 | |
79 | ||
80 | wr-setup: | |
81 | $ref: /schemas/types.yaml#/definitions/uint32 | |
82 | description: | |
83 | Clock cycles for the active period of CS signal is enabled until | |
84 | write signal is enabled. | |
85 | default: 0 | |
86 | ||
87 | iommus: | |
88 | minItems: 1 | |
89 | maxItems: 2 | |
90 | ||
91 | iommu-names: | |
92 | items: | |
93 | - const: m0 | |
94 | - const: m1 | |
95 | ||
96 | interrupts: | |
97 | items: | |
98 | - description: FIFO level | |
99 | - description: VSYNC | |
100 | - description: LCD system | |
101 | ||
102 | interrupt-names: | |
103 | items: | |
104 | - const: fifo | |
105 | - const: vsync | |
106 | - const: lcd_sys | |
107 | ||
108 | power-domains: | |
109 | maxItems: 1 | |
110 | ||
111 | reg: | |
112 | maxItems: 1 | |
113 | ||
114 | samsung,invert-vden: | |
115 | type: boolean | |
116 | description: | |
117 | Video enable signal is inverted. | |
118 | ||
119 | samsung,invert-vclk: | |
120 | type: boolean | |
121 | description: | |
122 | Video clock signal is inverted. | |
123 | ||
124 | samsung,sysreg: | |
125 | $ref: /schemas/types.yaml#/definitions/phandle | |
126 | description: | |
127 | Phandle to System Register syscon. | |
128 | ||
129 | '#size-cells': | |
130 | const: 0 | |
131 | ||
132 | patternProperties: | |
133 | "^port@[0-4]+$": | |
134 | $ref: /schemas/graph.yaml#/properties/port | |
135 | description: | | |
136 | Contains ports with port with index:: | |
137 | 0 - for CAMIF0 input, | |
138 | 1 - for CAMIF1 input, | |
139 | 2 - for CAMIF2 input, | |
140 | 3 - for parallel output, | |
141 | 4 - for write-back interface | |
142 | ||
143 | required: | |
144 | - compatible | |
145 | - clocks | |
146 | - clock-names | |
147 | - interrupts | |
148 | - interrupt-names | |
149 | - reg | |
150 | ||
151 | allOf: | |
152 | - if: | |
153 | properties: | |
154 | compatible: | |
155 | contains: | |
156 | const: samsung,exynos5420-fimd | |
157 | then: | |
158 | properties: | |
159 | iommus: | |
160 | minItems: 2 | |
161 | maxItems: 2 | |
162 | ||
163 | additionalProperties: false | |
164 | ||
165 | examples: | |
166 | - | | |
167 | #include <dt-bindings/clock/exynos4.h> | |
168 | ||
169 | fimd@11c00000 { | |
170 | compatible = "samsung,exynos4210-fimd"; | |
171 | interrupt-parent = <&combiner>; | |
172 | reg = <0x11c00000 0x20000>; | |
173 | interrupt-names = "fifo", "vsync", "lcd_sys"; | |
174 | interrupts = <11 0>, <11 1>, <11 2>; | |
175 | clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; | |
176 | clock-names = "sclk_fimd", "fimd"; | |
177 | power-domains = <&pd_lcd0>; | |
178 | iommus = <&sysmmu_fimd0>; | |
179 | samsung,sysreg = <&sys_reg>; | |
180 | ||
181 | #address-cells = <1>; | |
182 | #size-cells = <0>; | |
183 | ||
184 | samsung,invert-vden; | |
185 | samsung,invert-vclk; | |
186 | ||
187 | pinctrl-0 = <&lcd_clk>, <&lcd_data24>; | |
188 | pinctrl-names = "default"; | |
189 | ||
190 | port@3 { | |
191 | reg = <3>; | |
192 | ||
193 | fimd_dpi_ep: endpoint { | |
194 | remote-endpoint = <&lcd_ep>; | |
195 | }; | |
196 | }; | |
197 | }; |