projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| d220193c AV |
1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 | |
| 3 | --- | |
| 4 | $id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml# | |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | ||
| 7 | title: Qualcomm TCSR Clock Controller on SM8550 | |
| 8 | ||
| 9 | maintainers: | |
| 10 | - Bjorn Andersson <andersson@kernel.org> | |
| 11 | ||
| 12 | description: | | |
| 13 | Qualcomm TCSR clock control module provides the clocks, resets and | |
| 14 | power domains on SM8550 | |
| 15 | ||
| 1a3b3bd1 NA |
16 | See also: |
| 17 | - include/dt-bindings/clock/qcom,sm8550-tcsr.h | |
| 18 | - include/dt-bindings/clock/qcom,sm8650-tcsr.h | |
| d220193c AV |
19 | |
| 20 | properties: | |
| 21 | compatible: | |
| 22 | items: | |
| 1a3b3bd1 NA |
23 | - enum: |
| 24 | - qcom,sm8550-tcsr | |
| 25 | - qcom,sm8650-tcsr | |
| 80de9d9d | 26 | - qcom,x1e80100-tcsr |
| d220193c AV |
27 | - const: syscon |
| 28 | ||
| 29 | clocks: | |
| 30 | items: | |
| 31 | - description: TCXO pad clock | |
| 32 | ||
| 33 | reg: | |
| 34 | maxItems: 1 | |
| 35 | ||
| 36 | '#clock-cells': | |
| 37 | const: 1 | |
| 38 | ||
| 39 | '#reset-cells': | |
| 40 | const: 1 | |
| 41 | ||
| 42 | required: | |
| 43 | - compatible | |
| 44 | - clocks | |
| 45 | ||
| 46 | additionalProperties: false | |
| 47 | ||
| 48 | examples: | |
| 49 | - | | |
| 50 | #include <dt-bindings/clock/qcom,rpmh.h> | |
| 51 | ||
| 52 | clock-controller@1fc0000 { | |
| 53 | compatible = "qcom,sm8550-tcsr", "syscon"; | |
| 54 | reg = <0x1fc0000 0x30000>; | |
| 55 | clocks = <&rpmhcc RPMH_CXO_CLK>; | |
| 56 | #clock-cells = <1>; | |
| 57 | #reset-cells = <1>; | |
| 58 | }; | |
| 59 | ||
| 60 | ... |