Commit | Line | Data |
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ab08aefc CX |
1 | * Marvell PXA168 Clock Controller |
2 | ||
3 | The PXA168 clock subsystem generates and supplies clock to various | |
4 | controllers within the PXA168 SoC. | |
5 | ||
6 | Required Properties: | |
7 | ||
8 | - compatible: should be one of the following. | |
9 | - "marvell,pxa168-clock" - controller compatible with PXA168 SoC. | |
10 | ||
11 | - reg: physical base address of the clock subsystem and length of memory mapped | |
12 | region. There are 3 places in SOC has clock control logic: | |
13 | "mpmu", "apmu", "apbc". So three reg spaces need to be defined. | |
14 | ||
15 | - #clock-cells: should be 1. | |
16 | - #reset-cells: should be 1. | |
17 | ||
18 | Each clock is assigned an identifier and client nodes use this identifier | |
19 | to specify the clock which they consume. | |
20 | ||
21 | All these identifier could be found in <dt-bindings/clock/marvell,pxa168.h>. |