Commit | Line | Data |
---|---|---|
1609027f CK |
1 | * Samsung Exynos5420 Clock Controller |
2 | ||
3 | The Exynos5420 clock controller generates and supplies clock to various | |
6520e968 | 4 | controllers within the Exynos5420 SoC and for the Exynos5800 SoC. |
1609027f CK |
5 | |
6 | Required Properties: | |
7 | ||
cdbea098 | 8 | - compatible: should be one of the following. |
1609027f | 9 | - "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC. |
6520e968 | 10 | - "samsung,exynos5800-clock" - controller compatible with Exynos5800 SoC. |
1609027f CK |
11 | |
12 | - reg: physical base address of the controller and length of memory mapped | |
13 | region. | |
14 | ||
15 | - #clock-cells: should be 1. | |
16 | ||
1dd4e599 AH |
17 | Each clock is assigned an identifier and client nodes can use this identifier |
18 | to specify the clock which they consume. | |
1609027f | 19 | |
1dd4e599 AH |
20 | All available clocks are defined as preprocessor macros in |
21 | dt-bindings/clock/exynos5420.h header and can be used in device | |
22 | tree sources. | |
0044cbcd | 23 | |
1609027f CK |
24 | Example 1: An example of a clock controller node is listed below. |
25 | ||
4c9847b7 | 26 | clock: clock-controller@10010000 { |
1609027f CK |
27 | compatible = "samsung,exynos5420-clock"; |
28 | reg = <0x10010000 0x30000>; | |
29 | #clock-cells = <1>; | |
30 | }; | |
31 | ||
32 | Example 2: UART controller node that consumes the clock generated by the clock | |
33 | controller. Refer to the standard clock bindings for information | |
34 | about 'clocks' and 'clock-names' property. | |
35 | ||
36 | serial@13820000 { | |
37 | compatible = "samsung,exynos4210-uart"; | |
38 | reg = <0x13820000 0x100>; | |
39 | interrupts = <0 54 0>; | |
1dd4e599 | 40 | clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; |
1609027f CK |
41 | clock-names = "uart", "clk_uart_baud0"; |
42 | }; |