projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 5918410d AP |
1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 | |
| 3 | --- | |
| 4 | $id: http://devicetree.org/schemas/ata/sata_highbank.yaml# | |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | ||
| 7 | title: Calxeda AHCI SATA Controller | |
| 8 | ||
| 9 | description: | | |
| 10 | The Calxeda SATA controller mostly conforms to the AHCI interface | |
| 11 | with some special extensions to add functionality, to map GPIOs for | |
| 12 | activity LEDs and for mapping the ComboPHYs. | |
| 13 | ||
| 14 | maintainers: | |
| 15 | - Andre Przywara <andre.przywara@arm.com> | |
| 16 | ||
| 17 | properties: | |
| 18 | compatible: | |
| 19 | const: calxeda,hb-ahci | |
| 20 | ||
| 21 | reg: | |
| 22 | maxItems: 1 | |
| 23 | ||
| 24 | interrupts: | |
| 25 | maxItems: 1 | |
| 26 | ||
| 27 | dma-coherent: true | |
| 28 | ||
| 29 | calxeda,pre-clocks: | |
| 30 | $ref: /schemas/types.yaml#/definitions/uint32 | |
| 31 | description: | | |
| 32 | Indicates the number of additional clock cycles to transmit before | |
| 33 | sending an SGPIO pattern. | |
| 34 | ||
| 35 | calxeda,post-clocks: | |
| 36 | $ref: /schemas/types.yaml#/definitions/uint32 | |
| 37 | description: | | |
| 38 | Indicates the number of additional clock cycles to transmit after | |
| 39 | sending an SGPIO pattern. | |
| 40 | ||
| 41 | calxeda,led-order: | |
| 42 | description: Maps port numbers to offsets within the SGPIO bitstream. | |
| 086e9074 RH |
43 | $ref: /schemas/types.yaml#/definitions/uint32-array |
| 44 | minItems: 1 | |
| 45 | maxItems: 8 | |
| 5918410d AP |
46 | |
| 47 | calxeda,port-phys: | |
| 48 | description: | | |
| 49 | phandle-combophy and lane assignment, which maps each SATA port to a | |
| 50 | combophy and a lane within that combophy | |
| 086e9074 RH |
51 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| 52 | minItems: 1 | |
| 53 | maxItems: 8 | |
| 5918410d AP |
54 | |
| 55 | calxeda,tx-atten: | |
| 56 | description: | | |
| 57 | Contains TX attenuation override codes, one per port. | |
| 58 | The upper 24 bits of each entry are always 0 and thus ignored. | |
| 086e9074 RH |
59 | $ref: /schemas/types.yaml#/definitions/uint32-array |
| 60 | minItems: 1 | |
| 61 | maxItems: 8 | |
| 5918410d AP |
62 | |
| 63 | calxeda,sgpio-gpio: | |
| 64 | description: | | |
| 65 | phandle-gpio bank, bit offset, and default on or off, which indicates | |
| 66 | that the driver supports SGPIO indicator lights using the indicated | |
| 67 | GPIOs. | |
| 68 | ||
| 69 | required: | |
| 70 | - compatible | |
| 71 | - reg | |
| 72 | - interrupts | |
| 73 | ||
| 74 | additionalProperties: false | |
| 75 | ||
| 76 | examples: | |
| 77 | - | | |
| 78 | sata@ffe08000 { | |
| 79 | compatible = "calxeda,hb-ahci"; | |
| 80 | reg = <0xffe08000 0x1000>; | |
| 81 | interrupts = <115>; | |
| 82 | dma-coherent; | |
| 83 | calxeda,port-phys = <&combophy5 0>, <&combophy0 0>, <&combophy0 1>, | |
| 84 | <&combophy0 2>, <&combophy0 3>; | |
| 85 | calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>, <&gpioh 7 1>; | |
| 86 | calxeda,led-order = <4 0 1 2 3>; | |
| 87 | calxeda,tx-atten = <0xff 22 0xff 0xff 23>; | |
| 88 | calxeda,pre-clocks = <10>; | |
| 89 | calxeda,post-clocks = <0>; | |
| 90 | }; | |
| 91 | ||
| 92 | ... |