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07db781d LW |
1 | * ARM Snoop Control Unit (SCU) |
2 | ||
3 | As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided | |
4 | with a Snoop Control Unit. The register range is usually 256 (0x100) | |
5 | bytes. | |
6 | ||
7 | References: | |
8 | ||
9 | - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual | |
10 | Revision r2p0 | |
11 | - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual | |
12 | Revision r0p1 | |
d4eaf73b LW |
13 | - ARM11 MPCore: see DDI0360F ARM 11 MPCore Processor Technical Reference |
14 | Manial Revision r2p0 | |
07db781d LW |
15 | |
16 | - compatible : Should be: | |
17 | "arm,cortex-a9-scu" | |
18 | "arm,cortex-a5-scu" | |
d4eaf73b | 19 | "arm,arm11mp-scu" |
07db781d LW |
20 | |
21 | - reg : Specify the base address and the size of the SCU register window. | |
22 | ||
23 | Example: | |
24 | ||
66d77325 | 25 | scu@a0410000 { |
07db781d LW |
26 | compatible = "arm,cortex-a9-scu"; |
27 | reg = <0xa0410000 0x100>; | |
28 | }; |