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[S390] cio: introduce fcx enabled scsw format
[linux-block.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/string.h>
14#include <linux/errno.h>
15#include <linux/kernel.h>
16#include <linux/ip.h>
17#include <linux/ipv6.h>
18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
21
22#include <asm-s390/ebcdic.h>
23#include <asm-s390/io.h>
24#include <asm/s390_rdev.h>
25
26#include "qeth_core.h"
27#include "qeth_core_offl.h"
28
d11ba0c4
PT		 29struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
31 /* N P A M L V H */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
46};
47EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 48
49struct qeth_card_list_struct qeth_core_card_list;
50EXPORT_SYMBOL_GPL(qeth_core_card_list);
4a71df50
FB		 51
52static struct device *qeth_core_root_dev;
53static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
54static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 55
56static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
58static int qeth_issue_next_read(struct qeth_card *);
59static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
60static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
61static void qeth_free_buffer_pool(struct qeth_card *);
62static int qeth_qdio_establish(struct qeth_card *);
63
64
65static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
66 struct qdio_buffer *buffer, int is_tso,
67 int *next_element_to_fill)
68{
69 struct skb_frag_struct *frag;
70 int fragno;
71 unsigned long addr;
72 int element, cnt, dlen;
73
74 fragno = skb_shinfo(skb)->nr_frags;
75 element = *next_element_to_fill;
76 dlen = 0;
77
78 if (is_tso)
79 buffer->element[element].flags =
80 SBAL_FLAGS_MIDDLE_FRAG;
81 else
82 buffer->element[element].flags =
83 SBAL_FLAGS_FIRST_FRAG;
84 dlen = skb->len - skb->data_len;
85 if (dlen) {
86 buffer->element[element].addr = skb->data;
87 buffer->element[element].length = dlen;
88 element++;
89 }
90 for (cnt = 0; cnt < fragno; cnt++) {
91 frag = &skb_shinfo(skb)->frags[cnt];
92 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
93 frag->page_offset;
94 buffer->element[element].addr = (char *)addr;
95 buffer->element[element].length = frag->size;
96 if (cnt < (fragno - 1))
97 buffer->element[element].flags =
98 SBAL_FLAGS_MIDDLE_FRAG;
99 else
100 buffer->element[element].flags =
101 SBAL_FLAGS_LAST_FRAG;
102 element++;
103 }
104 *next_element_to_fill = element;
105}
106
107static inline const char *qeth_get_cardname(struct qeth_card *card)
108{
109 if (card->info.guestlan) {
110 switch (card->info.type) {
111 case QETH_CARD_TYPE_OSAE:
112 return " Guest LAN QDIO";
113 case QETH_CARD_TYPE_IQD:
114 return " Guest LAN Hiper";
115 default:
116 return " unknown";
117 }
118 } else {
119 switch (card->info.type) {
120 case QETH_CARD_TYPE_OSAE:
121 return " OSD Express";
122 case QETH_CARD_TYPE_IQD:
123 return " HiperSockets";
124 case QETH_CARD_TYPE_OSN:
125 return " OSN QDIO";
126 default:
127 return " unknown";
128 }
129 }
130 return " n/a";
131}
132
133/* max length to be returned: 14 */
134const char *qeth_get_cardname_short(struct qeth_card *card)
135{
136 if (card->info.guestlan) {
137 switch (card->info.type) {
138 case QETH_CARD_TYPE_OSAE:
139 return "GuestLAN QDIO";
140 case QETH_CARD_TYPE_IQD:
141 return "GuestLAN Hiper";
142 default:
143 return "unknown";
144 }
145 } else {
146 switch (card->info.type) {
147 case QETH_CARD_TYPE_OSAE:
148 switch (card->info.link_type) {
149 case QETH_LINK_TYPE_FAST_ETH:
150 return "OSD_100";
151 case QETH_LINK_TYPE_HSTR:
152 return "HSTR";
153 case QETH_LINK_TYPE_GBIT_ETH:
154 return "OSD_1000";
155 case QETH_LINK_TYPE_10GBIT_ETH:
156 return "OSD_10GIG";
157 case QETH_LINK_TYPE_LANE_ETH100:
158 return "OSD_FE_LANE";
159 case QETH_LINK_TYPE_LANE_TR:
160 return "OSD_TR_LANE";
161 case QETH_LINK_TYPE_LANE_ETH1000:
162 return "OSD_GbE_LANE";
163 case QETH_LINK_TYPE_LANE:
164 return "OSD_ATM_LANE";
165 default:
166 return "OSD_Express";
167 }
168 case QETH_CARD_TYPE_IQD:
169 return "HiperSockets";
170 case QETH_CARD_TYPE_OSN:
171 return "OSN";
172 default:
173 return "unknown";
174 }
175 }
176 return "n/a";
177}
178
179void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
180 int clear_start_mask)
181{
182 unsigned long flags;
183
184 spin_lock_irqsave(&card->thread_mask_lock, flags);
185 card->thread_allowed_mask = threads;
186 if (clear_start_mask)
187 card->thread_start_mask &= threads;
188 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
189 wake_up(&card->wait_q);
190}
191EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
192
193int qeth_threads_running(struct qeth_card *card, unsigned long threads)
194{
195 unsigned long flags;
196 int rc = 0;
197
198 spin_lock_irqsave(&card->thread_mask_lock, flags);
199 rc = (card->thread_running_mask & threads);
200 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
201 return rc;
202}
203EXPORT_SYMBOL_GPL(qeth_threads_running);
204
205int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
206{
207 return wait_event_interruptible(card->wait_q,
208 qeth_threads_running(card, threads) == 0);
209}
210EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
211
212void qeth_clear_working_pool_list(struct qeth_card *card)
213{
214 struct qeth_buffer_pool_entry *pool_entry, *tmp;
215
d11ba0c4 216 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
4a71df50
FB		 217 list_for_each_entry_safe(pool_entry, tmp,
218 &card->qdio.in_buf_pool.entry_list, list){
219 list_del(&pool_entry->list);
220 }
221}
222EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
223
224static int qeth_alloc_buffer_pool(struct qeth_card *card)
225{
226 struct qeth_buffer_pool_entry *pool_entry;
227 void *ptr;
228 int i, j;
229
d11ba0c4 230 QETH_DBF_TEXT(TRACE, 5, "alocpool");
4a71df50
FB		 231 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
232 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
233 if (!pool_entry) {
234 qeth_free_buffer_pool(card);
235 return -ENOMEM;
236 }
237 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 238 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 239 if (!ptr) {
240 while (j > 0)
241 free_page((unsigned long)
242 pool_entry->elements[--j]);
243 kfree(pool_entry);
244 qeth_free_buffer_pool(card);
245 return -ENOMEM;
246 }
247 pool_entry->elements[j] = ptr;
248 }
249 list_add(&pool_entry->init_list,
250 &card->qdio.init_pool.entry_list);
251 }
252 return 0;
253}
254
255int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
256{
d11ba0c4 257 QETH_DBF_TEXT(TRACE, 2, "realcbp");
4a71df50
FB		 258
259 if ((card->state != CARD_STATE_DOWN) &&
260 (card->state != CARD_STATE_RECOVER))
261 return -EPERM;
262
263 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
264 qeth_clear_working_pool_list(card);
265 qeth_free_buffer_pool(card);
266 card->qdio.in_buf_pool.buf_count = bufcnt;
267 card->qdio.init_pool.buf_count = bufcnt;
268 return qeth_alloc_buffer_pool(card);
269}
270
271int qeth_set_large_send(struct qeth_card *card,
272 enum qeth_large_send_types type)
273{
274 int rc = 0;
275
276 if (card->dev == NULL) {
277 card->options.large_send = type;
278 return 0;
279 }
280 if (card->state == CARD_STATE_UP)
281 netif_tx_disable(card->dev);
282 card->options.large_send = type;
283 switch (card->options.large_send) {
284 case QETH_LARGE_SEND_EDDP:
285 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
286 NETIF_F_HW_CSUM;
287 break;
288 case QETH_LARGE_SEND_TSO:
289 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
290 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
291 NETIF_F_HW_CSUM;
292 } else {
4a71df50
FB		 293 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
294 NETIF_F_HW_CSUM);
295 card->options.large_send = QETH_LARGE_SEND_NO;
296 rc = -EOPNOTSUPP;
297 }
298 break;
299 default: /* includes QETH_LARGE_SEND_NO */
300 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
301 NETIF_F_HW_CSUM);
302 break;
303 }
304 if (card->state == CARD_STATE_UP)
305 netif_wake_queue(card->dev);
306 return rc;
307}
308EXPORT_SYMBOL_GPL(qeth_set_large_send);
309
310static int qeth_issue_next_read(struct qeth_card *card)
311{
312 int rc;
313 struct qeth_cmd_buffer *iob;
314
d11ba0c4 315 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
4a71df50
FB		 316 if (card->read.state != CH_STATE_UP)
317 return -EIO;
318 iob = qeth_get_buffer(&card->read);
319 if (!iob) {
320 PRINT_WARN("issue_next_read failed: no iob available!\n");
321 return -ENOMEM;
322 }
323 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
d11ba0c4 324 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 325 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
326 (addr_t) iob, 0, 0);
327 if (rc) {
328 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
329 atomic_set(&card->read.irq_pending, 0);
330 qeth_schedule_recovery(card);
331 wake_up(&card->wait_q);
332 }
333 return rc;
334}
335
336static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
337{
338 struct qeth_reply *reply;
339
340 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
341 if (reply) {
342 atomic_set(&reply->refcnt, 1);
343 atomic_set(&reply->received, 0);
344 reply->card = card;
345 };
346 return reply;
347}
348
349static void qeth_get_reply(struct qeth_reply *reply)
350{
351 WARN_ON(atomic_read(&reply->refcnt) <= 0);
352 atomic_inc(&reply->refcnt);
353}
354
355static void qeth_put_reply(struct qeth_reply *reply)
356{
357 WARN_ON(atomic_read(&reply->refcnt) <= 0);
358 if (atomic_dec_and_test(&reply->refcnt))
359 kfree(reply);
360}
361
d11ba0c4 362static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 363 struct qeth_card *card)
364{
4a71df50 365 char *ipa_name;
d11ba0c4 366 int com = cmd->hdr.command;
4a71df50 367 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4
PT		 368 if (rc)
369 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
370 ipa_name, com, QETH_CARD_IFNAME(card),
371 rc, qeth_get_ipa_msg(rc));
372 else
373 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
374 ipa_name, com, QETH_CARD_IFNAME(card));
4a71df50
FB		 375}
376
377static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
378 struct qeth_cmd_buffer *iob)
379{
380 struct qeth_ipa_cmd *cmd = NULL;
381
d11ba0c4 382 QETH_DBF_TEXT(TRACE, 5, "chkipad");
4a71df50
FB		 383 if (IS_IPA(iob->data)) {
384 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
385 if (IS_IPA_REPLY(cmd)) {
d11ba0c4
PT		 386 if (cmd->hdr.command < IPA_CMD_SETCCID ||
387 cmd->hdr.command > IPA_CMD_MODCCID)
388 qeth_issue_ipa_msg(cmd,
389 cmd->hdr.return_code, card);
4a71df50
FB		 390 return cmd;
391 } else {
392 switch (cmd->hdr.command) {
393 case IPA_CMD_STOPLAN:
394 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
395 "there is a network problem or "
396 "someone pulled the cable or "
397 "disabled the port.\n",
398 QETH_CARD_IFNAME(card),
399 card->info.chpid);
400 card->lan_online = 0;
401 if (card->dev && netif_carrier_ok(card->dev))
402 netif_carrier_off(card->dev);
403 return NULL;
404 case IPA_CMD_STARTLAN:
405 PRINT_INFO("Link reestablished on %s "
406 "(CHPID 0x%X). Scheduling "
407 "IP address reset.\n",
408 QETH_CARD_IFNAME(card),
409 card->info.chpid);
410 netif_carrier_on(card->dev);
922dc062 411 card->lan_online = 1;
4a71df50
FB		 412 qeth_schedule_recovery(card);
413 return NULL;
414 case IPA_CMD_MODCCID:
415 return cmd;
416 case IPA_CMD_REGISTER_LOCAL_ADDR:
d11ba0c4 417 QETH_DBF_TEXT(TRACE, 3, "irla");
4a71df50
FB		 418 break;
419 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
d11ba0c4 420 QETH_DBF_TEXT(TRACE, 3, "urla");
4a71df50
FB		 421 break;
422 default:
423 PRINT_WARN("Received data is IPA "
424 "but not a reply!\n");
425 break;
426 }
427 }
428 }
429 return cmd;
430}
431
432void qeth_clear_ipacmd_list(struct qeth_card *card)
433{
434 struct qeth_reply *reply, *r;
435 unsigned long flags;
436
d11ba0c4 437 QETH_DBF_TEXT(TRACE, 4, "clipalst");
4a71df50
FB		 438
439 spin_lock_irqsave(&card->lock, flags);
440 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
441 qeth_get_reply(reply);
442 reply->rc = -EIO;
443 atomic_inc(&reply->received);
444 list_del_init(&reply->list);
445 wake_up(&reply->wait_q);
446 qeth_put_reply(reply);
447 }
448 spin_unlock_irqrestore(&card->lock, flags);
449}
450EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
451
452static int qeth_check_idx_response(unsigned char *buffer)
453{
454 if (!buffer)
455 return 0;
456
d11ba0c4 457 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50
FB		 458 if ((buffer[2] & 0xc0) == 0xc0) {
459 PRINT_WARN("received an IDX TERMINATE "
460 "with cause code 0x%02x%s\n",
461 buffer[4],
462 ((buffer[4] == 0x22) ?
463 " -- try another portname" : ""));
d11ba0c4
PT		 464 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
465 QETH_DBF_TEXT(TRACE, 2, " idxterm");
466 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 467 return -EIO;
468 }
469 return 0;
470}
471
472static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
473 __u32 len)
474{
475 struct qeth_card *card;
476
d11ba0c4 477 QETH_DBF_TEXT(TRACE, 4, "setupccw");
4a71df50
FB		 478 card = CARD_FROM_CDEV(channel->ccwdev);
479 if (channel == &card->read)
480 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
481 else
482 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
483 channel->ccw.count = len;
484 channel->ccw.cda = (__u32) __pa(iob);
485}
486
487static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
488{
489 __u8 index;
490
d11ba0c4 491 QETH_DBF_TEXT(TRACE, 6, "getbuff");
4a71df50
FB		 492 index = channel->io_buf_no;
493 do {
494 if (channel->iob[index].state == BUF_STATE_FREE) {
495 channel->iob[index].state = BUF_STATE_LOCKED;
496 channel->io_buf_no = (channel->io_buf_no + 1) %
497 QETH_CMD_BUFFER_NO;
498 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
499 return channel->iob + index;
500 }
501 index = (index + 1) % QETH_CMD_BUFFER_NO;
502 } while (index != channel->io_buf_no);
503
504 return NULL;
505}
506
507void qeth_release_buffer(struct qeth_channel *channel,
508 struct qeth_cmd_buffer *iob)
509{
510 unsigned long flags;
511
d11ba0c4 512 QETH_DBF_TEXT(TRACE, 6, "relbuff");
4a71df50
FB		 513 spin_lock_irqsave(&channel->iob_lock, flags);
514 memset(iob->data, 0, QETH_BUFSIZE);
515 iob->state = BUF_STATE_FREE;
516 iob->callback = qeth_send_control_data_cb;
517 iob->rc = 0;
518 spin_unlock_irqrestore(&channel->iob_lock, flags);
519}
520EXPORT_SYMBOL_GPL(qeth_release_buffer);
521
522static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
523{
524 struct qeth_cmd_buffer *buffer = NULL;
525 unsigned long flags;
526
527 spin_lock_irqsave(&channel->iob_lock, flags);
528 buffer = __qeth_get_buffer(channel);
529 spin_unlock_irqrestore(&channel->iob_lock, flags);
530 return buffer;
531}
532
533struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
534{
535 struct qeth_cmd_buffer *buffer;
536 wait_event(channel->wait_q,
537 ((buffer = qeth_get_buffer(channel)) != NULL));
538 return buffer;
539}
540EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
541
542void qeth_clear_cmd_buffers(struct qeth_channel *channel)
543{
544 int cnt;
545
546 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
547 qeth_release_buffer(channel, &channel->iob[cnt]);
548 channel->buf_no = 0;
549 channel->io_buf_no = 0;
550}
551EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
552
553static void qeth_send_control_data_cb(struct qeth_channel *channel,
554 struct qeth_cmd_buffer *iob)
555{
556 struct qeth_card *card;
557 struct qeth_reply *reply, *r;
558 struct qeth_ipa_cmd *cmd;
559 unsigned long flags;
560 int keep_reply;
561
d11ba0c4 562 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
4a71df50
FB		 563
564 card = CARD_FROM_CDEV(channel->ccwdev);
565 if (qeth_check_idx_response(iob->data)) {
566 qeth_clear_ipacmd_list(card);
567 qeth_schedule_recovery(card);
568 goto out;
569 }
570
571 cmd = qeth_check_ipa_data(card, iob);
572 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
573 goto out;
574 /*in case of OSN : check if cmd is set */
575 if (card->info.type == QETH_CARD_TYPE_OSN &&
576 cmd &&
577 cmd->hdr.command != IPA_CMD_STARTLAN &&
578 card->osn_info.assist_cb != NULL) {
579 card->osn_info.assist_cb(card->dev, cmd);
580 goto out;
581 }
582
583 spin_lock_irqsave(&card->lock, flags);
584 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
585 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
586 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
587 qeth_get_reply(reply);
588 list_del_init(&reply->list);
589 spin_unlock_irqrestore(&card->lock, flags);
590 keep_reply = 0;
591 if (reply->callback != NULL) {
592 if (cmd) {
593 reply->offset = (__u16)((char *)cmd -
594 (char *)iob->data);
595 keep_reply = reply->callback(card,
596 reply,
597 (unsigned long)cmd);
598 } else
599 keep_reply = reply->callback(card,
600 reply,
601 (unsigned long)iob);
602 }
603 if (cmd)
604 reply->rc = (u16) cmd->hdr.return_code;
605 else if (iob->rc)
606 reply->rc = iob->rc;
607 if (keep_reply) {
608 spin_lock_irqsave(&card->lock, flags);
609 list_add_tail(&reply->list,
610 &card->cmd_waiter_list);
611 spin_unlock_irqrestore(&card->lock, flags);
612 } else {
613 atomic_inc(&reply->received);
614 wake_up(&reply->wait_q);
615 }
616 qeth_put_reply(reply);
617 goto out;
618 }
619 }
620 spin_unlock_irqrestore(&card->lock, flags);
621out:
622 memcpy(&card->seqno.pdu_hdr_ack,
623 QETH_PDU_HEADER_SEQ_NO(iob->data),
624 QETH_SEQ_NO_LENGTH);
625 qeth_release_buffer(channel, iob);
626}
627
628static int qeth_setup_channel(struct qeth_channel *channel)
629{
630 int cnt;
631
d11ba0c4 632 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50
FB		 633 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
634 channel->iob[cnt].data = (char *)
635 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
636 if (channel->iob[cnt].data == NULL)
637 break;
638 channel->iob[cnt].state = BUF_STATE_FREE;
639 channel->iob[cnt].channel = channel;
640 channel->iob[cnt].callback = qeth_send_control_data_cb;
641 channel->iob[cnt].rc = 0;
642 }
643 if (cnt < QETH_CMD_BUFFER_NO) {
644 while (cnt-- > 0)
645 kfree(channel->iob[cnt].data);
646 return -ENOMEM;
647 }
648 channel->buf_no = 0;
649 channel->io_buf_no = 0;
650 atomic_set(&channel->irq_pending, 0);
651 spin_lock_init(&channel->iob_lock);
652
653 init_waitqueue_head(&channel->wait_q);
654 return 0;
655}
656
657static int qeth_set_thread_start_bit(struct qeth_card *card,
658 unsigned long thread)
659{
660 unsigned long flags;
661
662 spin_lock_irqsave(&card->thread_mask_lock, flags);
663 if (!(card->thread_allowed_mask & thread) ||
664 (card->thread_start_mask & thread)) {
665 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
666 return -EPERM;
667 }
668 card->thread_start_mask |= thread;
669 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
670 return 0;
671}
672
673void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
674{
675 unsigned long flags;
676
677 spin_lock_irqsave(&card->thread_mask_lock, flags);
678 card->thread_start_mask &= ~thread;
679 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
680 wake_up(&card->wait_q);
681}
682EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
683
684void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
685{
686 unsigned long flags;
687
688 spin_lock_irqsave(&card->thread_mask_lock, flags);
689 card->thread_running_mask &= ~thread;
690 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
691 wake_up(&card->wait_q);
692}
693EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
694
695static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
696{
697 unsigned long flags;
698 int rc = 0;
699
700 spin_lock_irqsave(&card->thread_mask_lock, flags);
701 if (card->thread_start_mask & thread) {
702 if ((card->thread_allowed_mask & thread) &&
703 !(card->thread_running_mask & thread)) {
704 rc = 1;
705 card->thread_start_mask &= ~thread;
706 card->thread_running_mask |= thread;
707 } else
708 rc = -EPERM;
709 }
710 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
711 return rc;
712}
713
714int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
715{
716 int rc = 0;
717
718 wait_event(card->wait_q,
719 (rc = __qeth_do_run_thread(card, thread)) >= 0);
720 return rc;
721}
722EXPORT_SYMBOL_GPL(qeth_do_run_thread);
723
724void qeth_schedule_recovery(struct qeth_card *card)
725{
d11ba0c4 726 QETH_DBF_TEXT(TRACE, 2, "startrec");
4a71df50
FB		 727 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
728 schedule_work(&card->kernel_thread_starter);
729}
730EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
731
732static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
733{
734 int dstat, cstat;
735 char *sense;
736
737 sense = (char *) irb->ecw;
23d805b6
PO		 738 cstat = irb->scsw.cmd.cstat;
739 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 740
741 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
742 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
743 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
d11ba0c4 744 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
4a71df50
FB		 745 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
746 cdev->dev.bus_id, dstat, cstat);
747 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
748 16, 1, irb, 64, 1);
749 return 1;
750 }
751
752 if (dstat & DEV_STAT_UNIT_CHECK) {
753 if (sense[SENSE_RESETTING_EVENT_BYTE] &
754 SENSE_RESETTING_EVENT_FLAG) {
d11ba0c4 755 QETH_DBF_TEXT(TRACE, 2, "REVIND");
4a71df50
FB		 756 return 1;
757 }
758 if (sense[SENSE_COMMAND_REJECT_BYTE] &
759 SENSE_COMMAND_REJECT_FLAG) {
d11ba0c4 760 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
4a71df50
FB		 761 return 0;
762 }
763 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
d11ba0c4 764 QETH_DBF_TEXT(TRACE, 2, "AFFE");
4a71df50
FB		 765 return 1;
766 }
767 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
d11ba0c4 768 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
4a71df50
FB		 769 return 0;
770 }
d11ba0c4 771 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
4a71df50
FB		 772 return 1;
773 }
774 return 0;
775}
776
777static long __qeth_check_irb_error(struct ccw_device *cdev,
778 unsigned long intparm, struct irb *irb)
779{
780 if (!IS_ERR(irb))
781 return 0;
782
783 switch (PTR_ERR(irb)) {
784 case -EIO:
785 PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
d11ba0c4
PT		 786 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
787 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 788 break;
789 case -ETIMEDOUT:
790 PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
d11ba0c4
PT		 791 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
792 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
4a71df50
FB		 793 if (intparm == QETH_RCD_PARM) {
794 struct qeth_card *card = CARD_FROM_CDEV(cdev);
795
796 if (card && (card->data.ccwdev == cdev)) {
797 card->data.state = CH_STATE_DOWN;
798 wake_up(&card->wait_q);
799 }
800 }
801 break;
802 default:
803 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
804 cdev->dev.bus_id);
d11ba0c4
PT		 805 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
806 QETH_DBF_TEXT(TRACE, 2, " rc???");
4a71df50
FB		 807 }
808 return PTR_ERR(irb);
809}
810
811static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
812 struct irb *irb)
813{
814 int rc;
815 int cstat, dstat;
816 struct qeth_cmd_buffer *buffer;
817 struct qeth_channel *channel;
818 struct qeth_card *card;
819 struct qeth_cmd_buffer *iob;
820 __u8 index;
821
d11ba0c4 822 QETH_DBF_TEXT(TRACE, 5, "irq");
4a71df50
FB		 823
824 if (__qeth_check_irb_error(cdev, intparm, irb))
825 return;
23d805b6
PO		 826 cstat = irb->scsw.cmd.cstat;
827 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 828
829 card = CARD_FROM_CDEV(cdev);
830 if (!card)
831 return;
832
833 if (card->read.ccwdev == cdev) {
834 channel = &card->read;
d11ba0c4 835 QETH_DBF_TEXT(TRACE, 5, "read");
4a71df50
FB		 836 } else if (card->write.ccwdev == cdev) {
837 channel = &card->write;
d11ba0c4 838 QETH_DBF_TEXT(TRACE, 5, "write");
4a71df50
FB		 839 } else {
840 channel = &card->data;
d11ba0c4 841 QETH_DBF_TEXT(TRACE, 5, "data");
4a71df50
FB		 842 }
843 atomic_set(&channel->irq_pending, 0);
844
23d805b6 845 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 846 channel->state = CH_STATE_STOPPED;
847
23d805b6 848 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 849 channel->state = CH_STATE_HALTED;
850
851 /*let's wake up immediately on data channel*/
852 if ((channel == &card->data) && (intparm != 0) &&
853 (intparm != QETH_RCD_PARM))
854 goto out;
855
856 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
d11ba0c4 857 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
4a71df50
FB		 858 /* we don't have to handle this further */
859 intparm = 0;
860 }
861 if (intparm == QETH_HALT_CHANNEL_PARM) {
d11ba0c4 862 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
4a71df50
FB		 863 /* we don't have to handle this further */
864 intparm = 0;
865 }
866 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
867 (dstat & DEV_STAT_UNIT_CHECK) ||
868 (cstat)) {
869 if (irb->esw.esw0.erw.cons) {
870 /* TODO: we should make this s390dbf */
871 PRINT_WARN("sense data available on channel %s.\n",
872 CHANNEL_ID(channel));
873 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
874 print_hex_dump(KERN_WARNING, "qeth: irb ",
875 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
876 print_hex_dump(KERN_WARNING, "qeth: sense data ",
877 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
878 }
879 if (intparm == QETH_RCD_PARM) {
880 channel->state = CH_STATE_DOWN;
881 goto out;
882 }
883 rc = qeth_get_problem(cdev, irb);
884 if (rc) {
885 qeth_schedule_recovery(card);
886 goto out;
887 }
888 }
889
890 if (intparm == QETH_RCD_PARM) {
891 channel->state = CH_STATE_RCD_DONE;
892 goto out;
893 }
894 if (intparm) {
895 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
896 buffer->state = BUF_STATE_PROCESSED;
897 }
898 if (channel == &card->data)
899 return;
900 if (channel == &card->read &&
901 channel->state == CH_STATE_UP)
902 qeth_issue_next_read(card);
903
904 iob = channel->iob;
905 index = channel->buf_no;
906 while (iob[index].state == BUF_STATE_PROCESSED) {
907 if (iob[index].callback != NULL)
908 iob[index].callback(channel, iob + index);
909
910 index = (index + 1) % QETH_CMD_BUFFER_NO;
911 }
912 channel->buf_no = index;
913out:
914 wake_up(&card->wait_q);
915 return;
916}
917
918static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
919 struct qeth_qdio_out_buffer *buf)
920{
921 int i;
922 struct sk_buff *skb;
923
924 /* is PCI flag set on buffer? */
925 if (buf->buffer->element[0].flags & 0x40)
926 atomic_dec(&queue->set_pci_flags_count);
927
928 skb = skb_dequeue(&buf->skb_list);
929 while (skb) {
930 atomic_dec(&skb->users);
931 dev_kfree_skb_any(skb);
932 skb = skb_dequeue(&buf->skb_list);
933 }
934 qeth_eddp_buf_release_contexts(buf);
935 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
936 buf->buffer->element[i].length = 0;
937 buf->buffer->element[i].addr = NULL;
938 buf->buffer->element[i].flags = 0;
939 }
940 buf->next_element_to_fill = 0;
941 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
942}
943
944void qeth_clear_qdio_buffers(struct qeth_card *card)
945{
946 int i, j;
947
d11ba0c4 948 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
4a71df50
FB		 949 /* clear outbound buffers to free skbs */
950 for (i = 0; i < card->qdio.no_out_queues; ++i)
951 if (card->qdio.out_qs[i]) {
952 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
953 qeth_clear_output_buffer(card->qdio.out_qs[i],
954 &card->qdio.out_qs[i]->bufs[j]);
955 }
956}
957EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
958
959static void qeth_free_buffer_pool(struct qeth_card *card)
960{
961 struct qeth_buffer_pool_entry *pool_entry, *tmp;
962 int i = 0;
d11ba0c4 963 QETH_DBF_TEXT(TRACE, 5, "freepool");
4a71df50
FB		 964 list_for_each_entry_safe(pool_entry, tmp,
965 &card->qdio.init_pool.entry_list, init_list){
966 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
967 free_page((unsigned long)pool_entry->elements[i]);
968 list_del(&pool_entry->init_list);
969 kfree(pool_entry);
970 }
971}
972
973static void qeth_free_qdio_buffers(struct qeth_card *card)
974{
975 int i, j;
976
d11ba0c4 977 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
4a71df50
FB		 978 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
979 QETH_QDIO_UNINITIALIZED)
980 return;
981 kfree(card->qdio.in_q);
982 card->qdio.in_q = NULL;
983 /* inbound buffer pool */
984 qeth_free_buffer_pool(card);
985 /* free outbound qdio_qs */
986 if (card->qdio.out_qs) {
987 for (i = 0; i < card->qdio.no_out_queues; ++i) {
988 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
989 qeth_clear_output_buffer(card->qdio.out_qs[i],
990 &card->qdio.out_qs[i]->bufs[j]);
991 kfree(card->qdio.out_qs[i]);
992 }
993 kfree(card->qdio.out_qs);
994 card->qdio.out_qs = NULL;
995 }
996}
997
998static void qeth_clean_channel(struct qeth_channel *channel)
999{
1000 int cnt;
1001
d11ba0c4 1002 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1003 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1004 kfree(channel->iob[cnt].data);
1005}
1006
1007static int qeth_is_1920_device(struct qeth_card *card)
1008{
1009 int single_queue = 0;
1010 struct ccw_device *ccwdev;
1011 struct channelPath_dsc {
1012 u8 flags;
1013 u8 lsn;
1014 u8 desc;
1015 u8 chpid;
1016 u8 swla;
1017 u8 zeroes;
1018 u8 chla;
1019 u8 chpp;
1020 } *chp_dsc;
1021
d11ba0c4 1022 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
4a71df50
FB		 1023
1024 ccwdev = card->data.ccwdev;
1025 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1026 if (chp_dsc != NULL) {
1027 /* CHPP field bit 6 == 1 -> single queue */
1028 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1029 kfree(chp_dsc);
1030 }
d11ba0c4 1031 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
4a71df50
FB		 1032 return single_queue;
1033}
1034
1035static void qeth_init_qdio_info(struct qeth_card *card)
1036{
d11ba0c4 1037 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1038 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1039 /* inbound */
1040 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1041 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1042 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1043 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1044 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1045}
1046
1047static void qeth_set_intial_options(struct qeth_card *card)
1048{
1049 card->options.route4.type = NO_ROUTER;
1050 card->options.route6.type = NO_ROUTER;
1051 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1052 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1053 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1054 card->options.fake_broadcast = 0;
1055 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1056 card->options.fake_ll = 0;
1057 card->options.performance_stats = 0;
1058 card->options.rx_sg_cb = QETH_RX_SG_CB;
1059}
1060
1061static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1062{
1063 unsigned long flags;
1064 int rc = 0;
1065
1066 spin_lock_irqsave(&card->thread_mask_lock, flags);
d11ba0c4 1067 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
4a71df50
FB		 1068 (u8) card->thread_start_mask,
1069 (u8) card->thread_allowed_mask,
1070 (u8) card->thread_running_mask);
1071 rc = (card->thread_start_mask & thread);
1072 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1073 return rc;
1074}
1075
1076static void qeth_start_kernel_thread(struct work_struct *work)
1077{
1078 struct qeth_card *card = container_of(work, struct qeth_card,
1079 kernel_thread_starter);
d11ba0c4 1080 QETH_DBF_TEXT(TRACE , 2, "strthrd");
4a71df50
FB		 1081
1082 if (card->read.state != CH_STATE_UP &&
1083 card->write.state != CH_STATE_UP)
1084 return;
1085 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1086 kthread_run(card->discipline.recover, (void *) card,
1087 "qeth_recover");
1088}
1089
1090static int qeth_setup_card(struct qeth_card *card)
1091{
1092
d11ba0c4
PT		 1093 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1094 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1095
1096 card->read.state = CH_STATE_DOWN;
1097 card->write.state = CH_STATE_DOWN;
1098 card->data.state = CH_STATE_DOWN;
1099 card->state = CARD_STATE_DOWN;
1100 card->lan_online = 0;
1101 card->use_hard_stop = 0;
1102 card->dev = NULL;
1103 spin_lock_init(&card->vlanlock);
1104 spin_lock_init(&card->mclock);
1105 card->vlangrp = NULL;
1106 spin_lock_init(&card->lock);
1107 spin_lock_init(&card->ip_lock);
1108 spin_lock_init(&card->thread_mask_lock);
1109 card->thread_start_mask = 0;
1110 card->thread_allowed_mask = 0;
1111 card->thread_running_mask = 0;
1112 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1113 INIT_LIST_HEAD(&card->ip_list);
1114 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1115 if (!card->ip_tbd_list) {
d11ba0c4 1116 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
4a71df50
FB		 1117 return -ENOMEM;
1118 }
1119 INIT_LIST_HEAD(card->ip_tbd_list);
1120 INIT_LIST_HEAD(&card->cmd_waiter_list);
1121 init_waitqueue_head(&card->wait_q);
1122 /* intial options */
1123 qeth_set_intial_options(card);
1124 /* IP address takeover */
1125 INIT_LIST_HEAD(&card->ipato.entries);
1126 card->ipato.enabled = 0;
1127 card->ipato.invert4 = 0;
1128 card->ipato.invert6 = 0;
1129 /* init QDIO stuff */
1130 qeth_init_qdio_info(card);
1131 return 0;
1132}
1133
1134static struct qeth_card *qeth_alloc_card(void)
1135{
1136 struct qeth_card *card;
1137
d11ba0c4 1138 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1139 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1140 if (!card)
1141 return NULL;
d11ba0c4 1142 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1143 if (qeth_setup_channel(&card->read)) {
1144 kfree(card);
1145 return NULL;
1146 }
1147 if (qeth_setup_channel(&card->write)) {
1148 qeth_clean_channel(&card->read);
1149 kfree(card);
1150 return NULL;
1151 }
1152 card->options.layer2 = -1;
1153 return card;
1154}
1155
1156static int qeth_determine_card_type(struct qeth_card *card)
1157{
1158 int i = 0;
1159
d11ba0c4 1160 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1161
1162 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1163 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1164 while (known_devices[i][4]) {
1165 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1166 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1167 card->info.type = known_devices[i][4];
1168 card->qdio.no_out_queues = known_devices[i][8];
1169 card->info.is_multicast_different = known_devices[i][9];
1170 if (qeth_is_1920_device(card)) {
1171 PRINT_INFO("Priority Queueing not able "
1172 "due to hardware limitations!\n");
1173 card->qdio.no_out_queues = 1;
1174 card->qdio.default_out_queue = 0;
1175 }
1176 return 0;
1177 }
1178 i++;
1179 }
1180 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1181 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1182 return -ENOENT;
1183}
1184
1185static int qeth_clear_channel(struct qeth_channel *channel)
1186{
1187 unsigned long flags;
1188 struct qeth_card *card;
1189 int rc;
1190
d11ba0c4 1191 QETH_DBF_TEXT(TRACE, 3, "clearch");
4a71df50
FB		 1192 card = CARD_FROM_CDEV(channel->ccwdev);
1193 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1194 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1195 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1196
1197 if (rc)
1198 return rc;
1199 rc = wait_event_interruptible_timeout(card->wait_q,
1200 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1201 if (rc == -ERESTARTSYS)
1202 return rc;
1203 if (channel->state != CH_STATE_STOPPED)
1204 return -ETIME;
1205 channel->state = CH_STATE_DOWN;
1206 return 0;
1207}
1208
1209static int qeth_halt_channel(struct qeth_channel *channel)
1210{
1211 unsigned long flags;
1212 struct qeth_card *card;
1213 int rc;
1214
d11ba0c4 1215 QETH_DBF_TEXT(TRACE, 3, "haltch");
4a71df50
FB		 1216 card = CARD_FROM_CDEV(channel->ccwdev);
1217 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1218 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1219 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1220
1221 if (rc)
1222 return rc;
1223 rc = wait_event_interruptible_timeout(card->wait_q,
1224 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1225 if (rc == -ERESTARTSYS)
1226 return rc;
1227 if (channel->state != CH_STATE_HALTED)
1228 return -ETIME;
1229 return 0;
1230}
1231
1232static int qeth_halt_channels(struct qeth_card *card)
1233{
1234 int rc1 = 0, rc2 = 0, rc3 = 0;
1235
d11ba0c4 1236 QETH_DBF_TEXT(TRACE, 3, "haltchs");
4a71df50
FB		 1237 rc1 = qeth_halt_channel(&card->read);
1238 rc2 = qeth_halt_channel(&card->write);
1239 rc3 = qeth_halt_channel(&card->data);
1240 if (rc1)
1241 return rc1;
1242 if (rc2)
1243 return rc2;
1244 return rc3;
1245}
1246
1247static int qeth_clear_channels(struct qeth_card *card)
1248{
1249 int rc1 = 0, rc2 = 0, rc3 = 0;
1250
d11ba0c4 1251 QETH_DBF_TEXT(TRACE, 3, "clearchs");
4a71df50
FB		 1252 rc1 = qeth_clear_channel(&card->read);
1253 rc2 = qeth_clear_channel(&card->write);
1254 rc3 = qeth_clear_channel(&card->data);
1255 if (rc1)
1256 return rc1;
1257 if (rc2)
1258 return rc2;
1259 return rc3;
1260}
1261
1262static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1263{
1264 int rc = 0;
1265
d11ba0c4
PT		 1266 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1267 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
4a71df50
FB		 1268
1269 if (halt)
1270 rc = qeth_halt_channels(card);
1271 if (rc)
1272 return rc;
1273 return qeth_clear_channels(card);
1274}
1275
1276int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1277{
1278 int rc = 0;
1279
d11ba0c4 1280 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
4a71df50
FB		 1281 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1282 QETH_QDIO_CLEANING)) {
1283 case QETH_QDIO_ESTABLISHED:
1284 if (card->info.type == QETH_CARD_TYPE_IQD)
1285 rc = qdio_cleanup(CARD_DDEV(card),
1286 QDIO_FLAG_CLEANUP_USING_HALT);
1287 else
1288 rc = qdio_cleanup(CARD_DDEV(card),
1289 QDIO_FLAG_CLEANUP_USING_CLEAR);
1290 if (rc)
d11ba0c4 1291 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
4a71df50
FB		 1292 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1293 break;
1294 case QETH_QDIO_CLEANING:
1295 return rc;
1296 default:
1297 break;
1298 }
1299 rc = qeth_clear_halt_card(card, use_halt);
1300 if (rc)
d11ba0c4 1301 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
4a71df50
FB		 1302 card->state = CARD_STATE_DOWN;
1303 return rc;
1304}
1305EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1306
1307static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1308 int *length)
1309{
1310 struct ciw *ciw;
1311 char *rcd_buf;
1312 int ret;
1313 struct qeth_channel *channel = &card->data;
1314 unsigned long flags;
1315
1316 /*
1317 * scan for RCD command in extended SenseID data
1318 */
1319 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1320 if (!ciw || ciw->cmd == 0)
1321 return -EOPNOTSUPP;
1322 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1323 if (!rcd_buf)
1324 return -ENOMEM;
1325
1326 channel->ccw.cmd_code = ciw->cmd;
1327 channel->ccw.cda = (__u32) __pa(rcd_buf);
1328 channel->ccw.count = ciw->count;
1329 channel->ccw.flags = CCW_FLAG_SLI;
1330 channel->state = CH_STATE_RCD;
1331 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1332 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1333 QETH_RCD_PARM, LPM_ANYPATH, 0,
1334 QETH_RCD_TIMEOUT);
1335 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1336 if (!ret)
1337 wait_event(card->wait_q,
1338 (channel->state == CH_STATE_RCD_DONE ||
1339 channel->state == CH_STATE_DOWN));
1340 if (channel->state == CH_STATE_DOWN)
1341 ret = -EIO;
1342 else
1343 channel->state = CH_STATE_DOWN;
1344 if (ret) {
1345 kfree(rcd_buf);
1346 *buffer = NULL;
1347 *length = 0;
1348 } else {
1349 *length = ciw->count;
1350 *buffer = rcd_buf;
1351 }
1352 return ret;
1353}
1354
1355static int qeth_get_unitaddr(struct qeth_card *card)
1356{
1357 int length;
1358 char *prcd;
1359 int rc;
1360
d11ba0c4 1361 QETH_DBF_TEXT(SETUP, 2, "getunit");
4a71df50
FB		 1362 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1363 if (rc) {
1364 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1365 CARD_DDEV_ID(card), rc);
1366 return rc;
1367 }
1368 card->info.chpid = prcd[30];
1369 card->info.unit_addr2 = prcd[31];
1370 card->info.cula = prcd[63];
1371 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1372 (prcd[0x11] == _ascebc['M']));
1373 kfree(prcd);
1374 return 0;
1375}
1376
1377static void qeth_init_tokens(struct qeth_card *card)
1378{
1379 card->token.issuer_rm_w = 0x00010103UL;
1380 card->token.cm_filter_w = 0x00010108UL;
1381 card->token.cm_connection_w = 0x0001010aUL;
1382 card->token.ulp_filter_w = 0x0001010bUL;
1383 card->token.ulp_connection_w = 0x0001010dUL;
1384}
1385
1386static void qeth_init_func_level(struct qeth_card *card)
1387{
1388 if (card->ipato.enabled) {
1389 if (card->info.type == QETH_CARD_TYPE_IQD)
1390 card->info.func_level =
1391 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1392 else
1393 card->info.func_level =
1394 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1395 } else {
1396 if (card->info.type == QETH_CARD_TYPE_IQD)
1397 /*FIXME:why do we have same values for dis and ena for
1398 osae??? */
1399 card->info.func_level =
1400 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1401 else
1402 card->info.func_level =
1403 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1404 }
1405}
1406
4a71df50
FB		 1407static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1408 void (*idx_reply_cb)(struct qeth_channel *,
1409 struct qeth_cmd_buffer *))
1410{
1411 struct qeth_cmd_buffer *iob;
1412 unsigned long flags;
1413 int rc;
1414 struct qeth_card *card;
1415
d11ba0c4 1416 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1417 card = CARD_FROM_CDEV(channel->ccwdev);
1418 iob = qeth_get_buffer(channel);
1419 iob->callback = idx_reply_cb;
1420 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1421 channel->ccw.count = QETH_BUFSIZE;
1422 channel->ccw.cda = (__u32) __pa(iob->data);
1423
1424 wait_event(card->wait_q,
1425 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1426 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1427 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1428 rc = ccw_device_start(channel->ccwdev,
1429 &channel->ccw, (addr_t) iob, 0, 0);
1430 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1431
1432 if (rc) {
14cc21b6 1433 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1434 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1435 atomic_set(&channel->irq_pending, 0);
1436 wake_up(&card->wait_q);
1437 return rc;
1438 }
1439 rc = wait_event_interruptible_timeout(card->wait_q,
1440 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1441 if (rc == -ERESTARTSYS)
1442 return rc;
1443 if (channel->state != CH_STATE_UP) {
1444 rc = -ETIME;
d11ba0c4 1445 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1446 qeth_clear_cmd_buffers(channel);
1447 } else
1448 rc = 0;
1449 return rc;
1450}
1451
1452static int qeth_idx_activate_channel(struct qeth_channel *channel,
1453 void (*idx_reply_cb)(struct qeth_channel *,
1454 struct qeth_cmd_buffer *))
1455{
1456 struct qeth_card *card;
1457 struct qeth_cmd_buffer *iob;
1458 unsigned long flags;
1459 __u16 temp;
1460 __u8 tmp;
1461 int rc;
f06f6f32 1462 struct ccw_dev_id temp_devid;
4a71df50
FB		 1463
1464 card = CARD_FROM_CDEV(channel->ccwdev);
1465
d11ba0c4 1466 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1467
1468 iob = qeth_get_buffer(channel);
1469 iob->callback = idx_reply_cb;
1470 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1471 channel->ccw.count = IDX_ACTIVATE_SIZE;
1472 channel->ccw.cda = (__u32) __pa(iob->data);
1473 if (channel == &card->write) {
1474 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1475 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1476 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1477 card->seqno.trans_hdr++;
1478 } else {
1479 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1480 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1481 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1482 }
1483 tmp = ((__u8)card->info.portno) | 0x80;
1484 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1485 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1486 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1487 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1488 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1489 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1490 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1491 temp = (card->info.cula << 8) + card->info.unit_addr2;
1492 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1493
1494 wait_event(card->wait_q,
1495 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1496 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1497 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1498 rc = ccw_device_start(channel->ccwdev,
1499 &channel->ccw, (addr_t) iob, 0, 0);
1500 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1501
1502 if (rc) {
14cc21b6
FB		 1503 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1504 rc);
d11ba0c4 1505 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1506 atomic_set(&channel->irq_pending, 0);
1507 wake_up(&card->wait_q);
1508 return rc;
1509 }
1510 rc = wait_event_interruptible_timeout(card->wait_q,
1511 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1512 if (rc == -ERESTARTSYS)
1513 return rc;
1514 if (channel->state != CH_STATE_ACTIVATING) {
1515 PRINT_WARN("IDX activate timed out!\n");
d11ba0c4 1516 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1517 qeth_clear_cmd_buffers(channel);
1518 return -ETIME;
1519 }
1520 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1521}
1522
1523static int qeth_peer_func_level(int level)
1524{
1525 if ((level & 0xff) == 8)
1526 return (level & 0xff) + 0x400;
1527 if (((level >> 8) & 3) == 1)
1528 return (level & 0xff) + 0x200;
1529 return level;
1530}
1531
1532static void qeth_idx_write_cb(struct qeth_channel *channel,
1533 struct qeth_cmd_buffer *iob)
1534{
1535 struct qeth_card *card;
1536 __u16 temp;
1537
d11ba0c4 1538 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1539
1540 if (channel->state == CH_STATE_DOWN) {
1541 channel->state = CH_STATE_ACTIVATING;
1542 goto out;
1543 }
1544 card = CARD_FROM_CDEV(channel->ccwdev);
1545
1546 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1547 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1548 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1549 "adapter exclusively used by another host\n",
1550 CARD_WDEV_ID(card));
1551 else
1552 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1553 "negative reply\n", CARD_WDEV_ID(card));
1554 goto out;
1555 }
1556 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1557 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1558 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1559 "function level mismatch "
1560 "(sent: 0x%x, received: 0x%x)\n",
1561 CARD_WDEV_ID(card), card->info.func_level, temp);
1562 goto out;
1563 }
1564 channel->state = CH_STATE_UP;
1565out:
1566 qeth_release_buffer(channel, iob);
1567}
1568
1569static void qeth_idx_read_cb(struct qeth_channel *channel,
1570 struct qeth_cmd_buffer *iob)
1571{
1572 struct qeth_card *card;
1573 __u16 temp;
1574
d11ba0c4 1575 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1576 if (channel->state == CH_STATE_DOWN) {
1577 channel->state = CH_STATE_ACTIVATING;
1578 goto out;
1579 }
1580
1581 card = CARD_FROM_CDEV(channel->ccwdev);
1582 if (qeth_check_idx_response(iob->data))
1583 goto out;
1584
1585 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1586 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1587 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1588 "adapter exclusively used by another host\n",
1589 CARD_RDEV_ID(card));
1590 else
1591 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1592 "negative reply\n", CARD_RDEV_ID(card));
1593 goto out;
1594 }
1595
1596/**
1597 * temporary fix for microcode bug
1598 * to revert it,replace OR by AND
1599 */
1600 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1601 (card->info.type == QETH_CARD_TYPE_OSAE))
1602 card->info.portname_required = 1;
1603
1604 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1605 if (temp != qeth_peer_func_level(card->info.func_level)) {
1606 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1607 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1608 CARD_RDEV_ID(card), card->info.func_level, temp);
1609 goto out;
1610 }
1611 memcpy(&card->token.issuer_rm_r,
1612 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1613 QETH_MPC_TOKEN_LENGTH);
1614 memcpy(&card->info.mcl_level[0],
1615 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1616 channel->state = CH_STATE_UP;
1617out:
1618 qeth_release_buffer(channel, iob);
1619}
1620
1621void qeth_prepare_control_data(struct qeth_card *card, int len,
1622 struct qeth_cmd_buffer *iob)
1623{
1624 qeth_setup_ccw(&card->write, iob->data, len);
1625 iob->callback = qeth_release_buffer;
1626
1627 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1628 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1629 card->seqno.trans_hdr++;
1630 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1631 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1632 card->seqno.pdu_hdr++;
1633 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1634 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1635 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1636}
1637EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1638
1639int qeth_send_control_data(struct qeth_card *card, int len,
1640 struct qeth_cmd_buffer *iob,
1641 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1642 unsigned long),
1643 void *reply_param)
1644{
1645 int rc;
1646 unsigned long flags;
1647 struct qeth_reply *reply = NULL;
1648 unsigned long timeout;
1649
d11ba0c4 1650 QETH_DBF_TEXT(TRACE, 2, "sendctl");
4a71df50
FB		 1651
1652 reply = qeth_alloc_reply(card);
1653 if (!reply) {
4a71df50
FB		 1654 return -ENOMEM;
1655 }
1656 reply->callback = reply_cb;
1657 reply->param = reply_param;
1658 if (card->state == CARD_STATE_DOWN)
1659 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1660 else
1661 reply->seqno = card->seqno.ipa++;
1662 init_waitqueue_head(&reply->wait_q);
1663 spin_lock_irqsave(&card->lock, flags);
1664 list_add_tail(&reply->list, &card->cmd_waiter_list);
1665 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1666 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1667
1668 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1669 qeth_prepare_control_data(card, len, iob);
1670
1671 if (IS_IPA(iob->data))
1672 timeout = jiffies + QETH_IPA_TIMEOUT;
1673 else
1674 timeout = jiffies + QETH_TIMEOUT;
1675
d11ba0c4 1676 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 1677 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1678 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1679 (addr_t) iob, 0, 0);
1680 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1681 if (rc) {
1682 PRINT_WARN("qeth_send_control_data: "
1683 "ccw_device_start rc = %i\n", rc);
d11ba0c4 1684 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
4a71df50
FB		 1685 spin_lock_irqsave(&card->lock, flags);
1686 list_del_init(&reply->list);
1687 qeth_put_reply(reply);
1688 spin_unlock_irqrestore(&card->lock, flags);
1689 qeth_release_buffer(iob->channel, iob);
1690 atomic_set(&card->write.irq_pending, 0);
1691 wake_up(&card->wait_q);
1692 return rc;
1693 }
1694 while (!atomic_read(&reply->received)) {
1695 if (time_after(jiffies, timeout)) {
1696 spin_lock_irqsave(&reply->card->lock, flags);
1697 list_del_init(&reply->list);
1698 spin_unlock_irqrestore(&reply->card->lock, flags);
1699 reply->rc = -ETIME;
1700 atomic_inc(&reply->received);
1701 wake_up(&reply->wait_q);
1702 }
1703 cpu_relax();
1704 };
1705 rc = reply->rc;
1706 qeth_put_reply(reply);
1707 return rc;
1708}
1709EXPORT_SYMBOL_GPL(qeth_send_control_data);
1710
1711static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1712 unsigned long data)
1713{
1714 struct qeth_cmd_buffer *iob;
1715
d11ba0c4 1716 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 1717
1718 iob = (struct qeth_cmd_buffer *) data;
1719 memcpy(&card->token.cm_filter_r,
1720 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1721 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1722 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1723 return 0;
1724}
1725
1726static int qeth_cm_enable(struct qeth_card *card)
1727{
1728 int rc;
1729 struct qeth_cmd_buffer *iob;
1730
d11ba0c4 1731 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 1732
1733 iob = qeth_wait_for_buffer(&card->write);
1734 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1735 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1736 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1737 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1738 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1739
1740 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1741 qeth_cm_enable_cb, NULL);
1742 return rc;
1743}
1744
1745static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1746 unsigned long data)
1747{
1748
1749 struct qeth_cmd_buffer *iob;
1750
d11ba0c4 1751 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 1752
1753 iob = (struct qeth_cmd_buffer *) data;
1754 memcpy(&card->token.cm_connection_r,
1755 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1756 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1757 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1758 return 0;
1759}
1760
1761static int qeth_cm_setup(struct qeth_card *card)
1762{
1763 int rc;
1764 struct qeth_cmd_buffer *iob;
1765
d11ba0c4 1766 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 1767
1768 iob = qeth_wait_for_buffer(&card->write);
1769 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1770 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1771 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1772 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1773 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1774 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1775 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1776 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1777 qeth_cm_setup_cb, NULL);
1778 return rc;
1779
1780}
1781
1782static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1783{
1784 switch (card->info.type) {
1785 case QETH_CARD_TYPE_UNKNOWN:
1786 return 1500;
1787 case QETH_CARD_TYPE_IQD:
1788 return card->info.max_mtu;
1789 case QETH_CARD_TYPE_OSAE:
1790 switch (card->info.link_type) {
1791 case QETH_LINK_TYPE_HSTR:
1792 case QETH_LINK_TYPE_LANE_TR:
1793 return 2000;
1794 default:
1795 return 1492;
1796 }
1797 default:
1798 return 1500;
1799 }
1800}
1801
1802static inline int qeth_get_max_mtu_for_card(int cardtype)
1803{
1804 switch (cardtype) {
1805
1806 case QETH_CARD_TYPE_UNKNOWN:
1807 case QETH_CARD_TYPE_OSAE:
1808 case QETH_CARD_TYPE_OSN:
1809 return 61440;
1810 case QETH_CARD_TYPE_IQD:
1811 return 57344;
1812 default:
1813 return 1500;
1814 }
1815}
1816
1817static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1818{
1819 switch (cardtype) {
1820 case QETH_CARD_TYPE_IQD:
1821 return 1;
1822 default:
1823 return 0;
1824 }
1825}
1826
1827static inline int qeth_get_mtu_outof_framesize(int framesize)
1828{
1829 switch (framesize) {
1830 case 0x4000:
1831 return 8192;
1832 case 0x6000:
1833 return 16384;
1834 case 0xa000:
1835 return 32768;
1836 case 0xffff:
1837 return 57344;
1838 default:
1839 return 0;
1840 }
1841}
1842
1843static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1844{
1845 switch (card->info.type) {
1846 case QETH_CARD_TYPE_OSAE:
1847 return ((mtu >= 576) && (mtu <= 61440));
1848 case QETH_CARD_TYPE_IQD:
1849 return ((mtu >= 576) &&
1850 (mtu <= card->info.max_mtu + 4096 - 32));
1851 case QETH_CARD_TYPE_OSN:
1852 case QETH_CARD_TYPE_UNKNOWN:
1853 default:
1854 return 1;
1855 }
1856}
1857
1858static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1859 unsigned long data)
1860{
1861
1862 __u16 mtu, framesize;
1863 __u16 len;
1864 __u8 link_type;
1865 struct qeth_cmd_buffer *iob;
1866
d11ba0c4 1867 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 1868
1869 iob = (struct qeth_cmd_buffer *) data;
1870 memcpy(&card->token.ulp_filter_r,
1871 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1872 QETH_MPC_TOKEN_LENGTH);
1873 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1874 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1875 mtu = qeth_get_mtu_outof_framesize(framesize);
1876 if (!mtu) {
1877 iob->rc = -EINVAL;
d11ba0c4 1878 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1879 return 0;
1880 }
1881 card->info.max_mtu = mtu;
1882 card->info.initial_mtu = mtu;
1883 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1884 } else {
1885 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1886 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1887 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1888 }
1889
1890 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1891 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1892 memcpy(&link_type,
1893 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1894 card->info.link_type = link_type;
1895 } else
1896 card->info.link_type = 0;
d11ba0c4 1897 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1898 return 0;
1899}
1900
1901static int qeth_ulp_enable(struct qeth_card *card)
1902{
1903 int rc;
1904 char prot_type;
1905 struct qeth_cmd_buffer *iob;
1906
1907 /*FIXME: trace view callbacks*/
d11ba0c4 1908 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 1909
1910 iob = qeth_wait_for_buffer(&card->write);
1911 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1912
1913 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1914 (__u8) card->info.portno;
1915 if (card->options.layer2)
1916 if (card->info.type == QETH_CARD_TYPE_OSN)
1917 prot_type = QETH_PROT_OSN2;
1918 else
1919 prot_type = QETH_PROT_LAYER2;
1920 else
1921 prot_type = QETH_PROT_TCPIP;
1922
1923 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1924 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1925 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1926 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1927 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1928 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1929 card->info.portname, 9);
1930 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1931 qeth_ulp_enable_cb, NULL);
1932 return rc;
1933
1934}
1935
1936static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1937 unsigned long data)
1938{
1939 struct qeth_cmd_buffer *iob;
1940
d11ba0c4 1941 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 1942
1943 iob = (struct qeth_cmd_buffer *) data;
1944 memcpy(&card->token.ulp_connection_r,
1945 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1946 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1947 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1948 return 0;
1949}
1950
1951static int qeth_ulp_setup(struct qeth_card *card)
1952{
1953 int rc;
1954 __u16 temp;
1955 struct qeth_cmd_buffer *iob;
1956 struct ccw_dev_id dev_id;
1957
d11ba0c4 1958 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 1959
1960 iob = qeth_wait_for_buffer(&card->write);
1961 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1962
1963 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1964 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1965 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1966 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1967 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1968 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1969
1970 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1971 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1972 temp = (card->info.cula << 8) + card->info.unit_addr2;
1973 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
1974 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
1975 qeth_ulp_setup_cb, NULL);
1976 return rc;
1977}
1978
1979static int qeth_alloc_qdio_buffers(struct qeth_card *card)
1980{
1981 int i, j;
1982
d11ba0c4 1983 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 1984
1985 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
1986 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
1987 return 0;
1988
1989 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
508b3c4f 1990 GFP_KERNEL);
4a71df50
FB		 1991 if (!card->qdio.in_q)
1992 goto out_nomem;
d11ba0c4
PT		 1993 QETH_DBF_TEXT(SETUP, 2, "inq");
1994 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 1995 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
1996 /* give inbound qeth_qdio_buffers their qdio_buffers */
1997 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
1998 card->qdio.in_q->bufs[i].buffer =
1999 &card->qdio.in_q->qdio_bufs[i];
2000 /* inbound buffer pool */
2001 if (qeth_alloc_buffer_pool(card))
2002 goto out_freeinq;
2003 /* outbound */
2004 card->qdio.out_qs =
2005 kmalloc(card->qdio.no_out_queues *
2006 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2007 if (!card->qdio.out_qs)
2008 goto out_freepool;
2009 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2010 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2011 GFP_KERNEL);
4a71df50
FB		 2012 if (!card->qdio.out_qs[i])
2013 goto out_freeoutq;
d11ba0c4
PT		 2014 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2015 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2016 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2017 card->qdio.out_qs[i]->queue_no = i;
2018 /* give outbound qeth_qdio_buffers their qdio_buffers */
2019 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2020 card->qdio.out_qs[i]->bufs[j].buffer =
2021 &card->qdio.out_qs[i]->qdio_bufs[j];
2022 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2023 skb_list);
2024 lockdep_set_class(
2025 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2026 &qdio_out_skb_queue_key);
2027 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2028 }
2029 }
2030 return 0;
2031
2032out_freeoutq:
2033 while (i > 0)
2034 kfree(card->qdio.out_qs[--i]);
2035 kfree(card->qdio.out_qs);
2036 card->qdio.out_qs = NULL;
2037out_freepool:
2038 qeth_free_buffer_pool(card);
2039out_freeinq:
2040 kfree(card->qdio.in_q);
2041 card->qdio.in_q = NULL;
2042out_nomem:
2043 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2044 return -ENOMEM;
2045}
2046
2047static void qeth_create_qib_param_field(struct qeth_card *card,
2048 char *param_field)
2049{
2050
2051 param_field[0] = _ascebc['P'];
2052 param_field[1] = _ascebc['C'];
2053 param_field[2] = _ascebc['I'];
2054 param_field[3] = _ascebc['T'];
2055 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2056 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2057 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2058}
2059
2060static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2061 char *param_field)
2062{
2063 param_field[16] = _ascebc['B'];
2064 param_field[17] = _ascebc['L'];
2065 param_field[18] = _ascebc['K'];
2066 param_field[19] = _ascebc['T'];
2067 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2068 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2069 *((unsigned int *) (&param_field[28])) =
2070 card->info.blkt.inter_packet_jumbo;
2071}
2072
2073static int qeth_qdio_activate(struct qeth_card *card)
2074{
d11ba0c4 2075 QETH_DBF_TEXT(SETUP, 3, "qdioact");
4a71df50
FB		 2076 return qdio_activate(CARD_DDEV(card), 0);
2077}
2078
2079static int qeth_dm_act(struct qeth_card *card)
2080{
2081 int rc;
2082 struct qeth_cmd_buffer *iob;
2083
d11ba0c4 2084 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2085
2086 iob = qeth_wait_for_buffer(&card->write);
2087 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2088
2089 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2090 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2091 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2092 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2093 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2094 return rc;
2095}
2096
2097static int qeth_mpc_initialize(struct qeth_card *card)
2098{
2099 int rc;
2100
d11ba0c4 2101 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2102
2103 rc = qeth_issue_next_read(card);
2104 if (rc) {
d11ba0c4 2105 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2106 return rc;
2107 }
2108 rc = qeth_cm_enable(card);
2109 if (rc) {
d11ba0c4 2110 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2111 goto out_qdio;
2112 }
2113 rc = qeth_cm_setup(card);
2114 if (rc) {
d11ba0c4 2115 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2116 goto out_qdio;
2117 }
2118 rc = qeth_ulp_enable(card);
2119 if (rc) {
d11ba0c4 2120 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2121 goto out_qdio;
2122 }
2123 rc = qeth_ulp_setup(card);
2124 if (rc) {
d11ba0c4 2125 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2126 goto out_qdio;
2127 }
2128 rc = qeth_alloc_qdio_buffers(card);
2129 if (rc) {
d11ba0c4 2130 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2131 goto out_qdio;
2132 }
2133 rc = qeth_qdio_establish(card);
2134 if (rc) {
d11ba0c4 2135 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2136 qeth_free_qdio_buffers(card);
2137 goto out_qdio;
2138 }
2139 rc = qeth_qdio_activate(card);
2140 if (rc) {
d11ba0c4 2141 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2142 goto out_qdio;
2143 }
2144 rc = qeth_dm_act(card);
2145 if (rc) {
d11ba0c4 2146 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2147 goto out_qdio;
2148 }
2149
2150 return 0;
2151out_qdio:
2152 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2153 return rc;
2154}
2155
2156static void qeth_print_status_with_portname(struct qeth_card *card)
2157{
2158 char dbf_text[15];
2159 int i;
2160
2161 sprintf(dbf_text, "%s", card->info.portname + 1);
2162 for (i = 0; i < 8; i++)
2163 dbf_text[i] =
2164 (char) _ebcasc[(__u8) dbf_text[i]];
2165 dbf_text[8] = 0;
2166 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n"
2167 "with link type %s (portname: %s)\n",
2168 CARD_RDEV_ID(card),
2169 CARD_WDEV_ID(card),
2170 CARD_DDEV_ID(card),
2171 qeth_get_cardname(card),
2172 (card->info.mcl_level[0]) ? " (level: " : "",
2173 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2174 (card->info.mcl_level[0]) ? ")" : "",
2175 qeth_get_cardname_short(card),
2176 dbf_text);
2177
2178}
2179
2180static void qeth_print_status_no_portname(struct qeth_card *card)
2181{
2182 if (card->info.portname[0])
2183 PRINT_INFO("Device %s/%s/%s is a%s "
2184 "card%s%s%s\nwith link type %s "
2185 "(no portname needed by interface).\n",
2186 CARD_RDEV_ID(card),
2187 CARD_WDEV_ID(card),
2188 CARD_DDEV_ID(card),
2189 qeth_get_cardname(card),
2190 (card->info.mcl_level[0]) ? " (level: " : "",
2191 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2192 (card->info.mcl_level[0]) ? ")" : "",
2193 qeth_get_cardname_short(card));
2194 else
2195 PRINT_INFO("Device %s/%s/%s is a%s "
2196 "card%s%s%s\nwith link type %s.\n",
2197 CARD_RDEV_ID(card),
2198 CARD_WDEV_ID(card),
2199 CARD_DDEV_ID(card),
2200 qeth_get_cardname(card),
2201 (card->info.mcl_level[0]) ? " (level: " : "",
2202 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2203 (card->info.mcl_level[0]) ? ")" : "",
2204 qeth_get_cardname_short(card));
2205}
2206
2207void qeth_print_status_message(struct qeth_card *card)
2208{
2209 switch (card->info.type) {
2210 case QETH_CARD_TYPE_OSAE:
2211 /* VM will use a non-zero first character
2212 * to indicate a HiperSockets like reporting
2213 * of the level OSA sets the first character to zero
2214 * */
2215 if (!card->info.mcl_level[0]) {
2216 sprintf(card->info.mcl_level, "%02x%02x",
2217 card->info.mcl_level[2],
2218 card->info.mcl_level[3]);
2219
2220 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2221 break;
2222 }
2223 /* fallthrough */
2224 case QETH_CARD_TYPE_IQD:
2225 if (card->info.guestlan) {
2226 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2227 card->info.mcl_level[0]];
2228 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2229 card->info.mcl_level[1]];
2230 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2231 card->info.mcl_level[2]];
2232 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2233 card->info.mcl_level[3]];
2234 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2235 }
2236 break;
2237 default:
2238 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2239 }
2240 if (card->info.portname_required)
2241 qeth_print_status_with_portname(card);
2242 else
2243 qeth_print_status_no_portname(card);
2244}
2245EXPORT_SYMBOL_GPL(qeth_print_status_message);
2246
4a71df50
FB		 2247static void qeth_initialize_working_pool_list(struct qeth_card *card)
2248{
2249 struct qeth_buffer_pool_entry *entry;
2250
d11ba0c4 2251 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
4a71df50
FB		 2252
2253 list_for_each_entry(entry,
2254 &card->qdio.init_pool.entry_list, init_list) {
2255 qeth_put_buffer_pool_entry(card, entry);
2256 }
2257}
2258
2259static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2260 struct qeth_card *card)
2261{
2262 struct list_head *plh;
2263 struct qeth_buffer_pool_entry *entry;
2264 int i, free;
2265 struct page *page;
2266
2267 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2268 return NULL;
2269
2270 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2271 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2272 free = 1;
2273 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2274 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2275 free = 0;
2276 break;
2277 }
2278 }
2279 if (free) {
2280 list_del_init(&entry->list);
2281 return entry;
2282 }
2283 }
2284
2285 /* no free buffer in pool so take first one and swap pages */
2286 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2287 struct qeth_buffer_pool_entry, list);
2288 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2289 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2290 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2291 if (!page) {
2292 return NULL;
2293 } else {
2294 free_page((unsigned long)entry->elements[i]);
2295 entry->elements[i] = page_address(page);
2296 if (card->options.performance_stats)
2297 card->perf_stats.sg_alloc_page_rx++;
2298 }
2299 }
2300 }
2301 list_del_init(&entry->list);
2302 return entry;
2303}
2304
2305static int qeth_init_input_buffer(struct qeth_card *card,
2306 struct qeth_qdio_buffer *buf)
2307{
2308 struct qeth_buffer_pool_entry *pool_entry;
2309 int i;
2310
2311 pool_entry = qeth_find_free_buffer_pool_entry(card);
2312 if (!pool_entry)
2313 return 1;
2314
2315 /*
2316 * since the buffer is accessed only from the input_tasklet
2317 * there shouldn't be a need to synchronize; also, since we use
2318 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2319 * buffers
2320 */
2321 BUG_ON(!pool_entry);
2322
2323 buf->pool_entry = pool_entry;
2324 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2325 buf->buffer->element[i].length = PAGE_SIZE;
2326 buf->buffer->element[i].addr = pool_entry->elements[i];
2327 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2328 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2329 else
2330 buf->buffer->element[i].flags = 0;
2331 }
2332 return 0;
2333}
2334
2335int qeth_init_qdio_queues(struct qeth_card *card)
2336{
2337 int i, j;
2338 int rc;
2339
d11ba0c4 2340 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2341
2342 /* inbound queue */
2343 memset(card->qdio.in_q->qdio_bufs, 0,
2344 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2345 qeth_initialize_working_pool_list(card);
2346 /*give only as many buffers to hardware as we have buffer pool entries*/
2347 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2348 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2349 card->qdio.in_q->next_buf_to_init =
2350 card->qdio.in_buf_pool.buf_count - 1;
2351 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2352 card->qdio.in_buf_pool.buf_count - 1, NULL);
2353 if (rc) {
d11ba0c4 2354 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2355 return rc;
2356 }
2357 rc = qdio_synchronize(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0);
2358 if (rc) {
d11ba0c4 2359 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2360 return rc;
2361 }
2362 /* outbound queue */
2363 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2364 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2365 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2366 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2367 qeth_clear_output_buffer(card->qdio.out_qs[i],
2368 &card->qdio.out_qs[i]->bufs[j]);
2369 }
2370 card->qdio.out_qs[i]->card = card;
2371 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2372 card->qdio.out_qs[i]->do_pack = 0;
2373 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2374 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2375 atomic_set(&card->qdio.out_qs[i]->state,
2376 QETH_OUT_Q_UNLOCKED);
2377 }
2378 return 0;
2379}
2380EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2381
2382static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2383{
2384 switch (link_type) {
2385 case QETH_LINK_TYPE_HSTR:
2386 return 2;
2387 default:
2388 return 1;
2389 }
2390}
2391
2392static void qeth_fill_ipacmd_header(struct qeth_card *card,
2393 struct qeth_ipa_cmd *cmd, __u8 command,
2394 enum qeth_prot_versions prot)
2395{
2396 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2397 cmd->hdr.command = command;
2398 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2399 cmd->hdr.seqno = card->seqno.ipa;
2400 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2401 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2402 if (card->options.layer2)
2403 cmd->hdr.prim_version_no = 2;
2404 else
2405 cmd->hdr.prim_version_no = 1;
2406 cmd->hdr.param_count = 1;
2407 cmd->hdr.prot_version = prot;
2408 cmd->hdr.ipa_supported = 0;
2409 cmd->hdr.ipa_enabled = 0;
2410}
2411
2412struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2413 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2414{
2415 struct qeth_cmd_buffer *iob;
2416 struct qeth_ipa_cmd *cmd;
2417
2418 iob = qeth_wait_for_buffer(&card->write);
2419 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2420 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2421
2422 return iob;
2423}
2424EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2425
2426void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2427 char prot_type)
2428{
2429 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2430 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2431 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2432 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2433}
2434EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2435
2436int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2437 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2438 unsigned long),
2439 void *reply_param)
2440{
2441 int rc;
2442 char prot_type;
4a71df50 2443
d11ba0c4 2444 QETH_DBF_TEXT(TRACE, 4, "sendipa");
4a71df50
FB		 2445
2446 if (card->options.layer2)
2447 if (card->info.type == QETH_CARD_TYPE_OSN)
2448 prot_type = QETH_PROT_OSN2;
2449 else
2450 prot_type = QETH_PROT_LAYER2;
2451 else
2452 prot_type = QETH_PROT_TCPIP;
2453 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2454 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2455 iob, reply_cb, reply_param);
4a71df50
FB		 2456 return rc;
2457}
2458EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2459
2460static int qeth_send_startstoplan(struct qeth_card *card,
2461 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2462{
2463 int rc;
2464 struct qeth_cmd_buffer *iob;
2465
2466 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2467 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2468
2469 return rc;
2470}
2471
2472int qeth_send_startlan(struct qeth_card *card)
2473{
2474 int rc;
2475
d11ba0c4 2476 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50
FB		 2477
2478 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2479 return rc;
2480}
2481EXPORT_SYMBOL_GPL(qeth_send_startlan);
2482
2483int qeth_send_stoplan(struct qeth_card *card)
2484{
2485 int rc = 0;
2486
2487 /*
2488 * TODO: according to the IPA format document page 14,
2489 * TCP/IP (we!) never issue a STOPLAN
2490 * is this right ?!?
2491 */
d11ba0c4 2492 QETH_DBF_TEXT(SETUP, 2, "stoplan");
4a71df50
FB		 2493
2494 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2495 return rc;
2496}
2497EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2498
2499int qeth_default_setadapterparms_cb(struct qeth_card *card,
2500 struct qeth_reply *reply, unsigned long data)
2501{
2502 struct qeth_ipa_cmd *cmd;
2503
d11ba0c4 2504 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
4a71df50
FB		 2505
2506 cmd = (struct qeth_ipa_cmd *) data;
2507 if (cmd->hdr.return_code == 0)
2508 cmd->hdr.return_code =
2509 cmd->data.setadapterparms.hdr.return_code;
2510 return 0;
2511}
2512EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2513
2514static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2515 struct qeth_reply *reply, unsigned long data)
2516{
2517 struct qeth_ipa_cmd *cmd;
2518
d11ba0c4 2519 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
4a71df50
FB		 2520
2521 cmd = (struct qeth_ipa_cmd *) data;
2522 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2523 card->info.link_type =
2524 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2525 card->options.adp.supported_funcs =
2526 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2527 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2528}
2529
2530struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2531 __u32 command, __u32 cmdlen)
2532{
2533 struct qeth_cmd_buffer *iob;
2534 struct qeth_ipa_cmd *cmd;
2535
2536 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2537 QETH_PROT_IPV4);
2538 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2539 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2540 cmd->data.setadapterparms.hdr.command_code = command;
2541 cmd->data.setadapterparms.hdr.used_total = 1;
2542 cmd->data.setadapterparms.hdr.seq_no = 1;
2543
2544 return iob;
2545}
2546EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2547
2548int qeth_query_setadapterparms(struct qeth_card *card)
2549{
2550 int rc;
2551 struct qeth_cmd_buffer *iob;
2552
d11ba0c4 2553 QETH_DBF_TEXT(TRACE, 3, "queryadp");
4a71df50
FB		 2554 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2555 sizeof(struct qeth_ipacmd_setadpparms));
2556 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2557 return rc;
2558}
2559EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2560
2561int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2562 unsigned int siga_error, const char *dbftext)
2563{
2564 if (qdio_error || siga_error) {
d11ba0c4
PT		 2565 QETH_DBF_TEXT(TRACE, 2, dbftext);
2566 QETH_DBF_TEXT(QERR, 2, dbftext);
2567 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
4a71df50 2568 buf->element[15].flags & 0xff);
d11ba0c4 2569 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
4a71df50 2570 buf->element[14].flags & 0xff);
d11ba0c4
PT		 2571 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2572 QETH_DBF_TEXT_(QERR, 2, " serr=%X", siga_error);
4a71df50
FB		 2573 return 1;
2574 }
2575 return 0;
2576}
2577EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2578
2579void qeth_queue_input_buffer(struct qeth_card *card, int index)
2580{
2581 struct qeth_qdio_q *queue = card->qdio.in_q;
2582 int count;
2583 int i;
2584 int rc;
2585 int newcount = 0;
2586
4a71df50
FB		 2587 count = (index < queue->next_buf_to_init)?
2588 card->qdio.in_buf_pool.buf_count -
2589 (queue->next_buf_to_init - index) :
2590 card->qdio.in_buf_pool.buf_count -
2591 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2592 /* only requeue at a certain threshold to avoid SIGAs */
2593 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2594 for (i = queue->next_buf_to_init;
2595 i < queue->next_buf_to_init + count; ++i) {
2596 if (qeth_init_input_buffer(card,
2597 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2598 break;
2599 } else {
2600 newcount++;
2601 }
2602 }
2603
2604 if (newcount < count) {
2605 /* we are in memory shortage so we switch back to
2606 traditional skb allocation and drop packages */
4a71df50
FB		 2607 atomic_set(&card->force_alloc_skb, 3);
2608 count = newcount;
2609 } else {
4a71df50
FB		 2610 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2611 }
2612
2613 /*
2614 * according to old code it should be avoided to requeue all
2615 * 128 buffers in order to benefit from PCI avoidance.
2616 * this function keeps at least one buffer (the buffer at
2617 * 'index') un-requeued -> this buffer is the first buffer that
2618 * will be requeued the next time
2619 */
2620 if (card->options.performance_stats) {
2621 card->perf_stats.inbound_do_qdio_cnt++;
2622 card->perf_stats.inbound_do_qdio_start_time =
2623 qeth_get_micros();
2624 }
2625 rc = do_QDIO(CARD_DDEV(card),
2626 QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
2627 0, queue->next_buf_to_init, count, NULL);
2628 if (card->options.performance_stats)
2629 card->perf_stats.inbound_do_qdio_time +=
2630 qeth_get_micros() -
2631 card->perf_stats.inbound_do_qdio_start_time;
2632 if (rc) {
2633 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2634 "return %i (device %s).\n",
2635 rc, CARD_DDEV_ID(card));
d11ba0c4
PT		 2636 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2637 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2638 }
2639 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2640 QDIO_MAX_BUFFERS_PER_Q;
2641 }
2642}
2643EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2644
2645static int qeth_handle_send_error(struct qeth_card *card,
2646 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err,
2647 unsigned int siga_err)
2648{
2649 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2650 int cc = siga_err & 3;
2651
d11ba0c4 2652 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
4a71df50
FB		 2653 qeth_check_qdio_errors(buffer->buffer, qdio_err, siga_err, "qouterr");
2654 switch (cc) {
2655 case 0:
2656 if (qdio_err) {
d11ba0c4
PT		 2657 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2658 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2659 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
4a71df50
FB		 2660 (u16)qdio_err, (u8)sbalf15);
2661 return QETH_SEND_ERROR_LINK_FAILURE;
2662 }
2663 return QETH_SEND_ERROR_NONE;
2664 case 2:
2665 if (siga_err & QDIO_SIGA_ERROR_B_BIT_SET) {
d11ba0c4
PT		 2666 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2667 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2668 return QETH_SEND_ERROR_KICK_IT;
2669 }
2670 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2671 return QETH_SEND_ERROR_RETRY;
2672 return QETH_SEND_ERROR_LINK_FAILURE;
2673 /* look at qdio_error and sbalf 15 */
2674 case 1:
d11ba0c4
PT		 2675 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2676 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2677 return QETH_SEND_ERROR_LINK_FAILURE;
2678 case 3:
2679 default:
d11ba0c4
PT		 2680 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2681 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2682 return QETH_SEND_ERROR_KICK_IT;
2683 }
2684}
2685
2686/*
2687 * Switched to packing state if the number of used buffers on a queue
2688 * reaches a certain limit.
2689 */
2690static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2691{
2692 if (!queue->do_pack) {
2693 if (atomic_read(&queue->used_buffers)
2694 >= QETH_HIGH_WATERMARK_PACK){
2695 /* switch non-PACKING -> PACKING */
d11ba0c4 2696 QETH_DBF_TEXT(TRACE, 6, "np->pack");
4a71df50
FB		 2697 if (queue->card->options.performance_stats)
2698 queue->card->perf_stats.sc_dp_p++;
2699 queue->do_pack = 1;
2700 }
2701 }
2702}
2703
2704/*
2705 * Switches from packing to non-packing mode. If there is a packing
2706 * buffer on the queue this buffer will be prepared to be flushed.
2707 * In that case 1 is returned to inform the caller. If no buffer
2708 * has to be flushed, zero is returned.
2709 */
2710static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2711{
2712 struct qeth_qdio_out_buffer *buffer;
2713 int flush_count = 0;
2714
2715 if (queue->do_pack) {
2716 if (atomic_read(&queue->used_buffers)
2717 <= QETH_LOW_WATERMARK_PACK) {
2718 /* switch PACKING -> non-PACKING */
d11ba0c4 2719 QETH_DBF_TEXT(TRACE, 6, "pack->np");
4a71df50
FB		 2720 if (queue->card->options.performance_stats)
2721 queue->card->perf_stats.sc_p_dp++;
2722 queue->do_pack = 0;
2723 /* flush packing buffers */
2724 buffer = &queue->bufs[queue->next_buf_to_fill];
2725 if ((atomic_read(&buffer->state) ==
2726 QETH_QDIO_BUF_EMPTY) &&
2727 (buffer->next_element_to_fill > 0)) {
2728 atomic_set(&buffer->state,
2729 QETH_QDIO_BUF_PRIMED);
2730 flush_count++;
2731 queue->next_buf_to_fill =
2732 (queue->next_buf_to_fill + 1) %
2733 QDIO_MAX_BUFFERS_PER_Q;
2734 }
2735 }
2736 }
2737 return flush_count;
2738}
2739
2740/*
2741 * Called to flush a packing buffer if no more pci flags are on the queue.
2742 * Checks if there is a packing buffer and prepares it to be flushed.
2743 * In that case returns 1, otherwise zero.
2744 */
2745static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2746{
2747 struct qeth_qdio_out_buffer *buffer;
2748
2749 buffer = &queue->bufs[queue->next_buf_to_fill];
2750 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2751 (buffer->next_element_to_fill > 0)) {
2752 /* it's a packing buffer */
2753 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2754 queue->next_buf_to_fill =
2755 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2756 return 1;
2757 }
2758 return 0;
2759}
2760
2761static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int under_int,
2762 int index, int count)
2763{
2764 struct qeth_qdio_out_buffer *buf;
2765 int rc;
2766 int i;
2767 unsigned int qdio_flags;
2768
4a71df50
FB		 2769 for (i = index; i < index + count; ++i) {
2770 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2771 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2772 SBAL_FLAGS_LAST_ENTRY;
2773
2774 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2775 continue;
2776
2777 if (!queue->do_pack) {
2778 if ((atomic_read(&queue->used_buffers) >=
2779 (QETH_HIGH_WATERMARK_PACK -
2780 QETH_WATERMARK_PACK_FUZZ)) &&
2781 !atomic_read(&queue->set_pci_flags_count)) {
2782 /* it's likely that we'll go to packing
2783 * mode soon */
2784 atomic_inc(&queue->set_pci_flags_count);
2785 buf->buffer->element[0].flags |= 0x40;
2786 }
2787 } else {
2788 if (!atomic_read(&queue->set_pci_flags_count)) {
2789 /*
2790 * there's no outstanding PCI any more, so we
2791 * have to request a PCI to be sure the the PCI
2792 * will wake at some time in the future then we
2793 * can flush packed buffers that might still be
2794 * hanging around, which can happen if no
2795 * further send was requested by the stack
2796 */
2797 atomic_inc(&queue->set_pci_flags_count);
2798 buf->buffer->element[0].flags |= 0x40;
2799 }
2800 }
2801 }
2802
2803 queue->card->dev->trans_start = jiffies;
2804 if (queue->card->options.performance_stats) {
2805 queue->card->perf_stats.outbound_do_qdio_cnt++;
2806 queue->card->perf_stats.outbound_do_qdio_start_time =
2807 qeth_get_micros();
2808 }
2809 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2810 if (under_int)
2811 qdio_flags |= QDIO_FLAG_UNDER_INTERRUPT;
2812 if (atomic_read(&queue->set_pci_flags_count))
2813 qdio_flags |= QDIO_FLAG_PCI_OUT;
2814 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2815 queue->queue_no, index, count, NULL);
2816 if (queue->card->options.performance_stats)
2817 queue->card->perf_stats.outbound_do_qdio_time +=
2818 qeth_get_micros() -
2819 queue->card->perf_stats.outbound_do_qdio_start_time;
2820 if (rc) {
d11ba0c4
PT		 2821 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2822 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2823 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
4a71df50
FB		 2824 queue->card->stats.tx_errors += count;
2825 /* this must not happen under normal circumstances. if it
2826 * happens something is really wrong -> recover */
2827 qeth_schedule_recovery(queue->card);
2828 return;
2829 }
2830 atomic_add(count, &queue->used_buffers);
2831 if (queue->card->options.performance_stats)
2832 queue->card->perf_stats.bufs_sent += count;
2833}
2834
2835static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2836{
2837 int index;
2838 int flush_cnt = 0;
2839 int q_was_packing = 0;
2840
2841 /*
2842 * check if weed have to switch to non-packing mode or if
2843 * we have to get a pci flag out on the queue
2844 */
2845 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2846 !atomic_read(&queue->set_pci_flags_count)) {
2847 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2848 QETH_OUT_Q_UNLOCKED) {
2849 /*
2850 * If we get in here, there was no action in
2851 * do_send_packet. So, we check if there is a
2852 * packing buffer to be flushed here.
2853 */
2854 netif_stop_queue(queue->card->dev);
2855 index = queue->next_buf_to_fill;
2856 q_was_packing = queue->do_pack;
2857 /* queue->do_pack may change */
2858 barrier();
2859 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2860 if (!flush_cnt &&
2861 !atomic_read(&queue->set_pci_flags_count))
2862 flush_cnt +=
2863 qeth_flush_buffers_on_no_pci(queue);
2864 if (queue->card->options.performance_stats &&
2865 q_was_packing)
2866 queue->card->perf_stats.bufs_sent_pack +=
2867 flush_cnt;
2868 if (flush_cnt)
2869 qeth_flush_buffers(queue, 1, index, flush_cnt);
2870 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2871 }
2872 }
2873}
2874
2875void qeth_qdio_output_handler(struct ccw_device *ccwdev, unsigned int status,
2876 unsigned int qdio_error, unsigned int siga_error,
2877 unsigned int __queue, int first_element, int count,
2878 unsigned long card_ptr)
2879{
2880 struct qeth_card *card = (struct qeth_card *) card_ptr;
2881 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2882 struct qeth_qdio_out_buffer *buffer;
2883 int i;
2884
d11ba0c4 2885 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
4a71df50
FB		 2886 if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
2887 if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION) {
d11ba0c4
PT		 2888 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2889 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2890 QETH_DBF_TEXT_(TRACE, 2, "%08x", status);
4a71df50
FB		 2891 netif_stop_queue(card->dev);
2892 qeth_schedule_recovery(card);
2893 return;
2894 }
2895 }
2896 if (card->options.performance_stats) {
2897 card->perf_stats.outbound_handler_cnt++;
2898 card->perf_stats.outbound_handler_start_time =
2899 qeth_get_micros();
2900 }
2901 for (i = first_element; i < (first_element + count); ++i) {
2902 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2903 /*we only handle the KICK_IT error by doing a recovery */
2904 if (qeth_handle_send_error(card, buffer,
2905 qdio_error, siga_error)
2906 == QETH_SEND_ERROR_KICK_IT){
2907 netif_stop_queue(card->dev);
2908 qeth_schedule_recovery(card);
2909 return;
2910 }
2911 qeth_clear_output_buffer(queue, buffer);
2912 }
2913 atomic_sub(count, &queue->used_buffers);
2914 /* check if we need to do something on this outbound queue */
2915 if (card->info.type != QETH_CARD_TYPE_IQD)
2916 qeth_check_outbound_queue(queue);
2917
2918 netif_wake_queue(queue->card->dev);
2919 if (card->options.performance_stats)
2920 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2921 card->perf_stats.outbound_handler_start_time;
2922}
2923EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2924
2925int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2926{
2927 int cast_type = RTN_UNSPEC;
2928
2929 if (card->info.type == QETH_CARD_TYPE_OSN)
2930 return cast_type;
2931
2932 if (skb->dst && skb->dst->neighbour) {
2933 cast_type = skb->dst->neighbour->type;
2934 if ((cast_type == RTN_BROADCAST) ||
2935 (cast_type == RTN_MULTICAST) ||
2936 (cast_type == RTN_ANYCAST))
2937 return cast_type;
2938 else
2939 return RTN_UNSPEC;
2940 }
2941 /* try something else */
2942 if (skb->protocol == ETH_P_IPV6)
2943 return (skb_network_header(skb)[24] == 0xff) ?
2944 RTN_MULTICAST : 0;
2945 else if (skb->protocol == ETH_P_IP)
2946 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2947 RTN_MULTICAST : 0;
2948 /* ... */
2949 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2950 return RTN_BROADCAST;
2951 else {
2952 u16 hdr_mac;
2953
2954 hdr_mac = *((u16 *)skb->data);
2955 /* tr multicast? */
2956 switch (card->info.link_type) {
2957 case QETH_LINK_TYPE_HSTR:
2958 case QETH_LINK_TYPE_LANE_TR:
2959 if ((hdr_mac == QETH_TR_MAC_NC) ||
2960 (hdr_mac == QETH_TR_MAC_C))
2961 return RTN_MULTICAST;
2962 break;
2963 /* eth or so multicast? */
2964 default:
2965 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2966 (hdr_mac == QETH_ETH_MAC_V6))
2967 return RTN_MULTICAST;
2968 }
2969 }
2970 return cast_type;
2971}
2972EXPORT_SYMBOL_GPL(qeth_get_cast_type);
2973
2974int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2975 int ipv, int cast_type)
2976{
2977 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2978 return card->qdio.default_out_queue;
2979 switch (card->qdio.no_out_queues) {
2980 case 4:
2981 if (cast_type && card->info.is_multicast_different)
2982 return card->info.is_multicast_different &
2983 (card->qdio.no_out_queues - 1);
2984 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2985 const u8 tos = ip_hdr(skb)->tos;
2986
2987 if (card->qdio.do_prio_queueing ==
2988 QETH_PRIO_Q_ING_TOS) {
2989 if (tos & IP_TOS_NOTIMPORTANT)
2990 return 3;
2991 if (tos & IP_TOS_HIGHRELIABILITY)
2992 return 2;
2993 if (tos & IP_TOS_HIGHTHROUGHPUT)
2994 return 1;
2995 if (tos & IP_TOS_LOWDELAY)
2996 return 0;
2997 }
2998 if (card->qdio.do_prio_queueing ==
2999 QETH_PRIO_Q_ING_PREC)
3000 return 3 - (tos >> 6);
3001 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3002 /* TODO: IPv6!!! */
3003 }
3004 return card->qdio.default_out_queue;
3005 case 1: /* fallthrough for single-out-queue 1920-device */
3006 default:
3007 return card->qdio.default_out_queue;
3008 }
3009}
3010EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3011
4a71df50
FB		 3012int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3013 struct sk_buff *skb, int elems)
3014{
3015 int elements_needed = 0;
3016
3017 if (skb_shinfo(skb)->nr_frags > 0)
3018 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3019 if (elements_needed == 0)
3020 elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
3021 + skb->len) >> PAGE_SHIFT);
3022 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3023 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3024 "(Number=%d / Length=%d). Discarded.\n",
3025 (elements_needed+elems), skb->len);
3026 return 0;
3027 }
3028 return elements_needed;
3029}
3030EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3031
f90b744e
FB		 3032static inline void __qeth_fill_buffer(struct sk_buff *skb,
3033 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill)
4a71df50
FB		 3034{
3035 int length = skb->len;
3036 int length_here;
3037 int element;
3038 char *data;
3039 int first_lap ;
3040
3041 element = *next_element_to_fill;
3042 data = skb->data;
3043 first_lap = (is_tso == 0 ? 1 : 0);
3044
3045 while (length > 0) {
3046 /* length_here is the remaining amount of data in this page */
3047 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3048 if (length < length_here)
3049 length_here = length;
3050
3051 buffer->element[element].addr = data;
3052 buffer->element[element].length = length_here;
3053 length -= length_here;
3054 if (!length) {
3055 if (first_lap)
3056 buffer->element[element].flags = 0;
3057 else
3058 buffer->element[element].flags =
3059 SBAL_FLAGS_LAST_FRAG;
3060 } else {
3061 if (first_lap)
3062 buffer->element[element].flags =
3063 SBAL_FLAGS_FIRST_FRAG;
3064 else
3065 buffer->element[element].flags =
3066 SBAL_FLAGS_MIDDLE_FRAG;
3067 }
3068 data += length_here;
3069 element++;
3070 first_lap = 0;
3071 }
3072 *next_element_to_fill = element;
3073}
3074
f90b744e 3075static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
4a71df50
FB		 3076 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb)
3077{
3078 struct qdio_buffer *buffer;
3079 struct qeth_hdr_tso *hdr;
3080 int flush_cnt = 0, hdr_len, large_send = 0;
3081
4a71df50
FB		 3082 buffer = buf->buffer;
3083 atomic_inc(&skb->users);
3084 skb_queue_tail(&buf->skb_list, skb);
3085
3086 hdr = (struct qeth_hdr_tso *) skb->data;
3087 /*check first on TSO ....*/
3088 if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3089 int element = buf->next_element_to_fill;
3090
3091 hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
3092 /*fill first buffer entry only with header information */
3093 buffer->element[element].addr = skb->data;
3094 buffer->element[element].length = hdr_len;
3095 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3096 buf->next_element_to_fill++;
3097 skb->data += hdr_len;
3098 skb->len -= hdr_len;
3099 large_send = 1;
3100 }
3101 if (skb_shinfo(skb)->nr_frags == 0)
3102 __qeth_fill_buffer(skb, buffer, large_send,
3103 (int *)&buf->next_element_to_fill);
3104 else
3105 __qeth_fill_buffer_frag(skb, buffer, large_send,
3106 (int *)&buf->next_element_to_fill);
3107
3108 if (!queue->do_pack) {
d11ba0c4 3109 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
4a71df50
FB		 3110 /* set state to PRIMED -> will be flushed */
3111 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3112 flush_cnt = 1;
3113 } else {
d11ba0c4 3114 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
4a71df50
FB		 3115 if (queue->card->options.performance_stats)
3116 queue->card->perf_stats.skbs_sent_pack++;
3117 if (buf->next_element_to_fill >=
3118 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3119 /*
3120 * packed buffer if full -> set state PRIMED
3121 * -> will be flushed
3122 */
3123 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3124 flush_cnt = 1;
3125 }
3126 }
3127 return flush_cnt;
3128}
3129
3130int qeth_do_send_packet_fast(struct qeth_card *card,
3131 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3132 struct qeth_hdr *hdr, int elements_needed,
3133 struct qeth_eddp_context *ctx)
3134{
3135 struct qeth_qdio_out_buffer *buffer;
3136 int buffers_needed = 0;
3137 int flush_cnt = 0;
3138 int index;
3139
4a71df50
FB		 3140 /* spin until we get the queue ... */
3141 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3142 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3143 /* ... now we've got the queue */
3144 index = queue->next_buf_to_fill;
3145 buffer = &queue->bufs[queue->next_buf_to_fill];
3146 /*
3147 * check if buffer is empty to make sure that we do not 'overtake'
3148 * ourselves and try to fill a buffer that is already primed
3149 */
3150 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3151 goto out;
3152 if (ctx == NULL)
3153 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3154 QDIO_MAX_BUFFERS_PER_Q;
3155 else {
3156 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3157 ctx);
3158 if (buffers_needed < 0)
3159 goto out;
3160 queue->next_buf_to_fill =
3161 (queue->next_buf_to_fill + buffers_needed) %
3162 QDIO_MAX_BUFFERS_PER_Q;
3163 }
3164 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3165 if (ctx == NULL) {
3166 qeth_fill_buffer(queue, buffer, skb);
3167 qeth_flush_buffers(queue, 0, index, 1);
3168 } else {
3169 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3170 WARN_ON(buffers_needed != flush_cnt);
3171 qeth_flush_buffers(queue, 0, index, flush_cnt);
3172 }
3173 return 0;
3174out:
3175 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3176 return -EBUSY;
3177}
3178EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3179
3180int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3181 struct sk_buff *skb, struct qeth_hdr *hdr,
3182 int elements_needed, struct qeth_eddp_context *ctx)
3183{
3184 struct qeth_qdio_out_buffer *buffer;
3185 int start_index;
3186 int flush_count = 0;
3187 int do_pack = 0;
3188 int tmp;
3189 int rc = 0;
3190
4a71df50
FB		 3191 /* spin until we get the queue ... */
3192 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3193 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3194 start_index = queue->next_buf_to_fill;
3195 buffer = &queue->bufs[queue->next_buf_to_fill];
3196 /*
3197 * check if buffer is empty to make sure that we do not 'overtake'
3198 * ourselves and try to fill a buffer that is already primed
3199 */
3200 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3201 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3202 return -EBUSY;
3203 }
3204 /* check if we need to switch packing state of this queue */
3205 qeth_switch_to_packing_if_needed(queue);
3206 if (queue->do_pack) {
3207 do_pack = 1;
3208 if (ctx == NULL) {
3209 /* does packet fit in current buffer? */
3210 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3211 buffer->next_element_to_fill) < elements_needed) {
3212 /* ... no -> set state PRIMED */
3213 atomic_set(&buffer->state,
3214 QETH_QDIO_BUF_PRIMED);
3215 flush_count++;
3216 queue->next_buf_to_fill =
3217 (queue->next_buf_to_fill + 1) %
3218 QDIO_MAX_BUFFERS_PER_Q;
3219 buffer = &queue->bufs[queue->next_buf_to_fill];
3220 /* we did a step forward, so check buffer state
3221 * again */
3222 if (atomic_read(&buffer->state) !=
3223 QETH_QDIO_BUF_EMPTY){
3224 qeth_flush_buffers(queue, 0,
3225 start_index, flush_count);
3226 atomic_set(&queue->state,
3227 QETH_OUT_Q_UNLOCKED);
3228 return -EBUSY;
3229 }
3230 }
3231 } else {
3232 /* check if we have enough elements (including following
3233 * free buffers) to handle eddp context */
3234 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3235 < 0) {
4a71df50
FB		 3236 rc = -EBUSY;
3237 goto out;
3238 }
3239 }
3240 }
3241 if (ctx == NULL)
3242 tmp = qeth_fill_buffer(queue, buffer, skb);
3243 else {
3244 tmp = qeth_eddp_fill_buffer(queue, ctx,
3245 queue->next_buf_to_fill);
3246 if (tmp < 0) {
4a71df50
FB		 3247 rc = -EBUSY;
3248 goto out;
3249 }
3250 }
3251 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3252 QDIO_MAX_BUFFERS_PER_Q;
3253 flush_count += tmp;
3254out:
3255 if (flush_count)
3256 qeth_flush_buffers(queue, 0, start_index, flush_count);
3257 else if (!atomic_read(&queue->set_pci_flags_count))
3258 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3259 /*
3260 * queue->state will go from LOCKED -> UNLOCKED or from
3261 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3262 * (switch packing state or flush buffer to get another pci flag out).
3263 * In that case we will enter this loop
3264 */
3265 while (atomic_dec_return(&queue->state)) {
3266 flush_count = 0;
3267 start_index = queue->next_buf_to_fill;
3268 /* check if we can go back to non-packing state */
3269 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3270 /*
3271 * check if we need to flush a packing buffer to get a pci
3272 * flag out on the queue
3273 */
3274 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3275 flush_count += qeth_flush_buffers_on_no_pci(queue);
3276 if (flush_count)
3277 qeth_flush_buffers(queue, 0, start_index, flush_count);
3278 }
3279 /* at this point the queue is UNLOCKED again */
3280 if (queue->card->options.performance_stats && do_pack)
3281 queue->card->perf_stats.bufs_sent_pack += flush_count;
3282
3283 return rc;
3284}
3285EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3286
3287static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3288 struct qeth_reply *reply, unsigned long data)
3289{
3290 struct qeth_ipa_cmd *cmd;
3291 struct qeth_ipacmd_setadpparms *setparms;
3292
d11ba0c4 3293 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
4a71df50
FB		 3294
3295 cmd = (struct qeth_ipa_cmd *) data;
3296 setparms = &(cmd->data.setadapterparms);
3297
3298 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3299 if (cmd->hdr.return_code) {
d11ba0c4 3300 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3301 setparms->data.mode = SET_PROMISC_MODE_OFF;
3302 }
3303 card->info.promisc_mode = setparms->data.mode;
3304 return 0;
3305}
3306
3307void qeth_setadp_promisc_mode(struct qeth_card *card)
3308{
3309 enum qeth_ipa_promisc_modes mode;
3310 struct net_device *dev = card->dev;
3311 struct qeth_cmd_buffer *iob;
3312 struct qeth_ipa_cmd *cmd;
3313
d11ba0c4 3314 QETH_DBF_TEXT(TRACE, 4, "setprom");
4a71df50
FB		 3315
3316 if (((dev->flags & IFF_PROMISC) &&
3317 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3318 (!(dev->flags & IFF_PROMISC) &&
3319 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3320 return;
3321 mode = SET_PROMISC_MODE_OFF;
3322 if (dev->flags & IFF_PROMISC)
3323 mode = SET_PROMISC_MODE_ON;
d11ba0c4 3324 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
4a71df50
FB		 3325
3326 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3327 sizeof(struct qeth_ipacmd_setadpparms));
3328 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3329 cmd->data.setadapterparms.data.mode = mode;
3330 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3331}
3332EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3333
3334int qeth_change_mtu(struct net_device *dev, int new_mtu)
3335{
3336 struct qeth_card *card;
3337 char dbf_text[15];
3338
3339 card = netdev_priv(dev);
3340
d11ba0c4 3341 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
4a71df50 3342 sprintf(dbf_text, "%8x", new_mtu);
d11ba0c4 3343 QETH_DBF_TEXT(TRACE, 4, dbf_text);
4a71df50
FB		 3344
3345 if (new_mtu < 64)
3346 return -EINVAL;
3347 if (new_mtu > 65535)
3348 return -EINVAL;
3349 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3350 (!qeth_mtu_is_valid(card, new_mtu)))
3351 return -EINVAL;
3352 dev->mtu = new_mtu;
3353 return 0;
3354}
3355EXPORT_SYMBOL_GPL(qeth_change_mtu);
3356
3357struct net_device_stats *qeth_get_stats(struct net_device *dev)
3358{
3359 struct qeth_card *card;
3360
3361 card = netdev_priv(dev);
3362
d11ba0c4 3363 QETH_DBF_TEXT(TRACE, 5, "getstat");
4a71df50
FB		 3364
3365 return &card->stats;
3366}
3367EXPORT_SYMBOL_GPL(qeth_get_stats);
3368
3369static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3370 struct qeth_reply *reply, unsigned long data)
3371{
3372 struct qeth_ipa_cmd *cmd;
3373
d11ba0c4 3374 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
4a71df50
FB		 3375
3376 cmd = (struct qeth_ipa_cmd *) data;
3377 if (!card->options.layer2 ||
3378 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3379 memcpy(card->dev->dev_addr,
3380 &cmd->data.setadapterparms.data.change_addr.addr,
3381 OSA_ADDR_LEN);
3382 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3383 }
3384 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3385 return 0;
3386}
3387
3388int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3389{
3390 int rc;
3391 struct qeth_cmd_buffer *iob;
3392 struct qeth_ipa_cmd *cmd;
3393
d11ba0c4 3394 QETH_DBF_TEXT(TRACE, 4, "chgmac");
4a71df50
FB		 3395
3396 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3397 sizeof(struct qeth_ipacmd_setadpparms));
3398 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3399 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3400 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3401 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3402 card->dev->dev_addr, OSA_ADDR_LEN);
3403 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3404 NULL);
3405 return rc;
3406}
3407EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3408
3409void qeth_tx_timeout(struct net_device *dev)
3410{
3411 struct qeth_card *card;
3412
3413 card = netdev_priv(dev);
3414 card->stats.tx_errors++;
3415 qeth_schedule_recovery(card);
3416}
3417EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3418
3419int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3420{
3421 struct qeth_card *card = netdev_priv(dev);
3422 int rc = 0;
3423
3424 switch (regnum) {
3425 case MII_BMCR: /* Basic mode control register */
3426 rc = BMCR_FULLDPLX;
3427 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3428 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3429 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3430 rc |= BMCR_SPEED100;
3431 break;
3432 case MII_BMSR: /* Basic mode status register */
3433 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3434 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3435 BMSR_100BASE4;
3436 break;
3437 case MII_PHYSID1: /* PHYS ID 1 */
3438 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3439 dev->dev_addr[2];
3440 rc = (rc >> 5) & 0xFFFF;
3441 break;
3442 case MII_PHYSID2: /* PHYS ID 2 */
3443 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3444 break;
3445 case MII_ADVERTISE: /* Advertisement control reg */
3446 rc = ADVERTISE_ALL;
3447 break;
3448 case MII_LPA: /* Link partner ability reg */
3449 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3450 LPA_100BASE4 | LPA_LPACK;
3451 break;
3452 case MII_EXPANSION: /* Expansion register */
3453 break;
3454 case MII_DCOUNTER: /* disconnect counter */
3455 break;
3456 case MII_FCSCOUNTER: /* false carrier counter */
3457 break;
3458 case MII_NWAYTEST: /* N-way auto-neg test register */
3459 break;
3460 case MII_RERRCOUNTER: /* rx error counter */
3461 rc = card->stats.rx_errors;
3462 break;
3463 case MII_SREVISION: /* silicon revision */
3464 break;
3465 case MII_RESV1: /* reserved 1 */
3466 break;
3467 case MII_LBRERROR: /* loopback, rx, bypass error */
3468 break;
3469 case MII_PHYADDR: /* physical address */
3470 break;
3471 case MII_RESV2: /* reserved 2 */
3472 break;
3473 case MII_TPISTATUS: /* TPI status for 10mbps */
3474 break;
3475 case MII_NCONFIG: /* network interface config */
3476 break;
3477 default:
3478 break;
3479 }
3480 return rc;
3481}
3482EXPORT_SYMBOL_GPL(qeth_mdio_read);
3483
3484static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3485 struct qeth_cmd_buffer *iob, int len,
3486 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3487 unsigned long),
3488 void *reply_param)
3489{
3490 u16 s1, s2;
3491
d11ba0c4 3492 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
4a71df50
FB		 3493
3494 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3495 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3496 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3497 /* adjust PDU length fields in IPA_PDU_HEADER */
3498 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3499 s2 = (u32) len;
3500 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3501 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3502 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3503 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3504 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3505 reply_cb, reply_param);
3506}
3507
3508static int qeth_snmp_command_cb(struct qeth_card *card,
3509 struct qeth_reply *reply, unsigned long sdata)
3510{
3511 struct qeth_ipa_cmd *cmd;
3512 struct qeth_arp_query_info *qinfo;
3513 struct qeth_snmp_cmd *snmp;
3514 unsigned char *data;
3515 __u16 data_len;
3516
d11ba0c4 3517 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
4a71df50
FB		 3518
3519 cmd = (struct qeth_ipa_cmd *) sdata;
3520 data = (unsigned char *)((char *)cmd - reply->offset);
3521 qinfo = (struct qeth_arp_query_info *) reply->param;
3522 snmp = &cmd->data.setadapterparms.data.snmp;
3523
3524 if (cmd->hdr.return_code) {
d11ba0c4 3525 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 3526 return 0;
3527 }
3528 if (cmd->data.setadapterparms.hdr.return_code) {
3529 cmd->hdr.return_code =
3530 cmd->data.setadapterparms.hdr.return_code;
d11ba0c4 3531 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 3532 return 0;
3533 }
3534 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3535 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3536 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3537 else
3538 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3539
3540 /* check if there is enough room in userspace */
3541 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
d11ba0c4 3542 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 3543 cmd->hdr.return_code = -ENOMEM;
3544 return 0;
3545 }
d11ba0c4 3546 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
4a71df50 3547 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3548 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
4a71df50
FB		 3549 cmd->data.setadapterparms.hdr.seq_no);
3550 /*copy entries to user buffer*/
3551 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3552 memcpy(qinfo->udata + qinfo->udata_offset,
3553 (char *)snmp,
3554 data_len + offsetof(struct qeth_snmp_cmd, data));
3555 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3556 } else {
3557 memcpy(qinfo->udata + qinfo->udata_offset,
3558 (char *)&snmp->request, data_len);
3559 }
3560 qinfo->udata_offset += data_len;
3561 /* check if all replies received ... */
d11ba0c4 3562 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
4a71df50 3563 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3564 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
4a71df50
FB		 3565 cmd->data.setadapterparms.hdr.seq_no);
3566 if (cmd->data.setadapterparms.hdr.seq_no <
3567 cmd->data.setadapterparms.hdr.used_total)
3568 return 1;
3569 return 0;
3570}
3571
3572int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3573{
3574 struct qeth_cmd_buffer *iob;
3575 struct qeth_ipa_cmd *cmd;
3576 struct qeth_snmp_ureq *ureq;
3577 int req_len;
3578 struct qeth_arp_query_info qinfo = {0, };
3579 int rc = 0;
3580
d11ba0c4 3581 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
4a71df50
FB		 3582
3583 if (card->info.guestlan)
3584 return -EOPNOTSUPP;
3585
3586 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3587 (!card->options.layer2)) {
4a71df50
FB		 3588 return -EOPNOTSUPP;
3589 }
3590 /* skip 4 bytes (data_len struct member) to get req_len */
3591 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3592 return -EFAULT;
3593 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3594 if (!ureq) {
d11ba0c4 3595 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
4a71df50
FB		 3596 return -ENOMEM;
3597 }
3598 if (copy_from_user(ureq, udata,
3599 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3600 kfree(ureq);
3601 return -EFAULT;
3602 }
3603 qinfo.udata_len = ureq->hdr.data_len;
3604 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3605 if (!qinfo.udata) {
3606 kfree(ureq);
3607 return -ENOMEM;
3608 }
3609 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3610
3611 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3612 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3613 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3614 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3615 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3616 qeth_snmp_command_cb, (void *)&qinfo);
3617 if (rc)
14cc21b6 3618 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 3619 QETH_CARD_IFNAME(card), rc);
3620 else {
3621 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3622 rc = -EFAULT;
3623 }
3624
3625 kfree(ureq);
3626 kfree(qinfo.udata);
3627 return rc;
3628}
3629EXPORT_SYMBOL_GPL(qeth_snmp_command);
3630
3631static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3632{
3633 switch (card->info.type) {
3634 case QETH_CARD_TYPE_IQD:
3635 return 2;
3636 default:
3637 return 0;
3638 }
3639}
3640
3641static int qeth_qdio_establish(struct qeth_card *card)
3642{
3643 struct qdio_initialize init_data;
3644 char *qib_param_field;
3645 struct qdio_buffer **in_sbal_ptrs;
3646 struct qdio_buffer **out_sbal_ptrs;
3647 int i, j, k;
3648 int rc = 0;
3649
d11ba0c4 3650 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 3651
3652 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3653 GFP_KERNEL);
3654 if (!qib_param_field)
3655 return -ENOMEM;
3656
3657 qeth_create_qib_param_field(card, qib_param_field);
3658 qeth_create_qib_param_field_blkt(card, qib_param_field);
3659
3660 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3661 GFP_KERNEL);
3662 if (!in_sbal_ptrs) {
3663 kfree(qib_param_field);
3664 return -ENOMEM;
3665 }
3666 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3667 in_sbal_ptrs[i] = (struct qdio_buffer *)
3668 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3669
3670 out_sbal_ptrs =
3671 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3672 sizeof(void *), GFP_KERNEL);
3673 if (!out_sbal_ptrs) {
3674 kfree(in_sbal_ptrs);
3675 kfree(qib_param_field);
3676 return -ENOMEM;
3677 }
3678 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3679 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3680 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3681 card->qdio.out_qs[i]->bufs[j].buffer);
3682 }
3683
3684 memset(&init_data, 0, sizeof(struct qdio_initialize));
3685 init_data.cdev = CARD_DDEV(card);
3686 init_data.q_format = qeth_get_qdio_q_format(card);
3687 init_data.qib_param_field_format = 0;
3688 init_data.qib_param_field = qib_param_field;
3689 init_data.min_input_threshold = QETH_MIN_INPUT_THRESHOLD;
3690 init_data.max_input_threshold = QETH_MAX_INPUT_THRESHOLD;
3691 init_data.min_output_threshold = QETH_MIN_OUTPUT_THRESHOLD;
3692 init_data.max_output_threshold = QETH_MAX_OUTPUT_THRESHOLD;
3693 init_data.no_input_qs = 1;
3694 init_data.no_output_qs = card->qdio.no_out_queues;
3695 init_data.input_handler = card->discipline.input_handler;
3696 init_data.output_handler = card->discipline.output_handler;
3697 init_data.int_parm = (unsigned long) card;
3698 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3699 QDIO_OUTBOUND_0COPY_SBALS |
3700 QDIO_USE_OUTBOUND_PCIS;
3701 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3702 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3703
3704 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3705 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3706 rc = qdio_initialize(&init_data);
3707 if (rc)
3708 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3709 }
3710 kfree(out_sbal_ptrs);
3711 kfree(in_sbal_ptrs);
3712 kfree(qib_param_field);
3713 return rc;
3714}
3715
3716static void qeth_core_free_card(struct qeth_card *card)
3717{
3718
d11ba0c4
PT		 3719 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3720 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 3721 qeth_clean_channel(&card->read);
3722 qeth_clean_channel(&card->write);
3723 if (card->dev)
3724 free_netdev(card->dev);
3725 kfree(card->ip_tbd_list);
3726 qeth_free_qdio_buffers(card);
3727 kfree(card);
3728}
3729
3730static struct ccw_device_id qeth_ids[] = {
3731 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3732 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3733 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3734 {},
3735};
3736MODULE_DEVICE_TABLE(ccw, qeth_ids);
3737
3738static struct ccw_driver qeth_ccw_driver = {
3739 .name = "qeth",
3740 .ids = qeth_ids,
3741 .probe = ccwgroup_probe_ccwdev,
3742 .remove = ccwgroup_remove_ccwdev,
3743};
3744
3745static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3746 unsigned long driver_id)
3747{
022b660a
UB		 3748 return ccwgroup_create_from_string(root_dev, driver_id,
3749 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 3750}
3751
3752int qeth_core_hardsetup_card(struct qeth_card *card)
3753{
3754 int retries = 3;
3755 int mpno;
3756 int rc;
3757
d11ba0c4 3758 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50
FB		 3759 atomic_set(&card->force_alloc_skb, 0);
3760retry:
3761 if (retries < 3) {
3762 PRINT_WARN("Retrying to do IDX activates.\n");
3763 ccw_device_set_offline(CARD_DDEV(card));
3764 ccw_device_set_offline(CARD_WDEV(card));
3765 ccw_device_set_offline(CARD_RDEV(card));
3766 ccw_device_set_online(CARD_RDEV(card));
3767 ccw_device_set_online(CARD_WDEV(card));
3768 ccw_device_set_online(CARD_DDEV(card));
3769 }
3770 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3771 if (rc == -ERESTARTSYS) {
d11ba0c4 3772 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 3773 return rc;
3774 } else if (rc) {
d11ba0c4 3775 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 3776 if (--retries < 0)
3777 goto out;
3778 else
3779 goto retry;
3780 }
3781
3782 rc = qeth_get_unitaddr(card);
3783 if (rc) {
d11ba0c4 3784 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 3785 return rc;
3786 }
a74b08c7
UB		 3787 mpno = qdio_get_ssqd_pct(CARD_DDEV(card));
3788 if (mpno)
3789 mpno = min(mpno - 1, QETH_MAX_PORTNO);
4a71df50 3790 if (card->info.portno > mpno) {
14cc21b6
FB		 3791 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3792 "\n.", CARD_BUS_ID(card), card->info.portno);
4a71df50
FB		 3793 rc = -ENODEV;
3794 goto out;
3795 }
3796 qeth_init_tokens(card);
3797 qeth_init_func_level(card);
3798 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3799 if (rc == -ERESTARTSYS) {
d11ba0c4 3800 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 3801 return rc;
3802 } else if (rc) {
d11ba0c4 3803 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 3804 if (--retries < 0)
3805 goto out;
3806 else
3807 goto retry;
3808 }
3809 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3810 if (rc == -ERESTARTSYS) {
d11ba0c4 3811 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 3812 return rc;
3813 } else if (rc) {
d11ba0c4 3814 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 3815 if (--retries < 0)
3816 goto out;
3817 else
3818 goto retry;
3819 }
3820 rc = qeth_mpc_initialize(card);
3821 if (rc) {
d11ba0c4 3822 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 3823 goto out;
3824 }
3825 return 0;
3826out:
3827 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
3828 return rc;
3829}
3830EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3831
3832static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3833 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3834{
3835 struct page *page = virt_to_page(element->addr);
3836 if (*pskb == NULL) {
3837 /* the upper protocol layers assume that there is data in the
3838 * skb itself. Copy a small amount (64 bytes) to make them
3839 * happy. */
3840 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3841 if (!(*pskb))
3842 return -ENOMEM;
3843 skb_reserve(*pskb, ETH_HLEN);
3844 if (data_len <= 64) {
3845 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3846 data_len);
3847 } else {
3848 get_page(page);
3849 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3850 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3851 data_len - 64);
3852 (*pskb)->data_len += data_len - 64;
3853 (*pskb)->len += data_len - 64;
3854 (*pskb)->truesize += data_len - 64;
3855 (*pfrag)++;
3856 }
3857 } else {
3858 get_page(page);
3859 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3860 (*pskb)->data_len += data_len;
3861 (*pskb)->len += data_len;
3862 (*pskb)->truesize += data_len;
3863 (*pfrag)++;
3864 }
3865 return 0;
3866}
3867
3868struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3869 struct qdio_buffer *buffer,
3870 struct qdio_buffer_element **__element, int *__offset,
3871 struct qeth_hdr **hdr)
3872{
3873 struct qdio_buffer_element *element = *__element;
3874 int offset = *__offset;
3875 struct sk_buff *skb = NULL;
3876 int skb_len;
3877 void *data_ptr;
3878 int data_len;
3879 int headroom = 0;
3880 int use_rx_sg = 0;
3881 int frag = 0;
3882
4a71df50
FB		 3883 /* qeth_hdr must not cross element boundaries */
3884 if (element->length < offset + sizeof(struct qeth_hdr)) {
3885 if (qeth_is_last_sbale(element))
3886 return NULL;
3887 element++;
3888 offset = 0;
3889 if (element->length < sizeof(struct qeth_hdr))
3890 return NULL;
3891 }
3892 *hdr = element->addr + offset;
3893
3894 offset += sizeof(struct qeth_hdr);
3895 if (card->options.layer2) {
3896 if (card->info.type == QETH_CARD_TYPE_OSN) {
3897 skb_len = (*hdr)->hdr.osn.pdu_length;
3898 headroom = sizeof(struct qeth_hdr);
3899 } else {
3900 skb_len = (*hdr)->hdr.l2.pkt_length;
3901 }
3902 } else {
3903 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 3904 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3905 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3906 headroom = TR_HLEN;
3907 else
3908 headroom = ETH_HLEN;
4a71df50
FB		 3909 }
3910
3911 if (!skb_len)
3912 return NULL;
3913
3914 if ((skb_len >= card->options.rx_sg_cb) &&
3915 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3916 (!atomic_read(&card->force_alloc_skb))) {
3917 use_rx_sg = 1;
3918 } else {
3919 skb = dev_alloc_skb(skb_len + headroom);
3920 if (!skb)
3921 goto no_mem;
3922 if (headroom)
3923 skb_reserve(skb, headroom);
3924 }
3925
3926 data_ptr = element->addr + offset;
3927 while (skb_len) {
3928 data_len = min(skb_len, (int)(element->length - offset));
3929 if (data_len) {
3930 if (use_rx_sg) {
3931 if (qeth_create_skb_frag(element, &skb, offset,
3932 &frag, data_len))
3933 goto no_mem;
3934 } else {
3935 memcpy(skb_put(skb, data_len), data_ptr,
3936 data_len);
3937 }
3938 }
3939 skb_len -= data_len;
3940 if (skb_len) {
3941 if (qeth_is_last_sbale(element)) {
d11ba0c4
PT		 3942 QETH_DBF_TEXT(TRACE, 4, "unexeob");
3943 QETH_DBF_TEXT_(TRACE, 4, "%s",
4a71df50 3944 CARD_BUS_ID(card));
d11ba0c4
PT		 3945 QETH_DBF_TEXT(QERR, 2, "unexeob");
3946 QETH_DBF_TEXT_(QERR, 2, "%s",
4a71df50 3947 CARD_BUS_ID(card));
d11ba0c4 3948 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4a71df50
FB		 3949 dev_kfree_skb_any(skb);
3950 card->stats.rx_errors++;
3951 return NULL;
3952 }
3953 element++;
3954 offset = 0;
3955 data_ptr = element->addr;
3956 } else {
3957 offset += data_len;
3958 }
3959 }
3960 *__element = element;
3961 *__offset = offset;
3962 if (use_rx_sg && card->options.performance_stats) {
3963 card->perf_stats.sg_skbs_rx++;
3964 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
3965 }
3966 return skb;
3967no_mem:
3968 if (net_ratelimit()) {
d11ba0c4
PT		 3969 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
3970 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 3971 }
3972 card->stats.rx_dropped++;
3973 return NULL;
3974}
3975EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
3976
3977static void qeth_unregister_dbf_views(void)
3978{
d11ba0c4
PT		 3979 int x;
3980 for (x = 0; x < QETH_DBF_INFOS; x++) {
3981 debug_unregister(qeth_dbf[x].id);
3982 qeth_dbf[x].id = NULL;
3983 }
4a71df50
FB		 3984}
3985
345aa66e 3986void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
cd023216
PT		 3987{
3988 char dbf_txt_buf[32];
345aa66e 3989 va_list args;
cd023216
PT		 3990
3991 if (level > (qeth_dbf[dbf_nix].id)->level)
3992 return;
345aa66e
PT		 3993 va_start(args, fmt);
3994 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
3995 va_end(args);
cd023216 3996 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
cd023216
PT		 3997}
3998EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
3999
4a71df50
FB		 4000static int qeth_register_dbf_views(void)
4001{
d11ba0c4
PT		 4002 int ret;
4003 int x;
4004
4005 for (x = 0; x < QETH_DBF_INFOS; x++) {
4006 /* register the areas */
4007 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4008 qeth_dbf[x].pages,
4009 qeth_dbf[x].areas,
4010 qeth_dbf[x].len);
4011 if (qeth_dbf[x].id == NULL) {
4012 qeth_unregister_dbf_views();
4013 return -ENOMEM;
4014 }
4a71df50 4015
d11ba0c4
PT		 4016 /* register a view */
4017 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4018 if (ret) {
4019 qeth_unregister_dbf_views();
4020 return ret;
4021 }
4a71df50 4022
d11ba0c4
PT		 4023 /* set a passing level */
4024 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4025 }
4a71df50
FB		 4026
4027 return 0;
4028}
4029
4030int qeth_core_load_discipline(struct qeth_card *card,
4031 enum qeth_discipline_id discipline)
4032{
4033 int rc = 0;
4034 switch (discipline) {
4035 case QETH_DISCIPLINE_LAYER3:
4036 card->discipline.ccwgdriver = try_then_request_module(
4037 symbol_get(qeth_l3_ccwgroup_driver),
4038 "qeth_l3");
4039 break;
4040 case QETH_DISCIPLINE_LAYER2:
4041 card->discipline.ccwgdriver = try_then_request_module(
4042 symbol_get(qeth_l2_ccwgroup_driver),
4043 "qeth_l2");
4044 break;
4045 }
4046 if (!card->discipline.ccwgdriver) {
4047 PRINT_ERR("Support for discipline %d not present\n",
4048 discipline);
4049 rc = -EINVAL;
4050 }
4051 return rc;
4052}
4053
4054void qeth_core_free_discipline(struct qeth_card *card)
4055{
4056 if (card->options.layer2)
4057 symbol_put(qeth_l2_ccwgroup_driver);
4058 else
4059 symbol_put(qeth_l3_ccwgroup_driver);
4060 card->discipline.ccwgdriver = NULL;
4061}
4062
4063static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4064{
4065 struct qeth_card *card;
4066 struct device *dev;
4067 int rc;
4068 unsigned long flags;
4069
d11ba0c4 4070 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4071
4072 dev = &gdev->dev;
4073 if (!get_device(dev))
4074 return -ENODEV;
4075
d11ba0c4 4076 QETH_DBF_TEXT_(SETUP, 2, "%s", gdev->dev.bus_id);
4a71df50
FB		 4077
4078 card = qeth_alloc_card();
4079 if (!card) {
d11ba0c4 4080 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4081 rc = -ENOMEM;
4082 goto err_dev;
4083 }
4084 card->read.ccwdev = gdev->cdev[0];
4085 card->write.ccwdev = gdev->cdev[1];
4086 card->data.ccwdev = gdev->cdev[2];
4087 dev_set_drvdata(&gdev->dev, card);
4088 card->gdev = gdev;
4089 gdev->cdev[0]->handler = qeth_irq;
4090 gdev->cdev[1]->handler = qeth_irq;
4091 gdev->cdev[2]->handler = qeth_irq;
4092
4093 rc = qeth_determine_card_type(card);
4094 if (rc) {
4095 PRINT_WARN("%s: not a valid card type\n", __func__);
d11ba0c4 4096 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4097 goto err_card;
4098 }
4099 rc = qeth_setup_card(card);
4100 if (rc) {
d11ba0c4 4101 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 4102 goto err_card;
4103 }
4104
4105 if (card->info.type == QETH_CARD_TYPE_OSN) {
4106 rc = qeth_core_create_osn_attributes(dev);
4107 if (rc)
4108 goto err_card;
4109 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4110 if (rc) {
4111 qeth_core_remove_osn_attributes(dev);
4112 goto err_card;
4113 }
4114 rc = card->discipline.ccwgdriver->probe(card->gdev);
4115 if (rc) {
4116 qeth_core_free_discipline(card);
4117 qeth_core_remove_osn_attributes(dev);
4118 goto err_card;
4119 }
4120 } else {
4121 rc = qeth_core_create_device_attributes(dev);
4122 if (rc)
4123 goto err_card;
4124 }
4125
4126 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4127 list_add_tail(&card->list, &qeth_core_card_list.list);
4128 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4129 return 0;
4130
4131err_card:
4132 qeth_core_free_card(card);
4133err_dev:
4134 put_device(dev);
4135 return rc;
4136}
4137
4138static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4139{
4140 unsigned long flags;
4141 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4142
4143 if (card->discipline.ccwgdriver) {
4144 card->discipline.ccwgdriver->remove(gdev);
4145 qeth_core_free_discipline(card);
4146 }
4147
4148 if (card->info.type == QETH_CARD_TYPE_OSN) {
4149 qeth_core_remove_osn_attributes(&gdev->dev);
4150 } else {
4151 qeth_core_remove_device_attributes(&gdev->dev);
4152 }
4153 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4154 list_del(&card->list);
4155 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4156 qeth_core_free_card(card);
4157 dev_set_drvdata(&gdev->dev, NULL);
4158 put_device(&gdev->dev);
4159 return;
4160}
4161
4162static int qeth_core_set_online(struct ccwgroup_device *gdev)
4163{
4164 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4165 int rc = 0;
4166 int def_discipline;
4167
4168 if (!card->discipline.ccwgdriver) {
4169 if (card->info.type == QETH_CARD_TYPE_IQD)
4170 def_discipline = QETH_DISCIPLINE_LAYER3;
4171 else
4172 def_discipline = QETH_DISCIPLINE_LAYER2;
4173 rc = qeth_core_load_discipline(card, def_discipline);
4174 if (rc)
4175 goto err;
4176 rc = card->discipline.ccwgdriver->probe(card->gdev);
4177 if (rc)
4178 goto err;
4179 }
4180 rc = card->discipline.ccwgdriver->set_online(gdev);
4181err:
4182 return rc;
4183}
4184
4185static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4186{
4187 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4188 return card->discipline.ccwgdriver->set_offline(gdev);
4189}
4190
4191static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4192{
4193 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4194 if (card->discipline.ccwgdriver &&
4195 card->discipline.ccwgdriver->shutdown)
4196 card->discipline.ccwgdriver->shutdown(gdev);
4197}
4198
4199static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4200 .owner = THIS_MODULE,
4201 .name = "qeth",
4202 .driver_id = 0xD8C5E3C8,
4203 .probe = qeth_core_probe_device,
4204 .remove = qeth_core_remove_device,
4205 .set_online = qeth_core_set_online,
4206 .set_offline = qeth_core_set_offline,
4207 .shutdown = qeth_core_shutdown,
4208};
4209
4210static ssize_t
4211qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4212 size_t count)
4213{
4214 int err;
4215 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4216 qeth_core_ccwgroup_driver.driver_id);
4217 if (err)
4218 return err;
4219 else
4220 return count;
4221}
4222
4223static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4224
4225static struct {
4226 const char str[ETH_GSTRING_LEN];
4227} qeth_ethtool_stats_keys[] = {
4228/* 0 */{"rx skbs"},
4229 {"rx buffers"},
4230 {"tx skbs"},
4231 {"tx buffers"},
4232 {"tx skbs no packing"},
4233 {"tx buffers no packing"},
4234 {"tx skbs packing"},
4235 {"tx buffers packing"},
4236 {"tx sg skbs"},
4237 {"tx sg frags"},
4238/* 10 */{"rx sg skbs"},
4239 {"rx sg frags"},
4240 {"rx sg page allocs"},
4241 {"tx large kbytes"},
4242 {"tx large count"},
4243 {"tx pk state ch n->p"},
4244 {"tx pk state ch p->n"},
4245 {"tx pk watermark low"},
4246 {"tx pk watermark high"},
4247 {"queue 0 buffer usage"},
4248/* 20 */{"queue 1 buffer usage"},
4249 {"queue 2 buffer usage"},
4250 {"queue 3 buffer usage"},
4251 {"rx handler time"},
4252 {"rx handler count"},
4253 {"rx do_QDIO time"},
4254 {"rx do_QDIO count"},
4255 {"tx handler time"},
4256 {"tx handler count"},
4257 {"tx time"},
4258/* 30 */{"tx count"},
4259 {"tx do_QDIO time"},
4260 {"tx do_QDIO count"},
4261};
4262
4263int qeth_core_get_stats_count(struct net_device *dev)
4264{
4265 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4266}
4267EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4268
4269void qeth_core_get_ethtool_stats(struct net_device *dev,
4270 struct ethtool_stats *stats, u64 *data)
4271{
4272 struct qeth_card *card = netdev_priv(dev);
4273 data[0] = card->stats.rx_packets -
4274 card->perf_stats.initial_rx_packets;
4275 data[1] = card->perf_stats.bufs_rec;
4276 data[2] = card->stats.tx_packets -
4277 card->perf_stats.initial_tx_packets;
4278 data[3] = card->perf_stats.bufs_sent;
4279 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4280 - card->perf_stats.skbs_sent_pack;
4281 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4282 data[6] = card->perf_stats.skbs_sent_pack;
4283 data[7] = card->perf_stats.bufs_sent_pack;
4284 data[8] = card->perf_stats.sg_skbs_sent;
4285 data[9] = card->perf_stats.sg_frags_sent;
4286 data[10] = card->perf_stats.sg_skbs_rx;
4287 data[11] = card->perf_stats.sg_frags_rx;
4288 data[12] = card->perf_stats.sg_alloc_page_rx;
4289 data[13] = (card->perf_stats.large_send_bytes >> 10);
4290 data[14] = card->perf_stats.large_send_cnt;
4291 data[15] = card->perf_stats.sc_dp_p;
4292 data[16] = card->perf_stats.sc_p_dp;
4293 data[17] = QETH_LOW_WATERMARK_PACK;
4294 data[18] = QETH_HIGH_WATERMARK_PACK;
4295 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4296 data[20] = (card->qdio.no_out_queues > 1) ?
4297 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4298 data[21] = (card->qdio.no_out_queues > 2) ?
4299 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4300 data[22] = (card->qdio.no_out_queues > 3) ?
4301 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4302 data[23] = card->perf_stats.inbound_time;
4303 data[24] = card->perf_stats.inbound_cnt;
4304 data[25] = card->perf_stats.inbound_do_qdio_time;
4305 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4306 data[27] = card->perf_stats.outbound_handler_time;
4307 data[28] = card->perf_stats.outbound_handler_cnt;
4308 data[29] = card->perf_stats.outbound_time;
4309 data[30] = card->perf_stats.outbound_cnt;
4310 data[31] = card->perf_stats.outbound_do_qdio_time;
4311 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4312}
4313EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4314
4315void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4316{
4317 switch (stringset) {
4318 case ETH_SS_STATS:
4319 memcpy(data, &qeth_ethtool_stats_keys,
4320 sizeof(qeth_ethtool_stats_keys));
4321 break;
4322 default:
4323 WARN_ON(1);
4324 break;
4325 }
4326}
4327EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4328
4329void qeth_core_get_drvinfo(struct net_device *dev,
4330 struct ethtool_drvinfo *info)
4331{
4332 struct qeth_card *card = netdev_priv(dev);
4333 if (card->options.layer2)
4334 strcpy(info->driver, "qeth_l2");
4335 else
4336 strcpy(info->driver, "qeth_l3");
4337
4338 strcpy(info->version, "1.0");
4339 strcpy(info->fw_version, card->info.mcl_level);
4340 sprintf(info->bus_info, "%s/%s/%s",
4341 CARD_RDEV_ID(card),
4342 CARD_WDEV_ID(card),
4343 CARD_DDEV_ID(card));
4344}
4345EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4346
3f9975aa
FB		 4347int qeth_core_ethtool_get_settings(struct net_device *netdev,
4348 struct ethtool_cmd *ecmd)
4349{
4350 struct qeth_card *card = netdev_priv(netdev);
4351 enum qeth_link_types link_type;
4352
4353 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4354 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4355 else
4356 link_type = card->info.link_type;
4357
4358 ecmd->transceiver = XCVR_INTERNAL;
4359 ecmd->supported = SUPPORTED_Autoneg;
4360 ecmd->advertising = ADVERTISED_Autoneg;
4361 ecmd->duplex = DUPLEX_FULL;
4362 ecmd->autoneg = AUTONEG_ENABLE;
4363
4364 switch (link_type) {
4365 case QETH_LINK_TYPE_FAST_ETH:
4366 case QETH_LINK_TYPE_LANE_ETH100:
4367 ecmd->supported |= SUPPORTED_10baseT_Half |
4368 SUPPORTED_10baseT_Full |
4369 SUPPORTED_100baseT_Half |
4370 SUPPORTED_100baseT_Full |
4371 SUPPORTED_TP;
4372 ecmd->advertising |= ADVERTISED_10baseT_Half |
4373 ADVERTISED_10baseT_Full |
4374 ADVERTISED_100baseT_Half |
4375 ADVERTISED_100baseT_Full |
4376 ADVERTISED_TP;
4377 ecmd->speed = SPEED_100;
4378 ecmd->port = PORT_TP;
4379 break;
4380
4381 case QETH_LINK_TYPE_GBIT_ETH:
4382 case QETH_LINK_TYPE_LANE_ETH1000:
4383 ecmd->supported |= SUPPORTED_10baseT_Half |
4384 SUPPORTED_10baseT_Full |
4385 SUPPORTED_100baseT_Half |
4386 SUPPORTED_100baseT_Full |
4387 SUPPORTED_1000baseT_Half |
4388 SUPPORTED_1000baseT_Full |
4389 SUPPORTED_FIBRE;
4390 ecmd->advertising |= ADVERTISED_10baseT_Half |
4391 ADVERTISED_10baseT_Full |
4392 ADVERTISED_100baseT_Half |
4393 ADVERTISED_100baseT_Full |
4394 ADVERTISED_1000baseT_Half |
4395 ADVERTISED_1000baseT_Full |
4396 ADVERTISED_FIBRE;
4397 ecmd->speed = SPEED_1000;
4398 ecmd->port = PORT_FIBRE;
4399 break;
4400
4401 case QETH_LINK_TYPE_10GBIT_ETH:
4402 ecmd->supported |= SUPPORTED_10baseT_Half |
4403 SUPPORTED_10baseT_Full |
4404 SUPPORTED_100baseT_Half |
4405 SUPPORTED_100baseT_Full |
4406 SUPPORTED_1000baseT_Half |
4407 SUPPORTED_1000baseT_Full |
4408 SUPPORTED_10000baseT_Full |
4409 SUPPORTED_FIBRE;
4410 ecmd->advertising |= ADVERTISED_10baseT_Half |
4411 ADVERTISED_10baseT_Full |
4412 ADVERTISED_100baseT_Half |
4413 ADVERTISED_100baseT_Full |
4414 ADVERTISED_1000baseT_Half |
4415 ADVERTISED_1000baseT_Full |
4416 ADVERTISED_10000baseT_Full |
4417 ADVERTISED_FIBRE;
4418 ecmd->speed = SPEED_10000;
4419 ecmd->port = PORT_FIBRE;
4420 break;
4421
4422 default:
4423 ecmd->supported |= SUPPORTED_10baseT_Half |
4424 SUPPORTED_10baseT_Full |
4425 SUPPORTED_TP;
4426 ecmd->advertising |= ADVERTISED_10baseT_Half |
4427 ADVERTISED_10baseT_Full |
4428 ADVERTISED_TP;
4429 ecmd->speed = SPEED_10;
4430 ecmd->port = PORT_TP;
4431 }
4432
4433 return 0;
4434}
4435EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4436
4a71df50
FB		 4437static int __init qeth_core_init(void)
4438{
4439 int rc;
4440
4441 PRINT_INFO("loading core functions\n");
4442 INIT_LIST_HEAD(&qeth_core_card_list.list);
4443 rwlock_init(&qeth_core_card_list.rwlock);
4444
4445 rc = qeth_register_dbf_views();
4446 if (rc)
4447 goto out_err;
4448 rc = ccw_driver_register(&qeth_ccw_driver);
4449 if (rc)
4450 goto ccw_err;
4451 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4452 if (rc)
4453 goto ccwgroup_err;
4454 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4455 &driver_attr_group);
4456 if (rc)
4457 goto driver_err;
4458 qeth_core_root_dev = s390_root_dev_register("qeth");
4459 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4460 if (rc)
4461 goto register_err;
4462 return 0;
4463
4464register_err:
4465 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4466 &driver_attr_group);
4467driver_err:
4468 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4469ccwgroup_err:
4470 ccw_driver_unregister(&qeth_ccw_driver);
4471ccw_err:
4472 qeth_unregister_dbf_views();
4473out_err:
4474 PRINT_ERR("Initialization failed with code %d\n", rc);
4475 return rc;
4476}
4477
4478static void __exit qeth_core_exit(void)
4479{
4480 s390_root_dev_unregister(qeth_core_root_dev);
4481 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4482 &driver_attr_group);
4483 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4484 ccw_driver_unregister(&qeth_ccw_driver);
4485 qeth_unregister_dbf_views();
4486 PRINT_INFO("core functions removed\n");
4487}
4488
4489module_init(qeth_core_init);
4490module_exit(qeth_core_exit);
4491MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4492MODULE_DESCRIPTION("qeth core functions");
4493MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)