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[S390] cio: introduce fcx enabled scsw format
[linux-block.git] / drivers / s390 / cio / qdio.c
CommitLineData
1da177e4
LT		 1/*
2 *
3 * linux/drivers/s390/cio/qdio.c
4 *
5 * Linux for S/390 QDIO base support, Hipersocket base support
6 * version 2
7 *
8 * Copyright 2000,2002 IBM Corporation
9 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
4ce3b30c 10 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
1da177e4
LT		 11 *
12 * Restriction: only 63 iqdio subchannels would have its own indicator,
13 * after that, subsequent subchannels share one indicator
14 *
15 *
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32
1da177e4
LT		 33#include <linux/module.h>
34#include <linux/init.h>
b32ecdb7 35#include <linux/delay.h>
1da177e4
LT		 36#include <linux/slab.h>
37#include <linux/kernel.h>
38#include <linux/proc_fs.h>
39#include <linux/timer.h>
a3ae39c0 40#include <linux/mempool.h>
6188e10d 41#include <linux/semaphore.h>
1da177e4
LT		 42
43#include <asm/ccwdev.h>
44#include <asm/io.h>
45#include <asm/atomic.h>
1da177e4
LT		 46#include <asm/timex.h>
47
48#include <asm/debug.h>
34249d0f 49#include <asm/s390_rdev.h>
1da177e4 50#include <asm/qdio.h>
4e8e56c6 51#include <asm/airq.h>
1da177e4
LT		 52
53#include "cio.h"
54#include "css.h"
55#include "device.h"
1da177e4
LT		 56#include "qdio.h"
57#include "ioasm.h"
58#include "chsc.h"
59
1da177e4
LT		 60/****************** MODULE PARAMETER VARIABLES ********************/
61MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>");
62MODULE_DESCRIPTION("QDIO base support version 2, " \
63 "Copyright 2000 IBM Corporation");
64MODULE_LICENSE("GPL");
65
66/******************** HERE WE GO ***********************************/
67
e018ba1f 68static const char version[] = "QDIO base support version 2";
1da177e4 69
34249d0f 70static int qdio_performance_stats = 0;
1da177e4 71static int proc_perf_file_registration;
1da177e4 72static struct qdio_perf_stats perf_stats;
1da177e4
LT		 73
74static int hydra_thinints;
8129ee16 75static int is_passthrough = 0;
1da177e4
LT		 76static int omit_svs;
77
78static int indicator_used[INDICATORS_PER_CACHELINE];
79static __u32 * volatile indicators;
80static __u32 volatile spare_indicator;
81static atomic_t spare_indicator_usecount;
a3ae39c0
AH		 82#define QDIO_MEMPOOL_SCSSC_ELEMENTS 2
83static mempool_t *qdio_mempool_scssc;
c6d0e801 84static struct kmem_cache *qdio_q_cache;
1da177e4
LT		 85
86static debug_info_t *qdio_dbf_setup;
87static debug_info_t *qdio_dbf_sbal;
88static debug_info_t *qdio_dbf_trace;
89static debug_info_t *qdio_dbf_sense;
90#ifdef CONFIG_QDIO_DEBUG
91static debug_info_t *qdio_dbf_slsb_out;
92static debug_info_t *qdio_dbf_slsb_in;
93#endif /* CONFIG_QDIO_DEBUG */
94
95/* iQDIO stuff: */
96static volatile struct qdio_q *tiq_list=NULL; /* volatile as it could change
97 during a while loop */
98static DEFINE_SPINLOCK(ttiq_list_lock);
4e8e56c6 99static void *tiqdio_ind;
1da177e4
LT		 100static void tiqdio_tl(unsigned long);
101static DECLARE_TASKLET(tiqdio_tasklet,tiqdio_tl,0);
102
103/* not a macro, as one of the arguments is atomic_read */
104static inline int
105qdio_min(int a,int b)
106{
107 if (a<b)
108 return a;
109 else
110 return b;
111}
112
113/***************** SCRUBBER HELPER ROUTINES **********************/
00c0c646
UB		 114#ifdef CONFIG_64BIT
115static inline void qdio_perf_stat_inc(atomic64_t *count)
116{
117 if (qdio_performance_stats)
118 atomic64_inc(count);
119}
120
121static inline void qdio_perf_stat_dec(atomic64_t *count)
122{
123 if (qdio_performance_stats)
124 atomic64_dec(count);
125}
126#else /* CONFIG_64BIT */
127static inline void qdio_perf_stat_inc(atomic_t *count)
128{
129 if (qdio_performance_stats)
130 atomic_inc(count);
131}
132
133static inline void qdio_perf_stat_dec(atomic_t *count)
134{
135 if (qdio_performance_stats)
136 atomic_dec(count);
137}
138#endif /* CONFIG_64BIT */
1da177e4 139
a46206e7 140static inline __u64
1da177e4
LT		 141qdio_get_micros(void)
142{
47addc84 143 return (get_clock() >> 12); /* time>>12 is microseconds */
1da177e4
LT		 144}
145
146/*
147 * unfortunately, we can't just xchg the values; in do_QDIO we want to reserve
148 * the q in any case, so that we'll not be interrupted when we are in
149 * qdio_mark_tiq... shouldn't have a really bad impact, as reserving almost
150 * ever works (last famous words)
151 */
152static inline int
153qdio_reserve_q(struct qdio_q *q)
154{
155 return atomic_add_return(1,&q->use_count) - 1;
156}
157
158static inline void
159qdio_release_q(struct qdio_q *q)
160{
161 atomic_dec(&q->use_count);
162}
163
8129ee16 164/*check ccq */
4d284cac 165static int
8129ee16 166qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
1da177e4 167{
8129ee16
FP		 168 char dbf_text[15];
169
6cbed91a 170 if (ccq == 0 || ccq == 32)
8129ee16 171 return 0;
6cbed91a 172 if (ccq == 96 || ccq == 97)
8129ee16
FP		 173 return 1;
174 /*notify devices immediately*/
175 sprintf(dbf_text,"%d", ccq);
176 QDIO_DBF_TEXT2(1,trace,dbf_text);
177 return -EIO;
1da177e4 178}
8129ee16 179/* EQBS: extract buffer states */
4d284cac 180static int
8129ee16
FP		 181qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
182 unsigned int *start, unsigned int *cnt)
183{
184 struct qdio_irq *irq;
185 unsigned int tmp_cnt, q_no, ccq;
186 int rc ;
187 char dbf_text[15];
1da177e4 188
8129ee16
FP		 189 ccq = 0;
190 tmp_cnt = *cnt;
191 irq = (struct qdio_irq*)q->irq_ptr;
192 q_no = q->q_no;
193 if(!q->is_input_q)
194 q_no += irq->no_input_qs;
15c73691 195again:
8129ee16
FP		 196 ccq = do_eqbs(irq->sch_token, state, q_no, start, cnt);
197 rc = qdio_check_ccq(q, ccq);
f276730f
KW		 198 if ((ccq == 96) && (tmp_cnt != *cnt))
199 rc = 0;
15c73691
FP		 200 if (rc == 1) {
201 QDIO_DBF_TEXT5(1,trace,"eqAGAIN");
202 goto again;
203 }
8129ee16
FP		 204 if (rc < 0) {
205 QDIO_DBF_TEXT2(1,trace,"eqberr");
206 sprintf(dbf_text,"%2x,%2x,%d,%d",tmp_cnt, *cnt, ccq, q_no);
207 QDIO_DBF_TEXT2(1,trace,dbf_text);
208 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
209 QDIO_STATUS_LOOK_FOR_ERROR,
210 0, 0, 0, -1, -1, q->int_parm);
211 return 0;
212 }
213 return (tmp_cnt - *cnt);
214}
215
216/* SQBS: set buffer states */
4d284cac 217static int
8129ee16
FP		 218qdio_do_sqbs(struct qdio_q *q, unsigned char state,
219 unsigned int *start, unsigned int *cnt)
220{
221 struct qdio_irq *irq;
222 unsigned int tmp_cnt, q_no, ccq;
223 int rc;
224 char dbf_text[15];
225
226 ccq = 0;
227 tmp_cnt = *cnt;
228 irq = (struct qdio_irq*)q->irq_ptr;
229 q_no = q->q_no;
230 if(!q->is_input_q)
231 q_no += irq->no_input_qs;
15c73691 232again:
8129ee16
FP		 233 ccq = do_sqbs(irq->sch_token, state, q_no, start, cnt);
234 rc = qdio_check_ccq(q, ccq);
15c73691
FP		 235 if (rc == 1) {
236 QDIO_DBF_TEXT5(1,trace,"sqAGAIN");
237 goto again;
238 }
8129ee16 239 if (rc < 0) {
dcc49d46
UB		 240 QDIO_DBF_TEXT3(1,trace,"sqberr");
241 sprintf(dbf_text,"%2x,%2x",tmp_cnt,*cnt);
242 QDIO_DBF_TEXT3(1,trace,dbf_text);
243 sprintf(dbf_text,"%d,%d",ccq,q_no);
244 QDIO_DBF_TEXT3(1,trace,dbf_text);
8129ee16
FP		 245 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
246 QDIO_STATUS_LOOK_FOR_ERROR,
247 0, 0, 0, -1, -1, q->int_parm);
248 return 0;
249 }
250 return (tmp_cnt - *cnt);
251}
252
253static inline int
254qdio_set_slsb(struct qdio_q *q, unsigned int *bufno,
255 unsigned char state, unsigned int *count)
256{
257 volatile char *slsb;
258 struct qdio_irq *irq;
259
260 irq = (struct qdio_irq*)q->irq_ptr;
261 if (!irq->is_qebsm) {
262 slsb = (char *)&q->slsb.acc.val[(*bufno)];
263 xchg(slsb, state);
264 return 1;
265 }
266 return qdio_do_sqbs(q, state, bufno, count);
267}
268
269#ifdef CONFIG_QDIO_DEBUG
270static inline void
271qdio_trace_slsb(struct qdio_q *q)
272{
273 if (q->queue_type==QDIO_TRACE_QTYPE) {
274 if (q->is_input_q)
275 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,
276 QDIO_MAX_BUFFERS_PER_Q);
277 else
278 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,
279 QDIO_MAX_BUFFERS_PER_Q);
280 }
281}
282#endif
283
284static inline int
285set_slsb(struct qdio_q *q, unsigned int *bufno,
286 unsigned char state, unsigned int *count)
287{
288 int rc;
289#ifdef CONFIG_QDIO_DEBUG
290 qdio_trace_slsb(q);
291#endif
292 rc = qdio_set_slsb(q, bufno, state, count);
293#ifdef CONFIG_QDIO_DEBUG
294 qdio_trace_slsb(q);
295#endif
296 return rc;
297}
1da177e4
LT		 298static inline int
299qdio_siga_sync(struct qdio_q *q, unsigned int gpr2,
300 unsigned int gpr3)
301{
302 int cc;
303
304 QDIO_DBF_TEXT4(0,trace,"sigasync");
305 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
306
00c0c646 307 qdio_perf_stat_inc(&perf_stats.siga_syncs);
1da177e4 308
a8237fc4 309 cc = do_siga_sync(q->schid, gpr2, gpr3);
1da177e4
LT		 310 if (cc)
311 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
312
313 return cc;
314}
315
316static inline int
317qdio_siga_sync_q(struct qdio_q *q)
318{
319 if (q->is_input_q)
320 return qdio_siga_sync(q, 0, q->mask);
321 return qdio_siga_sync(q, q->mask, 0);
322}
323
8129ee16
FP		 324static int
325__do_siga_output(struct qdio_q *q, unsigned int *busy_bit)
326{
327 struct qdio_irq *irq;
328 unsigned int fc = 0;
a8237fc4 329 unsigned long schid;
8129ee16
FP		 330
331 irq = (struct qdio_irq *) q->irq_ptr;
332 if (!irq->is_qebsm)
a8237fc4
CH		 333 schid = *((u32 *)&q->schid);
334 else {
335 schid = irq->sch_token;
336 fc |= 0x80;
337 }
338 return do_siga_output(schid, q->mask, busy_bit, fc);
8129ee16
FP		 339}
340
1da177e4
LT		 341/*
342 * returns QDIO_SIGA_ERROR_ACCESS_EXCEPTION as cc, when SIGA returns
343 * an access exception
344 */
4d284cac 345static int
1da177e4
LT		 346qdio_siga_output(struct qdio_q *q)
347{
348 int cc;
349 __u32 busy_bit;
350 __u64 start_time=0;
351
00c0c646 352 qdio_perf_stat_inc(&perf_stats.siga_outs);
1da177e4
LT		 353
354 QDIO_DBF_TEXT4(0,trace,"sigaout");
355 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
356
357 for (;;) {
8129ee16 358 cc = __do_siga_output(q, &busy_bit);
1da177e4
LT		 359//QDIO_PRINT_ERR("cc=%x, busy=%x\n",cc,busy_bit);
360 if ((cc==2) && (busy_bit) && (q->is_iqdio_q)) {
361 if (!start_time)
362 start_time=NOW;
363 if ((NOW-start_time)>QDIO_BUSY_BIT_PATIENCE)
364 break;
365 } else
366 break;
367 }
368
369 if ((cc==2) && (busy_bit))
370 cc |= QDIO_SIGA_ERROR_B_BIT_SET;
371
372 if (cc)
373 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
374
375 return cc;
376}
377
4d284cac 378static int
1da177e4
LT		 379qdio_siga_input(struct qdio_q *q)
380{
381 int cc;
382
383 QDIO_DBF_TEXT4(0,trace,"sigain");
384 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
385
00c0c646 386 qdio_perf_stat_inc(&perf_stats.siga_ins);
1da177e4 387
a8237fc4 388 cc = do_siga_input(q->schid, q->mask);
1da177e4
LT		 389
390 if (cc)
391 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
392
393 return cc;
394}
395
396/* locked by the locks in qdio_activate and qdio_cleanup */
8129ee16 397static __u32 *
1da177e4
LT		 398qdio_get_indicator(void)
399{
400 int i;
401
4e8e56c6 402 for (i = 0; i < INDICATORS_PER_CACHELINE; i++)
1da177e4
LT		 403 if (!indicator_used[i]) {
404 indicator_used[i]=1;
405 return indicators+i;
406 }
407 atomic_inc(&spare_indicator_usecount);
408 return (__u32 * volatile) &spare_indicator;
409}
410
411/* locked by the locks in qdio_activate and qdio_cleanup */
412static void
413qdio_put_indicator(__u32 *addr)
414{
415 int i;
416
417 if ( (addr) && (addr!=&spare_indicator) ) {
418 i=addr-indicators;
419 indicator_used[i]=0;
420 }
421 if (addr == &spare_indicator)
422 atomic_dec(&spare_indicator_usecount);
423}
424
8129ee16 425static inline void
1da177e4
LT		 426tiqdio_clear_summary_bit(__u32 *location)
427{
428 QDIO_DBF_TEXT5(0,trace,"clrsummb");
429 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
430
431 xchg(location,0);
432}
433
8129ee16 434static inline void
1da177e4
LT		 435tiqdio_set_summary_bit(__u32 *location)
436{
437 QDIO_DBF_TEXT5(0,trace,"setsummb");
438 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
439
440 xchg(location,-1);
441}
442
443static inline void
444tiqdio_sched_tl(void)
445{
446 tasklet_hi_schedule(&tiqdio_tasklet);
447}
448
4d284cac 449static void
1da177e4
LT		 450qdio_mark_tiq(struct qdio_q *q)
451{
452 unsigned long flags;
453
454 QDIO_DBF_TEXT4(0,trace,"mark iq");
455 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
456
457 spin_lock_irqsave(&ttiq_list_lock,flags);
458 if (unlikely(atomic_read(&q->is_in_shutdown)))
459 goto out_unlock;
460
461 if (!q->is_input_q)
462 goto out_unlock;
463
464 if ((q->list_prev) || (q->list_next))
465 goto out_unlock;
466
467 if (!tiq_list) {
468 tiq_list=q;
469 q->list_prev=q;
470 q->list_next=q;
471 } else {
472 q->list_next=tiq_list;
473 q->list_prev=tiq_list->list_prev;
474 tiq_list->list_prev->list_next=q;
475 tiq_list->list_prev=q;
476 }
477 spin_unlock_irqrestore(&ttiq_list_lock,flags);
478
479 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
480 tiqdio_sched_tl();
481 return;
482out_unlock:
483 spin_unlock_irqrestore(&ttiq_list_lock,flags);
484 return;
485}
486
487static inline void
488qdio_mark_q(struct qdio_q *q)
489{
490 QDIO_DBF_TEXT4(0,trace,"mark q");
491 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
492
493 if (unlikely(atomic_read(&q->is_in_shutdown)))
494 return;
495
496 tasklet_schedule(&q->tasklet);
497}
498
4d284cac 499static int
1da177e4
LT		 500qdio_stop_polling(struct qdio_q *q)
501{
502#ifdef QDIO_USE_PROCESSING_STATE
8129ee16
FP		 503 unsigned int tmp, gsf, count = 1;
504 unsigned char state = 0;
505 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1da177e4 506
9163bb2e 507 if (!atomic_xchg(&q->polling,0))
1da177e4
LT		 508 return 1;
509
510 QDIO_DBF_TEXT4(0,trace,"stoppoll");
511 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
512
513 /* show the card that we are not polling anymore */
514 if (!q->is_input_q)
515 return 1;
516
8129ee16
FP		 517 tmp = gsf = GET_SAVED_FRONTIER(q);
518 tmp = ((tmp + QDIO_MAX_BUFFERS_PER_Q-1) & (QDIO_MAX_BUFFERS_PER_Q-1) );
519 set_slsb(q, &tmp, SLSB_P_INPUT_NOT_INIT, &count);
520
1da177e4
LT		 521 /*
522 * we don't issue this SYNC_MEMORY, as we trust Rick T and
523 * moreover will not use the PROCESSING state under VM, so
524 * q->polling was 0 anyway
525 */
526 /*SYNC_MEMORY;*/
8129ee16
FP		 527 if (irq->is_qebsm) {
528 count = 1;
529 qdio_do_eqbs(q, &state, &gsf, &count);
530 } else
531 state = q->slsb.acc.val[gsf];
532 if (state != SLSB_P_INPUT_PRIMED)
1da177e4
LT		 533 return 1;
534 /*
535 * set our summary bit again, as otherwise there is a
536 * small window we can miss between resetting it and
537 * checking for PRIMED state
538 */
539 if (q->is_thinint_q)
540 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
541 return 0;
542
543#else /* QDIO_USE_PROCESSING_STATE */
544 return 1;
545#endif /* QDIO_USE_PROCESSING_STATE */
546}
547
548/*
549 * see the comment in do_QDIO and before qdio_reserve_q about the
550 * sophisticated locking outside of unmark_q, so that we don't need to
551 * disable the interrupts :-)
552*/
4d284cac 553static void
1da177e4
LT		 554qdio_unmark_q(struct qdio_q *q)
555{
556 unsigned long flags;
557
558 QDIO_DBF_TEXT4(0,trace,"unmark q");
559 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
560
561 if ((!q->list_prev)||(!q->list_next))
562 return;
563
564 if ((q->is_thinint_q)&&(q->is_input_q)) {
565 /* iQDIO */
566 spin_lock_irqsave(&ttiq_list_lock,flags);
567 /* in case cleanup has done this already and simultanously
568 * qdio_unmark_q is called from the interrupt handler, we've
569 * got to check this in this specific case again */
570 if ((!q->list_prev)||(!q->list_next))
571 goto out;
572 if (q->list_next==q) {
573 /* q was the only interesting q */
574 tiq_list=NULL;
575 q->list_next=NULL;
576 q->list_prev=NULL;
577 } else {
578 q->list_next->list_prev=q->list_prev;
579 q->list_prev->list_next=q->list_next;
580 tiq_list=q->list_next;
581 q->list_next=NULL;
582 q->list_prev=NULL;
583 }
584out:
585 spin_unlock_irqrestore(&ttiq_list_lock,flags);
586 }
587}
588
589static inline unsigned long
590tiqdio_clear_global_summary(void)
591{
592 unsigned long time;
593
594 QDIO_DBF_TEXT5(0,trace,"clrglobl");
595
596 time = do_clear_global_summary();
597
598 QDIO_DBF_HEX5(0,trace,&time,sizeof(unsigned long));
599
600 return time;
601}
602
603
604/************************* OUTBOUND ROUTINES *******************************/
8129ee16
FP		 605static int
606qdio_qebsm_get_outbound_buffer_frontier(struct qdio_q *q)
607{
608 struct qdio_irq *irq;
609 unsigned char state;
610 unsigned int cnt, count, ftc;
611
612 irq = (struct qdio_irq *) q->irq_ptr;
613 if ((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis))
614 SYNC_MEMORY;
615
616 ftc = q->first_to_check;
617 count = qdio_min(atomic_read(&q->number_of_buffers_used),
618 (QDIO_MAX_BUFFERS_PER_Q-1));
619 if (count == 0)
620 return q->first_to_check;
621 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
622 if (cnt == 0)
623 return q->first_to_check;
624 switch (state) {
625 case SLSB_P_OUTPUT_ERROR:
626 QDIO_DBF_TEXT3(0,trace,"outperr");
627 atomic_sub(cnt , &q->number_of_buffers_used);
628 if (q->qdio_error)
629 q->error_status_flags |=
630 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
631 q->qdio_error = SLSB_P_OUTPUT_ERROR;
632 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
633 q->first_to_check = ftc;
634 break;
635 case SLSB_P_OUTPUT_EMPTY:
636 QDIO_DBF_TEXT5(0,trace,"outpempt");
637 atomic_sub(cnt, &q->number_of_buffers_used);
638 q->first_to_check = ftc;
639 break;
640 case SLSB_CU_OUTPUT_PRIMED:
641 /* all buffers primed */
642 QDIO_DBF_TEXT5(0,trace,"outpprim");
643 break;
644 default:
645 break;
646 }
647 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
648 return q->first_to_check;
649}
650
651static int
652qdio_qebsm_get_inbound_buffer_frontier(struct qdio_q *q)
653{
654 struct qdio_irq *irq;
655 unsigned char state;
656 int tmp, ftc, count, cnt;
657 char dbf_text[15];
658
659
660 irq = (struct qdio_irq *) q->irq_ptr;
661 ftc = q->first_to_check;
662 count = qdio_min(atomic_read(&q->number_of_buffers_used),
663 (QDIO_MAX_BUFFERS_PER_Q-1));
664 if (count == 0)
665 return q->first_to_check;
666 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
667 if (cnt == 0)
668 return q->first_to_check;
669 switch (state) {
670 case SLSB_P_INPUT_ERROR :
671#ifdef CONFIG_QDIO_DEBUG
672 QDIO_DBF_TEXT3(1,trace,"inperr");
673 sprintf(dbf_text,"%2x,%2x",ftc,count);
674 QDIO_DBF_TEXT3(1,trace,dbf_text);
675#endif /* CONFIG_QDIO_DEBUG */
676 if (q->qdio_error)
677 q->error_status_flags |=
678 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
679 q->qdio_error = SLSB_P_INPUT_ERROR;
680 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
681 atomic_sub(cnt, &q->number_of_buffers_used);
682 q->first_to_check = ftc;
683 break;
684 case SLSB_P_INPUT_PRIMED :
685 QDIO_DBF_TEXT3(0,trace,"inptprim");
686 sprintf(dbf_text,"%2x,%2x",ftc,count);
687 QDIO_DBF_TEXT3(1,trace,dbf_text);
688 tmp = 0;
689 ftc = q->first_to_check;
690#ifdef QDIO_USE_PROCESSING_STATE
691 if (cnt > 1) {
692 cnt -= 1;
693 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
694 if (!tmp)
695 break;
696 }
697 cnt = 1;
698 tmp += set_slsb(q, &ftc,
699 SLSB_P_INPUT_PROCESSING, &cnt);
700 atomic_set(&q->polling, 1);
701#else
702 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
703#endif
704 atomic_sub(tmp, &q->number_of_buffers_used);
705 q->first_to_check = ftc;
706 break;
707 case SLSB_CU_INPUT_EMPTY:
708 case SLSB_P_INPUT_NOT_INIT:
709 case SLSB_P_INPUT_PROCESSING:
710 QDIO_DBF_TEXT5(0,trace,"inpnipro");
711 break;
712 default:
713 break;
714 }
715 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
716 return q->first_to_check;
717}
1da177e4 718
4d284cac 719static int
1da177e4
LT		 720qdio_get_outbound_buffer_frontier(struct qdio_q *q)
721{
8129ee16
FP		 722 struct qdio_irq *irq;
723 volatile char *slsb;
724 unsigned int count = 1;
725 int first_not_to_check, f, f_mod_no;
1da177e4
LT		 726 char dbf_text[15];
727
728 QDIO_DBF_TEXT4(0,trace,"getobfro");
729 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
730
8129ee16
FP		 731 irq = (struct qdio_irq *) q->irq_ptr;
732 if (irq->is_qebsm)
733 return qdio_qebsm_get_outbound_buffer_frontier(q);
734
1da177e4
LT		 735 slsb=&q->slsb.acc.val[0];
736 f_mod_no=f=q->first_to_check;
737 /*
738 * f points to already processed elements, so f+no_used is correct...
739 * ... but: we don't check 128 buffers, as otherwise
740 * qdio_has_outbound_q_moved would return 0
741 */
742 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
743 (QDIO_MAX_BUFFERS_PER_Q-1));
744
37cd0a00
KW		 745 if (((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis)) ||
746 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH))
1da177e4
LT		 747 SYNC_MEMORY;
748
749check_next:
750 if (f==first_not_to_check)
751 goto out;
752
753 switch(slsb[f_mod_no]) {
754
755 /* the adapter has not fetched the output yet */
756 case SLSB_CU_OUTPUT_PRIMED:
757 QDIO_DBF_TEXT5(0,trace,"outpprim");
758 break;
759
760 /* the adapter got it */
761 case SLSB_P_OUTPUT_EMPTY:
762 atomic_dec(&q->number_of_buffers_used);
763 f++;
764 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
765 QDIO_DBF_TEXT5(0,trace,"outpempt");
766 goto check_next;
767
768 case SLSB_P_OUTPUT_ERROR:
769 QDIO_DBF_TEXT3(0,trace,"outperr");
770 sprintf(dbf_text,"%x-%x-%x",f_mod_no,
771 q->sbal[f_mod_no]->element[14].sbalf.value,
772 q->sbal[f_mod_no]->element[15].sbalf.value);
773 QDIO_DBF_TEXT3(1,trace,dbf_text);
774 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
775
776 /* kind of process the buffer */
8129ee16 777 set_slsb(q, &f_mod_no, SLSB_P_OUTPUT_NOT_INIT, &count);
1da177e4
LT		 778
779 /*
780 * we increment the frontier, as this buffer
781 * was processed obviously
782 */
783 atomic_dec(&q->number_of_buffers_used);
784 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
785
786 if (q->qdio_error)
787 q->error_status_flags|=
788 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
789 q->qdio_error=SLSB_P_OUTPUT_ERROR;
790 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
791
792 break;
793
794 /* no new buffers */
795 default:
796 QDIO_DBF_TEXT5(0,trace,"outpni");
797 }
798out:
799 return (q->first_to_check=f_mod_no);
800}
801
802/* all buffers are processed */
4d284cac 803static int
1da177e4
LT		 804qdio_is_outbound_q_done(struct qdio_q *q)
805{
806 int no_used;
807#ifdef CONFIG_QDIO_DEBUG
808 char dbf_text[15];
809#endif
810
811 no_used=atomic_read(&q->number_of_buffers_used);
812
813#ifdef CONFIG_QDIO_DEBUG
814 if (no_used) {
815 sprintf(dbf_text,"oqisnt%02x",no_used);
816 QDIO_DBF_TEXT4(0,trace,dbf_text);
817 } else {
818 QDIO_DBF_TEXT4(0,trace,"oqisdone");
819 }
820 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
821#endif /* CONFIG_QDIO_DEBUG */
822 return (no_used==0);
823}
824
4d284cac 825static int
1da177e4
LT		 826qdio_has_outbound_q_moved(struct qdio_q *q)
827{
828 int i;
829
830 i=qdio_get_outbound_buffer_frontier(q);
831
832 if ( (i!=GET_SAVED_FRONTIER(q)) ||
833 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
834 SAVE_FRONTIER(q,i);
835 QDIO_DBF_TEXT4(0,trace,"oqhasmvd");
836 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
837 return 1;
838 } else {
839 QDIO_DBF_TEXT4(0,trace,"oqhsntmv");
840 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
841 return 0;
842 }
843}
844
4d284cac 845static void
1da177e4
LT		 846qdio_kick_outbound_q(struct qdio_q *q)
847{
848 int result;
849#ifdef CONFIG_QDIO_DEBUG
850 char dbf_text[15];
851
852 QDIO_DBF_TEXT4(0,trace,"kickoutq");
853 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
854#endif /* CONFIG_QDIO_DEBUG */
855
856 if (!q->siga_out)
857 return;
858
859 /* here's the story with cc=2 and busy bit set (thanks, Rick):
860 * VM's CP could present us cc=2 and busy bit set on SIGA-write
861 * during reconfiguration of their Guest LAN (only in HIPERS mode,
862 * QDIO mode is asynchronous -- cc=2 and busy bit there will take
863 * the queues down immediately; and not being under VM we have a
864 * problem on cc=2 and busy bit set right away).
865 *
866 * Therefore qdio_siga_output will try for a short time constantly,
867 * if such a condition occurs. If it doesn't change, it will
868 * increase the busy_siga_counter and save the timestamp, and
869 * schedule the queue for later processing (via mark_q, using the
870 * queue tasklet). __qdio_outbound_processing will check out the
871 * counter. If non-zero, it will call qdio_kick_outbound_q as often
872 * as the value of the counter. This will attempt further SIGA
873 * instructions. For each successful SIGA, the counter is
874 * decreased, for failing SIGAs the counter remains the same, after
875 * all.
876 * After some time of no movement, qdio_kick_outbound_q will
877 * finally fail and reflect corresponding error codes to call
878 * the upper layer module and have it take the queues down.
879 *
880 * Note that this is a change from the original HiperSockets design
881 * (saying cc=2 and busy bit means take the queues down), but in
882 * these days Guest LAN didn't exist... excessive cc=2 with busy bit
883 * conditions will still take the queues down, but the threshold is
884 * higher due to the Guest LAN environment.
885 */
886
887
888 result=qdio_siga_output(q);
889
8129ee16
FP		 890 switch (result) {
891 case 0:
892 /* went smooth this time, reset timestamp */
1da177e4 893#ifdef CONFIG_QDIO_DEBUG
8129ee16 894 QDIO_DBF_TEXT3(0,trace,"cc2reslv");
a8237fc4 895 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
8129ee16
FP		 896 atomic_read(&q->busy_siga_counter));
897 QDIO_DBF_TEXT3(0,trace,dbf_text);
1da177e4 898#endif /* CONFIG_QDIO_DEBUG */
8129ee16
FP		 899 q->timing.busy_start=0;
900 break;
901 case (2|QDIO_SIGA_ERROR_B_BIT_SET):
902 /* cc=2 and busy bit: */
903 atomic_inc(&q->busy_siga_counter);
904
905 /* if the last siga was successful, save
906 * timestamp here */
907 if (!q->timing.busy_start)
908 q->timing.busy_start=NOW;
909
910 /* if we're in time, don't touch error_status_flags
911 * and siga_error */
912 if (NOW-q->timing.busy_start<QDIO_BUSY_BIT_GIVE_UP) {
913 qdio_mark_q(q);
1da177e4 914 break;
8129ee16
FP		 915 }
916 QDIO_DBF_TEXT2(0,trace,"cc2REPRT");
1da177e4 917#ifdef CONFIG_QDIO_DEBUG
a8237fc4 918 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
8129ee16
FP		 919 atomic_read(&q->busy_siga_counter));
920 QDIO_DBF_TEXT3(0,trace,dbf_text);
1da177e4 921#endif /* CONFIG_QDIO_DEBUG */
8129ee16
FP		 922 /* else fallthrough and report error */
923 default:
924 /* for plain cc=1, 2 or 3: */
925 if (q->siga_error)
1da177e4 926 q->error_status_flags|=
8129ee16
FP		 927 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
928 q->error_status_flags|=
929 QDIO_STATUS_LOOK_FOR_ERROR;
930 q->siga_error=result;
931 }
1da177e4
LT		 932}
933
4d284cac 934static void
1da177e4
LT		 935qdio_kick_outbound_handler(struct qdio_q *q)
936{
937 int start, end, real_end, count;
938#ifdef CONFIG_QDIO_DEBUG
939 char dbf_text[15];
940#endif
941
942 start = q->first_element_to_kick;
943 /* last_move_ftc was just updated */
944 real_end = GET_SAVED_FRONTIER(q);
945 end = (real_end+QDIO_MAX_BUFFERS_PER_Q-1)&
946 (QDIO_MAX_BUFFERS_PER_Q-1);
947 count = (end+QDIO_MAX_BUFFERS_PER_Q+1-start)&
948 (QDIO_MAX_BUFFERS_PER_Q-1);
949
950#ifdef CONFIG_QDIO_DEBUG
951 QDIO_DBF_TEXT4(0,trace,"kickouth");
952 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
953
954 sprintf(dbf_text,"s=%2xc=%2x",start,count);
955 QDIO_DBF_TEXT4(0,trace,dbf_text);
956#endif /* CONFIG_QDIO_DEBUG */
957
958 if (q->state==QDIO_IRQ_STATE_ACTIVE)
959 q->handler(q->cdev,QDIO_STATUS_OUTBOUND_INT|
960 q->error_status_flags,
961 q->qdio_error,q->siga_error,q->q_no,start,count,
962 q->int_parm);
963
964 /* for the next time: */
965 q->first_element_to_kick=real_end;
966 q->qdio_error=0;
967 q->siga_error=0;
968 q->error_status_flags=0;
969}
970
4d284cac 971static void
1da177e4
LT		 972__qdio_outbound_processing(struct qdio_q *q)
973{
974 int siga_attempts;
975
976 QDIO_DBF_TEXT4(0,trace,"qoutproc");
977 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
978
979 if (unlikely(qdio_reserve_q(q))) {
980 qdio_release_q(q);
00c0c646 981 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs_resched);
1da177e4
LT		 982 /* as we're sissies, we'll check next time */
983 if (likely(!atomic_read(&q->is_in_shutdown))) {
984 qdio_mark_q(q);
985 QDIO_DBF_TEXT4(0,trace,"busy,agn");
986 }
987 return;
988 }
00c0c646
UB		 989 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs);
990 qdio_perf_stat_inc(&perf_stats.tl_runs);
1da177e4
LT		 991
992 /* see comment in qdio_kick_outbound_q */
993 siga_attempts=atomic_read(&q->busy_siga_counter);
994 while (siga_attempts) {
995 atomic_dec(&q->busy_siga_counter);
996 qdio_kick_outbound_q(q);
997 siga_attempts--;
998 }
999
1000 if (qdio_has_outbound_q_moved(q))
1001 qdio_kick_outbound_handler(q);
1002
1f8bdae9
UB		 1003 if (q->queue_type == QDIO_ZFCP_QFMT) {
1004 if ((!q->hydra_gives_outbound_pcis) &&
1005 (!qdio_is_outbound_q_done(q)))
1006 qdio_mark_q(q);
1007 }
1008 else if (((!q->is_iqdio_q) && (!q->is_pci_out)) ||
1009 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH)) {
1da177e4 1010 /*
1f8bdae9
UB		 1011 * make sure buffer switch from PRIMED to EMPTY is noticed
1012 * and outbound_handler is called
1da177e4 1013 */
1f8bdae9
UB		 1014 if (qdio_is_outbound_q_done(q)) {
1015 del_timer(&q->timer);
1016 } else {
1017 if (!timer_pending(&q->timer))
1018 mod_timer(&q->timer, jiffies +
1019 QDIO_FORCE_CHECK_TIMEOUT);
1020 }
1021 }
1da177e4
LT		 1022
1023 qdio_release_q(q);
1024}
1025
1026static void
b18a2db4 1027qdio_outbound_processing(unsigned long q)
1da177e4 1028{
b18a2db4 1029 __qdio_outbound_processing((struct qdio_q *) q);
1da177e4
LT		 1030}
1031
1032/************************* INBOUND ROUTINES *******************************/
1033
1034
4d284cac 1035static int
1da177e4
LT		 1036qdio_get_inbound_buffer_frontier(struct qdio_q *q)
1037{
8129ee16 1038 struct qdio_irq *irq;
1da177e4
LT		 1039 int f,f_mod_no;
1040 volatile char *slsb;
8129ee16 1041 unsigned int count = 1;
1da177e4
LT		 1042 int first_not_to_check;
1043#ifdef CONFIG_QDIO_DEBUG
1044 char dbf_text[15];
1045#endif /* CONFIG_QDIO_DEBUG */
1046#ifdef QDIO_USE_PROCESSING_STATE
1047 int last_position=-1;
1048#endif /* QDIO_USE_PROCESSING_STATE */
1049
1050 QDIO_DBF_TEXT4(0,trace,"getibfro");
1051 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1052
8129ee16
FP		 1053 irq = (struct qdio_irq *) q->irq_ptr;
1054 if (irq->is_qebsm)
1055 return qdio_qebsm_get_inbound_buffer_frontier(q);
1056
1da177e4
LT		 1057 slsb=&q->slsb.acc.val[0];
1058 f_mod_no=f=q->first_to_check;
1059 /*
1060 * we don't check 128 buffers, as otherwise qdio_has_inbound_q_moved
1061 * would return 0
1062 */
1063 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
1064 (QDIO_MAX_BUFFERS_PER_Q-1));
1065
1066 /*
1067 * we don't use this one, as a PCI or we after a thin interrupt
1068 * will sync the queues
1069 */
1070 /* SYNC_MEMORY;*/
1071
1072check_next:
1073 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
1074 if (f==first_not_to_check)
1075 goto out;
1076 switch (slsb[f_mod_no]) {
1077
1078 /* CU_EMPTY means frontier is reached */
1079 case SLSB_CU_INPUT_EMPTY:
1080 QDIO_DBF_TEXT5(0,trace,"inptempt");
1081 break;
1082
1083 /* P_PRIMED means set slsb to P_PROCESSING and move on */
1084 case SLSB_P_INPUT_PRIMED:
1085 QDIO_DBF_TEXT5(0,trace,"inptprim");
1086
1087#ifdef QDIO_USE_PROCESSING_STATE
1088 /*
1089 * as soon as running under VM, polling the input queues will
1090 * kill VM in terms of CP overhead
1091 */
1092 if (q->siga_sync) {
8129ee16 1093 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1da177e4
LT		 1094 } else {
1095 /* set the previous buffer to NOT_INIT. The current
1096 * buffer will be set to PROCESSING at the end of
1097 * this function to avoid further interrupts. */
1098 if (last_position>=0)
8129ee16
FP		 1099 set_slsb(q, &last_position,
1100 SLSB_P_INPUT_NOT_INIT, &count);
1da177e4
LT		 1101 atomic_set(&q->polling,1);
1102 last_position=f_mod_no;
1103 }
1104#else /* QDIO_USE_PROCESSING_STATE */
8129ee16 1105 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1da177e4
LT		 1106#endif /* QDIO_USE_PROCESSING_STATE */
1107 /*
1108 * not needed, as the inbound queue will be synced on the next
1109 * siga-r, resp. tiqdio_is_inbound_q_done will do the siga-s
1110 */
1111 /*SYNC_MEMORY;*/
1112 f++;
1113 atomic_dec(&q->number_of_buffers_used);
1114 goto check_next;
1115
1116 case SLSB_P_INPUT_NOT_INIT:
1117 case SLSB_P_INPUT_PROCESSING:
1118 QDIO_DBF_TEXT5(0,trace,"inpnipro");
1119 break;
1120
1121 /* P_ERROR means frontier is reached, break and report error */
1122 case SLSB_P_INPUT_ERROR:
1123#ifdef CONFIG_QDIO_DEBUG
1124 sprintf(dbf_text,"inperr%2x",f_mod_no);
1125 QDIO_DBF_TEXT3(1,trace,dbf_text);
1126#endif /* CONFIG_QDIO_DEBUG */
1127 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
1128
1129 /* kind of process the buffer */
8129ee16 1130 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1da177e4
LT		 1131
1132 if (q->qdio_error)
1133 q->error_status_flags|=
1134 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
1135 q->qdio_error=SLSB_P_INPUT_ERROR;
1136 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
1137
1138 /* we increment the frontier, as this buffer
1139 * was processed obviously */
1140 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1141 atomic_dec(&q->number_of_buffers_used);
1142
1143#ifdef QDIO_USE_PROCESSING_STATE
1144 last_position=-1;
1145#endif /* QDIO_USE_PROCESSING_STATE */
1146
1147 break;
1148
1149 /* everything else means frontier not changed (HALTED or so) */
1150 default:
1151 break;
1152 }
1153out:
1154 q->first_to_check=f_mod_no;
1155
1156#ifdef QDIO_USE_PROCESSING_STATE
1157 if (last_position>=0)
6981e936 1158 set_slsb(q, &last_position, SLSB_P_INPUT_PROCESSING, &count);
1da177e4
LT		 1159#endif /* QDIO_USE_PROCESSING_STATE */
1160
1161 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
1162
1163 return q->first_to_check;
1164}
1165
4d284cac 1166static int
1da177e4
LT		 1167qdio_has_inbound_q_moved(struct qdio_q *q)
1168{
1169 int i;
1170
1da177e4
LT		 1171 i=qdio_get_inbound_buffer_frontier(q);
1172 if ( (i!=GET_SAVED_FRONTIER(q)) ||
1173 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
1174 SAVE_FRONTIER(q,i);
1175 if ((!q->siga_sync)&&(!q->hydra_gives_outbound_pcis))
1176 SAVE_TIMESTAMP(q);
1177
1178 QDIO_DBF_TEXT4(0,trace,"inhasmvd");
1179 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1180 return 1;
1181 } else {
1182 QDIO_DBF_TEXT4(0,trace,"inhsntmv");
1183 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1184 return 0;
1185 }
1186}
1187
1188/* means, no more buffers to be filled */
4d284cac 1189static int
1da177e4
LT		 1190tiqdio_is_inbound_q_done(struct qdio_q *q)
1191{
1192 int no_used;
8129ee16
FP		 1193 unsigned int start_buf, count;
1194 unsigned char state = 0;
1195 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1196
1da177e4
LT		 1197#ifdef CONFIG_QDIO_DEBUG
1198 char dbf_text[15];
1199#endif
1200
1201 no_used=atomic_read(&q->number_of_buffers_used);
1202
1203 /* propagate the change from 82 to 80 through VM */
1204 SYNC_MEMORY;
1205
1206#ifdef CONFIG_QDIO_DEBUG
1207 if (no_used) {
1208 sprintf(dbf_text,"iqisnt%02x",no_used);
1209 QDIO_DBF_TEXT4(0,trace,dbf_text);
1210 } else {
1211 QDIO_DBF_TEXT4(0,trace,"iniqisdo");
1212 }
1213 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1214#endif /* CONFIG_QDIO_DEBUG */
1215
1216 if (!no_used)
1217 return 1;
8129ee16
FP		 1218 if (irq->is_qebsm) {
1219 count = 1;
1220 start_buf = q->first_to_check;
1221 qdio_do_eqbs(q, &state, &start_buf, &count);
1222 } else
1223 state = q->slsb.acc.val[q->first_to_check];
1224 if (state != SLSB_P_INPUT_PRIMED)
1da177e4
LT		 1225 /*
1226 * nothing more to do, if next buffer is not PRIMED.
1227 * note that we did a SYNC_MEMORY before, that there
1228 * has been a sychnronization.
1229 * we will return 0 below, as there is nothing to do
1230 * (stop_polling not necessary, as we have not been
1231 * using the PROCESSING state
1232 */
1233 return 0;
1234
1235 /*
1236 * ok, the next input buffer is primed. that means, that device state
1237 * change indicator and adapter local summary are set, so we will find
1238 * it next time.
1239 * we will return 0 below, as there is nothing to do, except scheduling
1240 * ourselves for the next time.
1241 */
1242 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1243 tiqdio_sched_tl();
1244 return 0;
1245}
1246
4d284cac 1247static int
1da177e4
LT		 1248qdio_is_inbound_q_done(struct qdio_q *q)
1249{
1250 int no_used;
8129ee16
FP		 1251 unsigned int start_buf, count;
1252 unsigned char state = 0;
1253 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1254
1da177e4
LT		 1255#ifdef CONFIG_QDIO_DEBUG
1256 char dbf_text[15];
1257#endif
1258
1259 no_used=atomic_read(&q->number_of_buffers_used);
1260
1261 /*
1262 * we need that one for synchronization with the adapter, as it
1263 * does a kind of PCI avoidance
1264 */
1265 SYNC_MEMORY;
1266
1267 if (!no_used) {
1268 QDIO_DBF_TEXT4(0,trace,"inqisdnA");
1269 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1da177e4
LT		 1270 return 1;
1271 }
8129ee16
FP		 1272 if (irq->is_qebsm) {
1273 count = 1;
1274 start_buf = q->first_to_check;
1275 qdio_do_eqbs(q, &state, &start_buf, &count);
1276 } else
1277 state = q->slsb.acc.val[q->first_to_check];
1278 if (state == SLSB_P_INPUT_PRIMED) {
1da177e4
LT		 1279 /* we got something to do */
1280 QDIO_DBF_TEXT4(0,trace,"inqisntA");
1281 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1282 return 0;
1283 }
1284
1285 /* on VM, we don't poll, so the q is always done here */
1286 if (q->siga_sync)
1287 return 1;
1288 if (q->hydra_gives_outbound_pcis)
1289 return 1;
1290
1291 /*
1292 * at this point we know, that inbound first_to_check
1293 * has (probably) not moved (see qdio_inbound_processing)
1294 */
1295 if (NOW>GET_SAVED_TIMESTAMP(q)+q->timing.threshold) {
1296#ifdef CONFIG_QDIO_DEBUG
1297 QDIO_DBF_TEXT4(0,trace,"inqisdon");
1298 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1299 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1300 QDIO_DBF_TEXT4(0,trace,dbf_text);
1301#endif /* CONFIG_QDIO_DEBUG */
1302 return 1;
1303 } else {
1304#ifdef CONFIG_QDIO_DEBUG
1305 QDIO_DBF_TEXT4(0,trace,"inqisntd");
1306 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1307 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1308 QDIO_DBF_TEXT4(0,trace,dbf_text);
1309#endif /* CONFIG_QDIO_DEBUG */
1310 return 0;
1311 }
1312}
1313
4d284cac 1314static void
1da177e4
LT		 1315qdio_kick_inbound_handler(struct qdio_q *q)
1316{
1317 int count, start, end, real_end, i;
1318#ifdef CONFIG_QDIO_DEBUG
1319 char dbf_text[15];
1320#endif
1321
1322 QDIO_DBF_TEXT4(0,trace,"kickinh");
1323 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1324
1325 start=q->first_element_to_kick;
1326 real_end=q->first_to_check;
1327 end=(real_end+QDIO_MAX_BUFFERS_PER_Q-1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1328
1329 i=start;
1330 count=0;
1331 while (1) {
1332 count++;
1333 if (i==end)
1334 break;
1335 i=(i+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1336 }
1337
1338#ifdef CONFIG_QDIO_DEBUG
1339 sprintf(dbf_text,"s=%2xc=%2x",start,count);
1340 QDIO_DBF_TEXT4(0,trace,dbf_text);
1341#endif /* CONFIG_QDIO_DEBUG */
1342
1343 if (likely(q->state==QDIO_IRQ_STATE_ACTIVE))
1344 q->handler(q->cdev,
1345 QDIO_STATUS_INBOUND_INT|q->error_status_flags,
1346 q->qdio_error,q->siga_error,q->q_no,start,count,
1347 q->int_parm);
1348
1349 /* for the next time: */
1350 q->first_element_to_kick=real_end;
1351 q->qdio_error=0;
1352 q->siga_error=0;
1353 q->error_status_flags=0;
1354
00c0c646 1355 qdio_perf_stat_inc(&perf_stats.inbound_cnt);
1da177e4
LT		 1356}
1357
4d284cac 1358static void
1da177e4
LT		 1359__tiqdio_inbound_processing(struct qdio_q *q, int spare_ind_was_set)
1360{
1361 struct qdio_irq *irq_ptr;
1362 struct qdio_q *oq;
1363 int i;
1364
1365 QDIO_DBF_TEXT4(0,trace,"iqinproc");
1366 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1367
1368 /*
1369 * we first want to reserve the q, so that we know, that we don't
1370 * interrupt ourselves and call qdio_unmark_q, as is_in_shutdown might
1371 * be set
1372 */
1373 if (unlikely(qdio_reserve_q(q))) {
1374 qdio_release_q(q);
00c0c646 1375 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1da177e4
LT		 1376 /*
1377 * as we might just be about to stop polling, we make
1378 * sure that we check again at least once more
1379 */
1380 tiqdio_sched_tl();
1381 return;
1382 }
00c0c646 1383 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs);
1da177e4
LT		 1384 if (unlikely(atomic_read(&q->is_in_shutdown))) {
1385 qdio_unmark_q(q);
1386 goto out;
1387 }
1388
1389 /*
1390 * we reset spare_ind_was_set, when the queue does not use the
1391 * spare indicator
1392 */
1393 if (spare_ind_was_set)
1394 spare_ind_was_set = (q->dev_st_chg_ind == &spare_indicator);
1395
1396 if (!(*(q->dev_st_chg_ind)) && !spare_ind_was_set)
1397 goto out;
1398 /*
1399 * q->dev_st_chg_ind is the indicator, be it shared or not.
1400 * only clear it, if indicator is non-shared
1401 */
35b58b02 1402 if (q->dev_st_chg_ind != &spare_indicator)
1da177e4
LT		 1403 tiqdio_clear_summary_bit((__u32*)q->dev_st_chg_ind);
1404
1405 if (q->hydra_gives_outbound_pcis) {
1406 if (!q->siga_sync_done_on_thinints) {
1407 SYNC_MEMORY_ALL;
8d08be92 1408 } else if (!q->siga_sync_done_on_outb_tis) {
1da177e4
LT		 1409 SYNC_MEMORY_ALL_OUTB;
1410 }
1411 } else {
1412 SYNC_MEMORY;
1413 }
1414 /*
1415 * maybe we have to do work on our outbound queues... at least
1416 * we have to check the outbound-int-capable thinint-capable
1417 * queues
1418 */
1419 if (q->hydra_gives_outbound_pcis) {
1420 irq_ptr = (struct qdio_irq*)q->irq_ptr;
1421 for (i=0;i<irq_ptr->no_output_qs;i++) {
1422 oq = irq_ptr->output_qs[i];
34249d0f 1423 if (!qdio_is_outbound_q_done(oq)) {
00c0c646 1424 qdio_perf_stat_dec(&perf_stats.tl_runs);
1da177e4 1425 __qdio_outbound_processing(oq);
34249d0f 1426 }
1da177e4
LT		 1427 }
1428 }
1429
1430 if (!qdio_has_inbound_q_moved(q))
1431 goto out;
1432
1433 qdio_kick_inbound_handler(q);
1434 if (tiqdio_is_inbound_q_done(q))
1435 if (!qdio_stop_polling(q)) {
1436 /*
1437 * we set the flags to get into the stuff next time,
1438 * see also comment in qdio_stop_polling
1439 */
1440 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1441 tiqdio_sched_tl();
1442 }
1443out:
1444 qdio_release_q(q);
1445}
1446
1447static void
b18a2db4 1448tiqdio_inbound_processing(unsigned long q)
1da177e4 1449{
b18a2db4
HC		 1450 __tiqdio_inbound_processing((struct qdio_q *) q,
1451 atomic_read(&spare_indicator_usecount));
1da177e4
LT		 1452}
1453
4d284cac 1454static void
1da177e4
LT		 1455__qdio_inbound_processing(struct qdio_q *q)
1456{
1457 int q_laps=0;
1458
1459 QDIO_DBF_TEXT4(0,trace,"qinproc");
1460 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1461
1462 if (unlikely(qdio_reserve_q(q))) {
1463 qdio_release_q(q);
00c0c646 1464 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs_resched);
1da177e4
LT		 1465 /* as we're sissies, we'll check next time */
1466 if (likely(!atomic_read(&q->is_in_shutdown))) {
1467 qdio_mark_q(q);
1468 QDIO_DBF_TEXT4(0,trace,"busy,agn");
1469 }
1470 return;
1471 }
00c0c646
UB		 1472 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs);
1473 qdio_perf_stat_inc(&perf_stats.tl_runs);
1da177e4
LT		 1474
1475again:
1476 if (qdio_has_inbound_q_moved(q)) {
1477 qdio_kick_inbound_handler(q);
1478 if (!qdio_stop_polling(q)) {
1479 q_laps++;
1480 if (q_laps<QDIO_Q_LAPS)
1481 goto again;
1482 }
1483 qdio_mark_q(q);
1484 } else {
1485 if (!qdio_is_inbound_q_done(q))
1486 /* means poll time is not yet over */
1487 qdio_mark_q(q);
1488 }
1489
1490 qdio_release_q(q);
1491}
1492
1493static void
b18a2db4 1494qdio_inbound_processing(unsigned long q)
1da177e4 1495{
b18a2db4 1496 __qdio_inbound_processing((struct qdio_q *) q);
1da177e4
LT		 1497}
1498
1499/************************* MAIN ROUTINES *******************************/
1500
1501#ifdef QDIO_USE_PROCESSING_STATE
4d284cac 1502static int
1da177e4
LT		 1503tiqdio_reset_processing_state(struct qdio_q *q, int q_laps)
1504{
1505 if (!q) {
1506 tiqdio_sched_tl();
1507 return 0;
1508 }
1509
1510 /*
1511 * under VM, we have not used the PROCESSING state, so no
1512 * need to stop polling
1513 */
1514 if (q->siga_sync)
1515 return 2;
1516
1517 if (unlikely(qdio_reserve_q(q))) {
1518 qdio_release_q(q);
00c0c646 1519 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1da177e4
LT		 1520 /*
1521 * as we might just be about to stop polling, we make
1522 * sure that we check again at least once more
1523 */
1524
1525 /*
1526 * sanity -- we'd get here without setting the
1527 * dev st chg ind
1528 */
1529 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1530 tiqdio_sched_tl();
1531 return 0;
1532 }
1533 if (qdio_stop_polling(q)) {
1534 qdio_release_q(q);
1535 return 2;
1536 }
1537 if (q_laps<QDIO_Q_LAPS-1) {
1538 qdio_release_q(q);
1539 return 3;
1540 }
1541 /*
1542 * we set the flags to get into the stuff
1543 * next time, see also comment in qdio_stop_polling
1544 */
1545 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1546 tiqdio_sched_tl();
1547 qdio_release_q(q);
1548 return 1;
1549
1550}
1551#endif /* QDIO_USE_PROCESSING_STATE */
1552
4d284cac 1553static void
1da177e4
LT		 1554tiqdio_inbound_checks(void)
1555{
1556 struct qdio_q *q;
1557 int spare_ind_was_set=0;
1558#ifdef QDIO_USE_PROCESSING_STATE
1559 int q_laps=0;
1560#endif /* QDIO_USE_PROCESSING_STATE */
1561
1562 QDIO_DBF_TEXT4(0,trace,"iqdinbck");
1563 QDIO_DBF_TEXT5(0,trace,"iqlocsum");
1564
1565#ifdef QDIO_USE_PROCESSING_STATE
1566again:
1567#endif /* QDIO_USE_PROCESSING_STATE */
1568
1569 /* when the spare indicator is used and set, save that and clear it */
1570 if ((atomic_read(&spare_indicator_usecount)) && spare_indicator) {
1571 spare_ind_was_set = 1;
1572 tiqdio_clear_summary_bit((__u32*)&spare_indicator);
1573 }
1574
1575 q=(struct qdio_q*)tiq_list;
1576 do {
1577 if (!q)
1578 break;
1579 __tiqdio_inbound_processing(q, spare_ind_was_set);
1580 q=(struct qdio_q*)q->list_next;
1581 } while (q!=(struct qdio_q*)tiq_list);
1582
1583#ifdef QDIO_USE_PROCESSING_STATE
1584 q=(struct qdio_q*)tiq_list;
1585 do {
1586 int ret;
1587
1588 ret = tiqdio_reset_processing_state(q, q_laps);
1589 switch (ret) {
1590 case 0:
1591 return;
1592 case 1:
1593 q_laps++;
1594 case 2:
1595 q = (struct qdio_q*)q->list_next;
1596 break;
1597 default:
1598 q_laps++;
1599 goto again;
1600 }
1601 } while (q!=(struct qdio_q*)tiq_list);
1602#endif /* QDIO_USE_PROCESSING_STATE */
1603}
1604
1605static void
1606tiqdio_tl(unsigned long data)
1607{
1608 QDIO_DBF_TEXT4(0,trace,"iqdio_tl");
1609
00c0c646 1610 qdio_perf_stat_inc(&perf_stats.tl_runs);
1da177e4
LT		 1611
1612 tiqdio_inbound_checks();
1613}
1614
1615/********************* GENERAL HELPER_ROUTINES ***********************/
1616
1617static void
1618qdio_release_irq_memory(struct qdio_irq *irq_ptr)
1619{
1620 int i;
c6d0e801 1621 struct qdio_q *q;
1da177e4 1622
c6d0e801
HC		 1623 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
1624 q = irq_ptr->input_qs[i];
1625 if (q) {
1626 free_page((unsigned long) q->slib);
1627 kmem_cache_free(qdio_q_cache, q);
1628 }
1629 q = irq_ptr->output_qs[i];
1630 if (q) {
1631 free_page((unsigned long) q->slib);
1632 kmem_cache_free(qdio_q_cache, q);
1633 }
1da177e4 1634 }
c6d0e801 1635 free_page((unsigned long) irq_ptr->qdr);
40ac6b20 1636 free_page((unsigned long) irq_ptr);
1da177e4
LT		 1637}
1638
1639static void
1640qdio_set_impl_params(struct qdio_irq *irq_ptr,
1641 unsigned int qib_param_field_format,
1642 /* pointer to 128 bytes or NULL, if no param field */
1643 unsigned char *qib_param_field,
1644 /* pointer to no_queues*128 words of data or NULL */
1645 unsigned int no_input_qs,
1646 unsigned int no_output_qs,
1647 unsigned long *input_slib_elements,
1648 unsigned long *output_slib_elements)
1649{
1650 int i,j;
1651
1652 if (!irq_ptr)
1653 return;
1654
1655 irq_ptr->qib.pfmt=qib_param_field_format;
1656 if (qib_param_field)
1657 memcpy(irq_ptr->qib.parm,qib_param_field,
1658 QDIO_MAX_BUFFERS_PER_Q);
1659
1660 if (input_slib_elements)
1661 for (i=0;i<no_input_qs;i++) {
1662 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1663 irq_ptr->input_qs[i]->slib->slibe[j].parms=
1664 input_slib_elements[
1665 i*QDIO_MAX_BUFFERS_PER_Q+j];
1666 }
1667 if (output_slib_elements)
1668 for (i=0;i<no_output_qs;i++) {
1669 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1670 irq_ptr->output_qs[i]->slib->slibe[j].parms=
1671 output_slib_elements[
1672 i*QDIO_MAX_BUFFERS_PER_Q+j];
1673 }
1674}
1675
1676static int
1677qdio_alloc_qs(struct qdio_irq *irq_ptr,
1678 int no_input_qs, int no_output_qs)
1679{
1680 int i;
1681 struct qdio_q *q;
1da177e4 1682
c6d0e801
HC		 1683 for (i = 0; i < no_input_qs; i++) {
1684 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1685 if (!q)
1686 return -ENOMEM;
1687 memset(q, 0, sizeof(*q));
1da177e4 1688
c6d0e801 1689 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1da177e4 1690 if (!q->slib) {
c6d0e801
HC		 1691 kmem_cache_free(qdio_q_cache, q);
1692 return -ENOMEM;
1da177e4 1693 }
1da177e4
LT		 1694 irq_ptr->input_qs[i]=q;
1695 }
1696
c6d0e801
HC		 1697 for (i = 0; i < no_output_qs; i++) {
1698 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1699 if (!q)
1700 return -ENOMEM;
1701 memset(q, 0, sizeof(*q));
1da177e4 1702
c6d0e801 1703 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1da177e4 1704 if (!q->slib) {
c6d0e801
HC		 1705 kmem_cache_free(qdio_q_cache, q);
1706 return -ENOMEM;
1da177e4 1707 }
1da177e4
LT		 1708 irq_ptr->output_qs[i]=q;
1709 }
c6d0e801 1710 return 0;
1da177e4
LT		 1711}
1712
1713static void
1714qdio_fill_qs(struct qdio_irq *irq_ptr, struct ccw_device *cdev,
1715 int no_input_qs, int no_output_qs,
1716 qdio_handler_t *input_handler,
1717 qdio_handler_t *output_handler,
1718 unsigned long int_parm,int q_format,
1719 unsigned long flags,
1720 void **inbound_sbals_array,
1721 void **outbound_sbals_array)
1722{
1723 struct qdio_q *q;
1724 int i,j;
1725 char dbf_text[20]; /* see qdio_initialize */
1726 void *ptr;
1727 int available;
1728
78964268 1729 sprintf(dbf_text,"qfqs%4x",cdev->private->schid.sch_no);
1da177e4
LT		 1730 QDIO_DBF_TEXT0(0,setup,dbf_text);
1731 for (i=0;i<no_input_qs;i++) {
1732 q=irq_ptr->input_qs[i];
1733
1734 memset(q,0,((char*)&q->slib)-((char*)q));
1735 sprintf(dbf_text,"in-q%4x",i);
1736 QDIO_DBF_TEXT0(0,setup,dbf_text);
1737 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1738
1739 memset(q->slib,0,PAGE_SIZE);
1740 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1741
1742 available=0;
1743
1744 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1745 q->sbal[j]=*(inbound_sbals_array++);
1746
1747 q->queue_type=q_format;
1748 q->int_parm=int_parm;
a8237fc4 1749 q->schid = irq_ptr->schid;
1da177e4
LT		 1750 q->irq_ptr = irq_ptr;
1751 q->cdev = cdev;
1752 q->mask=1<<(31-i);
1753 q->q_no=i;
1754 q->is_input_q=1;
1755 q->first_to_check=0;
1756 q->last_move_ftc=0;
1757 q->handler=input_handler;
1758 q->dev_st_chg_ind=irq_ptr->dev_st_chg_ind;
1759
1da177e4 1760 /* q->is_thinint_q isn't valid at this time, but
b18a2db4
HC		 1761 * irq_ptr->is_thinint_irq is
1762 */
1763 if (irq_ptr->is_thinint_irq)
1764 tasklet_init(&q->tasklet, tiqdio_inbound_processing,
1765 (unsigned long) q);
1766 else
1767 tasklet_init(&q->tasklet, qdio_inbound_processing,
1768 (unsigned long) q);
1da177e4
LT		 1769
1770 /* actually this is not used for inbound queues. yet. */
1771 atomic_set(&q->busy_siga_counter,0);
1772 q->timing.busy_start=0;
1773
1774/* for (j=0;j<QDIO_STATS_NUMBER;j++)
1775 q->timing.last_transfer_times[j]=(qdio_get_micros()/
1776 QDIO_STATS_NUMBER)*j;
1777 q->timing.last_transfer_index=QDIO_STATS_NUMBER-1;
1778*/
1779
1780 /* fill in slib */
1781 if (i>0) irq_ptr->input_qs[i-1]->slib->nsliba=
1782 (unsigned long)(q->slib);
1783 q->slib->sla=(unsigned long)(q->sl);
1784 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1785
1786 /* fill in sl */
1787 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1788 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1789
1790 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1791 ptr=(void*)q->sl;
1792 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1793 ptr=(void*)&q->slsb;
1794 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1795 ptr=(void*)q->sbal[0];
1796 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1797
1798 /* fill in slsb */
8129ee16
FP		 1799 if (!irq_ptr->is_qebsm) {
1800 unsigned int count = 1;
1801 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1802 set_slsb(q, &j, SLSB_P_INPUT_NOT_INIT, &count);
1803 }
1da177e4
LT		 1804 }
1805
1806 for (i=0;i<no_output_qs;i++) {
1807 q=irq_ptr->output_qs[i];
1808 memset(q,0,((char*)&q->slib)-((char*)q));
1809
1810 sprintf(dbf_text,"outq%4x",i);
1811 QDIO_DBF_TEXT0(0,setup,dbf_text);
1812 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1813
1814 memset(q->slib,0,PAGE_SIZE);
1815 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1816
1817 available=0;
1818
1819 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1820 q->sbal[j]=*(outbound_sbals_array++);
1821
1822 q->queue_type=q_format;
028cf917
UB		 1823 if ((q->queue_type == QDIO_IQDIO_QFMT) &&
1824 (no_output_qs > 1) &&
1825 (i == no_output_qs-1))
1826 q->queue_type = QDIO_IQDIO_QFMT_ASYNCH;
1da177e4
LT		 1827 q->int_parm=int_parm;
1828 q->is_input_q=0;
1f8bdae9 1829 q->is_pci_out = 0;
a8237fc4 1830 q->schid = irq_ptr->schid;
1da177e4
LT		 1831 q->cdev = cdev;
1832 q->irq_ptr = irq_ptr;
1833 q->mask=1<<(31-i);
1834 q->q_no=i;
1835 q->first_to_check=0;
1836 q->last_move_ftc=0;
1837 q->handler=output_handler;
1838
b18a2db4
HC		 1839 tasklet_init(&q->tasklet, qdio_outbound_processing,
1840 (unsigned long) q);
1841 setup_timer(&q->timer, qdio_outbound_processing,
1842 (unsigned long) q);
1da177e4
LT		 1843
1844 atomic_set(&q->busy_siga_counter,0);
1845 q->timing.busy_start=0;
1846
1847 /* fill in slib */
1848 if (i>0) irq_ptr->output_qs[i-1]->slib->nsliba=
1849 (unsigned long)(q->slib);
1850 q->slib->sla=(unsigned long)(q->sl);
1851 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1852
1853 /* fill in sl */
1854 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1855 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1856
1857 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1858 ptr=(void*)q->sl;
1859 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1860 ptr=(void*)&q->slsb;
1861 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1862 ptr=(void*)q->sbal[0];
1863 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1864
1865 /* fill in slsb */
8129ee16
FP		 1866 if (!irq_ptr->is_qebsm) {
1867 unsigned int count = 1;
1868 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1869 set_slsb(q, &j, SLSB_P_OUTPUT_NOT_INIT, &count);
1870 }
1da177e4
LT		 1871 }
1872}
1873
1874static void
1875qdio_fill_thresholds(struct qdio_irq *irq_ptr,
1876 unsigned int no_input_qs,
1877 unsigned int no_output_qs,
1878 unsigned int min_input_threshold,
1879 unsigned int max_input_threshold,
1880 unsigned int min_output_threshold,
1881 unsigned int max_output_threshold)
1882{
1883 int i;
1884 struct qdio_q *q;
1885
1886 for (i=0;i<no_input_qs;i++) {
1887 q=irq_ptr->input_qs[i];
1888 q->timing.threshold=max_input_threshold;
1889/* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1890 q->threshold_classes[j].threshold=
1891 min_input_threshold+
1892 (max_input_threshold-min_input_threshold)/
1893 QDIO_STATS_CLASSES;
1894 }
1895 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1896 }
1897 for (i=0;i<no_output_qs;i++) {
1898 q=irq_ptr->output_qs[i];
1899 q->timing.threshold=max_output_threshold;
1900/* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1901 q->threshold_classes[j].threshold=
1902 min_output_threshold+
1903 (max_output_threshold-min_output_threshold)/
1904 QDIO_STATS_CLASSES;
1905 }
1906 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1907 }
1908}
1909
4e8e56c6 1910static void tiqdio_thinint_handler(void *ind, void *drv_data)
1da177e4
LT		 1911{
1912 QDIO_DBF_TEXT4(0,trace,"thin_int");
1913
00c0c646 1914 qdio_perf_stat_inc(&perf_stats.thinints);
1da177e4
LT		 1915
1916 /* SVS only when needed:
1917 * issue SVS to benefit from iqdio interrupt avoidance
1918 * (SVS clears AISOI)*/
1919 if (!omit_svs)
1920 tiqdio_clear_global_summary();
1921
1922 tiqdio_inbound_checks();
1da177e4
LT		 1923}
1924
1925static void
1926qdio_set_state(struct qdio_irq *irq_ptr, enum qdio_irq_states state)
1927{
1928 int i;
1929#ifdef CONFIG_QDIO_DEBUG
1930 char dbf_text[15];
1931
1932 QDIO_DBF_TEXT5(0,trace,"newstate");
a8237fc4 1933 sprintf(dbf_text,"%4x%4x",irq_ptr->schid.sch_no,state);
1da177e4
LT		 1934 QDIO_DBF_TEXT5(0,trace,dbf_text);
1935#endif /* CONFIG_QDIO_DEBUG */
1936
1937 irq_ptr->state=state;
1938 for (i=0;i<irq_ptr->no_input_qs;i++)
1939 irq_ptr->input_qs[i]->state=state;
1940 for (i=0;i<irq_ptr->no_output_qs;i++)
1941 irq_ptr->output_qs[i]->state=state;
1942 mb();
1943}
1944
4d284cac 1945static void
a8237fc4 1946qdio_irq_check_sense(struct subchannel_id schid, struct irb *irb)
1da177e4
LT		 1947{
1948 char dbf_text[15];
1949
1950 if (irb->esw.esw0.erw.cons) {
a8237fc4 1951 sprintf(dbf_text,"sens%4x",schid.sch_no);
1da177e4
LT		 1952 QDIO_DBF_TEXT2(1,trace,dbf_text);
1953 QDIO_DBF_HEX0(0,sense,irb,QDIO_DBF_SENSE_LEN);
1954
1955 QDIO_PRINT_WARN("sense data available on qdio channel.\n");
9163bb2e
UB		 1956 QDIO_HEXDUMP16(WARN,"irb: ",irb);
1957 QDIO_HEXDUMP16(WARN,"sense data: ",irb->ecw);
1da177e4
LT		 1958 }
1959
1960}
1961
4d284cac 1962static void
1da177e4
LT		 1963qdio_handle_pci(struct qdio_irq *irq_ptr)
1964{
1965 int i;
1966 struct qdio_q *q;
1967
00c0c646 1968 qdio_perf_stat_inc(&perf_stats.pcis);
1da177e4
LT		 1969 for (i=0;i<irq_ptr->no_input_qs;i++) {
1970 q=irq_ptr->input_qs[i];
1971 if (q->is_input_q&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT)
1972 qdio_mark_q(q);
1973 else {
853944cc 1974 qdio_perf_stat_dec(&perf_stats.tl_runs);
1da177e4
LT		 1975 __qdio_inbound_processing(q);
1976 }
1977 }
1978 if (!irq_ptr->hydra_gives_outbound_pcis)
1979 return;
1980 for (i=0;i<irq_ptr->no_output_qs;i++) {
1981 q=irq_ptr->output_qs[i];
1da177e4
LT		 1982 if (qdio_is_outbound_q_done(q))
1983 continue;
00c0c646 1984 qdio_perf_stat_dec(&perf_stats.tl_runs);
1da177e4
LT		 1985 if (!irq_ptr->sync_done_on_outb_pcis)
1986 SYNC_MEMORY;
1987 __qdio_outbound_processing(q);
1988 }
1989}
1990
1991static void qdio_establish_handle_irq(struct ccw_device*, int, int);
1992
4d284cac 1993static void
1da177e4
LT		 1994qdio_handle_activate_check(struct ccw_device *cdev, unsigned long intparm,
1995 int cstat, int dstat)
1996{
1997 struct qdio_irq *irq_ptr;
1998 struct qdio_q *q;
1999 char dbf_text[15];
2000
2001 irq_ptr = cdev->private->qdio_data;
2002
2003 QDIO_DBF_TEXT2(1, trace, "ick2");
2004 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2005 QDIO_DBF_TEXT2(1,trace,dbf_text);
2006 QDIO_DBF_HEX2(0,trace,&intparm,sizeof(int));
2007 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2008 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2009 QDIO_PRINT_ERR("received check condition on activate " \
2010 "queues on device %s (cs=x%x, ds=x%x).\n",
2011 cdev->dev.bus_id, cstat, dstat);
2012 if (irq_ptr->no_input_qs) {
2013 q=irq_ptr->input_qs[0];
2014 } else if (irq_ptr->no_output_qs) {
2015 q=irq_ptr->output_qs[0];
2016 } else {
2017 QDIO_PRINT_ERR("oops... no queue registered for device %s!?\n",
2018 cdev->dev.bus_id);
2019 goto omit_handler_call;
2020 }
2021 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
2022 QDIO_STATUS_LOOK_FOR_ERROR,
2023 0,0,0,-1,-1,q->int_parm);
2024omit_handler_call:
2025 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_STOPPED);
2026
2027}
2028
2029static void
c1637532 2030qdio_call_shutdown(struct work_struct *work)
1da177e4 2031{
c1637532 2032 struct ccw_device_private *priv;
1da177e4
LT		 2033 struct ccw_device *cdev;
2034
c1637532
MS		 2035 priv = container_of(work, struct ccw_device_private, kick_work);
2036 cdev = priv->cdev;
1da177e4
LT		 2037 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2038 put_device(&cdev->dev);
2039}
2040
2041static void
2042qdio_timeout_handler(struct ccw_device *cdev)
2043{
2044 struct qdio_irq *irq_ptr;
2045 char dbf_text[15];
2046
2047 QDIO_DBF_TEXT2(0, trace, "qtoh");
2048 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2049 QDIO_DBF_TEXT2(0, trace, dbf_text);
2050
2051 irq_ptr = cdev->private->qdio_data;
2052 sprintf(dbf_text, "state:%d", irq_ptr->state);
2053 QDIO_DBF_TEXT2(0, trace, dbf_text);
2054
2055 switch (irq_ptr->state) {
2056 case QDIO_IRQ_STATE_INACTIVE:
fb6958a5
CH		 2057 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: timed out\n",
2058 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
1da177e4
LT		 2059 QDIO_DBF_TEXT2(1,setup,"eq:timeo");
2060 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2061 break;
2062 case QDIO_IRQ_STATE_CLEANUP:
fb6958a5
CH		 2063 QDIO_PRINT_INFO("Did not get interrupt on cleanup, "
2064 "irq=0.%x.%x.\n",
2065 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
1da177e4
LT		 2066 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2067 break;
2068 case QDIO_IRQ_STATE_ESTABLISHED:
2069 case QDIO_IRQ_STATE_ACTIVE:
2070 /* I/O has been terminated by common I/O layer. */
fb6958a5
CH		 2071 QDIO_PRINT_INFO("Queues on irq 0.%x.%04x killed by cio.\n",
2072 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
1da177e4
LT		 2073 QDIO_DBF_TEXT2(1, trace, "cio:term");
2074 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
2075 if (get_device(&cdev->dev)) {
2076 /* Can't call shutdown from interrupt context. */
2077 PREPARE_WORK(&cdev->private->kick_work,
c1637532 2078 qdio_call_shutdown);
1da177e4
LT		 2079 queue_work(ccw_device_work, &cdev->private->kick_work);
2080 }
2081 break;
2082 default:
2083 BUG();
2084 }
1da177e4
LT		 2085 wake_up(&cdev->private->wait_q);
2086}
2087
2088static void
2089qdio_handler(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
2090{
2091 struct qdio_irq *irq_ptr;
2092 int cstat,dstat;
2093 char dbf_text[15];
2094
2095#ifdef CONFIG_QDIO_DEBUG
2096 QDIO_DBF_TEXT4(0, trace, "qint");
2097 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2098 QDIO_DBF_TEXT4(0, trace, dbf_text);
2099#endif /* CONFIG_QDIO_DEBUG */
2100
2101 if (!intparm) {
2102 QDIO_PRINT_ERR("got unsolicited interrupt in qdio " \
2103 "handler, device %s\n", cdev->dev.bus_id);
2104 return;
2105 }
2106
2107 irq_ptr = cdev->private->qdio_data;
2108 if (!irq_ptr) {
2109 QDIO_DBF_TEXT2(1, trace, "uint");
2110 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2111 QDIO_DBF_TEXT2(1,trace,dbf_text);
2112 QDIO_PRINT_ERR("received interrupt on unused device %s!\n",
2113 cdev->dev.bus_id);
2114 return;
2115 }
2116
2117 if (IS_ERR(irb)) {
2118 /* Currently running i/o is in error. */
2119 switch (PTR_ERR(irb)) {
2120 case -EIO:
2121 QDIO_PRINT_ERR("i/o error on device %s\n",
2122 cdev->dev.bus_id);
bb0ca330
UB		 2123 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2124 wake_up(&cdev->private->wait_q);
1da177e4
LT		 2125 return;
2126 case -ETIMEDOUT:
2127 qdio_timeout_handler(cdev);
2128 return;
2129 default:
2130 QDIO_PRINT_ERR("unknown error state %ld on device %s\n",
2131 PTR_ERR(irb), cdev->dev.bus_id);
2132 return;
2133 }
2134 }
2135
a8237fc4 2136 qdio_irq_check_sense(irq_ptr->schid, irb);
1da177e4
LT		 2137
2138#ifdef CONFIG_QDIO_DEBUG
2139 sprintf(dbf_text, "state:%d", irq_ptr->state);
2140 QDIO_DBF_TEXT4(0, trace, dbf_text);
2141#endif /* CONFIG_QDIO_DEBUG */
2142
23d805b6
PO		 2143 cstat = irb->scsw.cmd.cstat;
2144 dstat = irb->scsw.cmd.dstat;
1da177e4
LT		 2145
2146 switch (irq_ptr->state) {
2147 case QDIO_IRQ_STATE_INACTIVE:
2148 qdio_establish_handle_irq(cdev, cstat, dstat);
2149 break;
2150
2151 case QDIO_IRQ_STATE_CLEANUP:
2152 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2153 break;
2154
2155 case QDIO_IRQ_STATE_ESTABLISHED:
2156 case QDIO_IRQ_STATE_ACTIVE:
2157 if (cstat & SCHN_STAT_PCI) {
2158 qdio_handle_pci(irq_ptr);
2159 break;
2160 }
2161
2162 if ((cstat&~SCHN_STAT_PCI)||dstat) {
2163 qdio_handle_activate_check(cdev, intparm, cstat, dstat);
2164 break;
2165 }
2166 default:
2167 QDIO_PRINT_ERR("got interrupt for queues in state %d on " \
2168 "device %s?!\n",
2169 irq_ptr->state, cdev->dev.bus_id);
2170 }
2171 wake_up(&cdev->private->wait_q);
2172
2173}
2174
2175int
2176qdio_synchronize(struct ccw_device *cdev, unsigned int flags,
2177 unsigned int queue_number)
2178{
8129ee16 2179 int cc = 0;
1da177e4
LT		 2180 struct qdio_q *q;
2181 struct qdio_irq *irq_ptr;
2182 void *ptr;
2183#ifdef CONFIG_QDIO_DEBUG
2184 char dbf_text[15]="SyncXXXX";
2185#endif
2186
2187 irq_ptr = cdev->private->qdio_data;
2188 if (!irq_ptr)
2189 return -ENODEV;
2190
2191#ifdef CONFIG_QDIO_DEBUG
a8237fc4 2192 *((int*)(&dbf_text[4])) = irq_ptr->schid.sch_no;
1da177e4
LT		 2193 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2194 *((int*)(&dbf_text[0]))=flags;
2195 *((int*)(&dbf_text[4]))=queue_number;
2196 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2197#endif /* CONFIG_QDIO_DEBUG */
2198
2199 if (flags&QDIO_FLAG_SYNC_INPUT) {
2200 q=irq_ptr->input_qs[queue_number];
2201 if (!q)
2202 return -EINVAL;
8129ee16 2203 if (!(irq_ptr->is_qebsm))
a8237fc4 2204 cc = do_siga_sync(q->schid, 0, q->mask);
1da177e4
LT		 2205 } else if (flags&QDIO_FLAG_SYNC_OUTPUT) {
2206 q=irq_ptr->output_qs[queue_number];
2207 if (!q)
2208 return -EINVAL;
8129ee16 2209 if (!(irq_ptr->is_qebsm))
a8237fc4 2210 cc = do_siga_sync(q->schid, q->mask, 0);
1da177e4
LT		 2211 } else
2212 return -EINVAL;
2213
2214 ptr=&cc;
2215 if (cc)
2216 QDIO_DBF_HEX3(0,trace,&ptr,sizeof(int));
2217
2218 return cc;
2219}
2220
e1776856
UB		 2221static int
2222qdio_get_ssqd_information(struct subchannel_id *schid,
2223 struct qdio_chsc_ssqd **ssqd_area)
2224{
2225 int result;
2226
2227 QDIO_DBF_TEXT0(0, setup, "getssqd");
2228 *ssqd_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2229 if (!ssqd_area) {
2230 QDIO_PRINT_WARN("Could not get memory for chsc on sch x%x.\n",
2231 schid->sch_no);
2232 return -ENOMEM;
2233 }
2234
2235 (*ssqd_area)->request = (struct chsc_header) {
2236 .length = 0x0010,
2237 .code = 0x0024,
2238 };
2239 (*ssqd_area)->first_sch = schid->sch_no;
2240 (*ssqd_area)->last_sch = schid->sch_no;
2241 (*ssqd_area)->ssid = schid->ssid;
2242 result = chsc(*ssqd_area);
2243
2244 if (result) {
2245 QDIO_PRINT_WARN("CHSC returned cc %i on sch 0.%x.%x.\n",
2246 result, schid->ssid, schid->sch_no);
2247 goto out;
2248 }
2249
2250 if ((*ssqd_area)->response.code != QDIO_CHSC_RESPONSE_CODE_OK) {
2251 QDIO_PRINT_WARN("CHSC response is 0x%x on sch 0.%x.%x.\n",
2252 (*ssqd_area)->response.code,
2253 schid->ssid, schid->sch_no);
2254 goto out;
2255 }
2256 if (!((*ssqd_area)->flags & CHSC_FLAG_QDIO_CAPABILITY) ||
2257 !((*ssqd_area)->flags & CHSC_FLAG_VALIDITY) ||
2258 ((*ssqd_area)->sch != schid->sch_no)) {
2259 QDIO_PRINT_WARN("huh? problems checking out sch 0.%x.%x... " \
2260 "using all SIGAs.\n",
2261 schid->ssid, schid->sch_no);
2262 goto out;
2263 }
2264 return 0;
2265out:
2266 return -EINVAL;
2267}
2268
2269int
2270qdio_get_ssqd_pct(struct ccw_device *cdev)
2271{
2272 struct qdio_chsc_ssqd *ssqd_area;
2273 struct subchannel_id schid;
2274 char dbf_text[15];
2275 int rc;
2276 int pct = 0;
2277
2278 QDIO_DBF_TEXT0(0, setup, "getpct");
2279 schid = ccw_device_get_subchannel_id(cdev);
2280 rc = qdio_get_ssqd_information(&schid, &ssqd_area);
2281 if (!rc)
2282 pct = (int)ssqd_area->pct;
2283 if (rc != -ENOMEM)
2284 mempool_free(ssqd_area, qdio_mempool_scssc);
2285 sprintf(dbf_text, "pct: %d", pct);
2286 QDIO_DBF_TEXT2(0, setup, dbf_text);
2287 return pct;
2288}
2289EXPORT_SYMBOL(qdio_get_ssqd_pct);
2290
4d284cac 2291static void
e1776856 2292qdio_check_subchannel_qebsm(struct qdio_irq *irq_ptr, unsigned long token)
8129ee16
FP		 2293{
2294 struct qdio_q *q;
2295 int i;
2296 unsigned int count, start_buf;
2297 char dbf_text[15];
2298
2299 /*check if QEBSM is disabled */
e1776856 2300 if (!(irq_ptr->is_qebsm) || !(irq_ptr->qdioac & 0x01)) {
8129ee16
FP		 2301 irq_ptr->is_qebsm = 0;
2302 irq_ptr->sch_token = 0;
2303 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2304 QDIO_DBF_TEXT0(0,setup,"noV=V");
2305 return;
2306 }
2307 irq_ptr->sch_token = token;
2308 /*input queue*/
2309 for (i = 0; i < irq_ptr->no_input_qs;i++) {
2310 q = irq_ptr->input_qs[i];
2311 count = QDIO_MAX_BUFFERS_PER_Q;
2312 start_buf = 0;
2313 set_slsb(q, &start_buf, SLSB_P_INPUT_NOT_INIT, &count);
2314 }
2315 sprintf(dbf_text,"V=V:%2x",irq_ptr->is_qebsm);
2316 QDIO_DBF_TEXT0(0,setup,dbf_text);
2317 sprintf(dbf_text,"%8lx",irq_ptr->sch_token);
2318 QDIO_DBF_TEXT0(0,setup,dbf_text);
2319 /*output queue*/
2320 for (i = 0; i < irq_ptr->no_output_qs; i++) {
2321 q = irq_ptr->output_qs[i];
2322 count = QDIO_MAX_BUFFERS_PER_Q;
2323 start_buf = 0;
2324 set_slsb(q, &start_buf, SLSB_P_OUTPUT_NOT_INIT, &count);
2325 }
2326}
2327
2328static void
e1776856 2329qdio_get_ssqd_siga(struct qdio_irq *irq_ptr)
1da177e4 2330{
e1776856
UB		 2331 int rc;
2332 struct qdio_chsc_ssqd *ssqd_area;
1da177e4 2333
8129ee16 2334 QDIO_DBF_TEXT0(0,setup,"getssqd");
e1776856
UB		 2335 irq_ptr->qdioac = 0;
2336 rc = qdio_get_ssqd_information(&irq_ptr->schid, &ssqd_area);
2337 if (rc) {
2338 QDIO_PRINT_WARN("using all SIGAs for sch x%x.n",
2339 irq_ptr->schid.sch_no);
a07a5b33
JG		 2340 irq_ptr->qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2341 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
8129ee16
FP		 2342 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2343 irq_ptr->is_qebsm = 0;
e1776856
UB		 2344 } else
2345 irq_ptr->qdioac = ssqd_area->qdioac1;
1da177e4 2346
e1776856
UB		 2347 qdio_check_subchannel_qebsm(irq_ptr, ssqd_area->sch_token);
2348 if (rc != -ENOMEM)
2349 mempool_free(ssqd_area, qdio_mempool_scssc);
1da177e4
LT		 2350}
2351
2352static unsigned int
2353tiqdio_check_chsc_availability(void)
2354{
2355 char dbf_text[15];
2356
2357 if (!css_characteristics_avail)
2358 return -EIO;
2359
2360 /* Check for bit 41. */
2361 if (!css_general_characteristics.aif) {
2362 QDIO_PRINT_WARN("Adapter interruption facility not " \
2363 "installed.\n");
2364 return -ENOENT;
2365 }
2366
2367 /* Check for bits 107 and 108. */
2368 if (!css_chsc_characteristics.scssc ||
2369 !css_chsc_characteristics.scsscf) {
2370 QDIO_PRINT_WARN("Set Chan Subsys. Char. & Fast-CHSCs " \
2371 "not available.\n");
2372 return -ENOENT;
2373 }
2374
2375 /* Check for OSA/FCP thin interrupts (bit 67). */
2376 hydra_thinints = css_general_characteristics.aif_osa;
2377 sprintf(dbf_text,"hydrati%1x", hydra_thinints);
2378 QDIO_DBF_TEXT0(0,setup,dbf_text);
2379
347a8dc3 2380#ifdef CONFIG_64BIT
8129ee16
FP		 2381 /* Check for QEBSM support in general (bit 58). */
2382 is_passthrough = css_general_characteristics.qebsm;
2383#endif
2384 sprintf(dbf_text,"cssQBS:%1x", is_passthrough);
2385 QDIO_DBF_TEXT0(0,setup,dbf_text);
2386
1da177e4
LT		 2387 /* Check for aif time delay disablement fac (bit 56). If installed,
2388 * omit svs even under lpar (good point by rick again) */
2389 omit_svs = css_general_characteristics.aif_tdd;
2390 sprintf(dbf_text,"omitsvs%1x", omit_svs);
2391 QDIO_DBF_TEXT0(0,setup,dbf_text);
2392 return 0;
2393}
2394
2395
2396static unsigned int
2397tiqdio_set_subchannel_ind(struct qdio_irq *irq_ptr, int reset_to_zero)
2398{
2399 unsigned long real_addr_local_summary_bit;
2400 unsigned long real_addr_dev_st_chg_ind;
2401 void *ptr;
2402 char dbf_text[15];
2403
2404 unsigned int resp_code;
2405 int result;
2406
2407 struct {
2408 struct chsc_header request;
2409 u16 operation_code;
2410 u16 reserved1;
2411 u32 reserved2;
2412 u32 reserved3;
2413 u64 summary_indicator_addr;
2414 u64 subchannel_indicator_addr;
2415 u32 ks:4;
2416 u32 kc:4;
2417 u32 reserved4:21;
2418 u32 isc:3;
2419 u32 word_with_d_bit;
2420 /* set to 0x10000000 to enable
2421 * time delay disablement facility */
2422 u32 reserved5;
a8237fc4 2423 struct subchannel_id schid;
1da177e4
LT		 2424 u32 reserved6[1004];
2425 struct chsc_header response;
2426 u32 reserved7;
2427 } *scssc_area;
2428
2429 if (!irq_ptr->is_thinint_irq)
2430 return -ENODEV;
2431
2432 if (reset_to_zero) {
2433 real_addr_local_summary_bit=0;
2434 real_addr_dev_st_chg_ind=0;
2435 } else {
2436 real_addr_local_summary_bit=
4e8e56c6 2437 virt_to_phys((volatile void *)tiqdio_ind);
1da177e4
LT		 2438 real_addr_dev_st_chg_ind=
2439 virt_to_phys((volatile void *)irq_ptr->dev_st_chg_ind);
2440 }
2441
a3ae39c0 2442 scssc_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
1da177e4
LT		 2443 if (!scssc_area) {
2444 QDIO_PRINT_WARN("No memory for setting indicators on " \
fb6958a5
CH		 2445 "subchannel 0.%x.%x.\n",
2446 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
1da177e4
LT		 2447 return -ENOMEM;
2448 }
2449 scssc_area->request = (struct chsc_header) {
2450 .length = 0x0fe0,
2451 .code = 0x0021,
2452 };
2453 scssc_area->operation_code = 0;
2454
2455 scssc_area->summary_indicator_addr = real_addr_local_summary_bit;
2456 scssc_area->subchannel_indicator_addr = real_addr_dev_st_chg_ind;
2457 scssc_area->ks = QDIO_STORAGE_KEY;
2458 scssc_area->kc = QDIO_STORAGE_KEY;
2459 scssc_area->isc = TIQDIO_THININT_ISC;
a8237fc4 2460 scssc_area->schid = irq_ptr->schid;
1da177e4
LT		 2461 /* enables the time delay disablement facility. Don't care
2462 * whether it is really there (i.e. we haven't checked for
2463 * it) */
2464 if (css_general_characteristics.aif_tdd)
2465 scssc_area->word_with_d_bit = 0x10000000;
2466 else
2467 QDIO_PRINT_WARN("Time delay disablement facility " \
2468 "not available\n");
2469
1da177e4
LT		 2470 result = chsc(scssc_area);
2471 if (result) {
fb6958a5
CH		 2472 QDIO_PRINT_WARN("could not set indicators on irq 0.%x.%x, " \
2473 "cc=%i.\n",
2474 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,result);
1da177e4
LT		 2475 result = -EIO;
2476 goto out;
2477 }
2478
2479 resp_code = scssc_area->response.code;
2480 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2481 QDIO_PRINT_WARN("response upon setting indicators " \
2482 "is 0x%x.\n",resp_code);
2483 sprintf(dbf_text,"sidR%4x",resp_code);
2484 QDIO_DBF_TEXT1(0,trace,dbf_text);
2485 QDIO_DBF_TEXT1(0,setup,dbf_text);
2486 ptr=&scssc_area->response;
2487 QDIO_DBF_HEX2(1,setup,&ptr,QDIO_DBF_SETUP_LEN);
2488 result = -EIO;
2489 goto out;
2490 }
2491
2492 QDIO_DBF_TEXT2(0,setup,"setscind");
2493 QDIO_DBF_HEX2(0,setup,&real_addr_local_summary_bit,
2494 sizeof(unsigned long));
2495 QDIO_DBF_HEX2(0,setup,&real_addr_dev_st_chg_ind,sizeof(unsigned long));
2496 result = 0;
2497out:
a3ae39c0 2498 mempool_free(scssc_area, qdio_mempool_scssc);
1da177e4
LT		 2499 return result;
2500
2501}
2502
2503static unsigned int
2504tiqdio_set_delay_target(struct qdio_irq *irq_ptr, unsigned long delay_target)
2505{
2506 unsigned int resp_code;
2507 int result;
2508 void *ptr;
2509 char dbf_text[15];
2510
2511 struct {
2512 struct chsc_header request;
2513 u16 operation_code;
2514 u16 reserved1;
2515 u32 reserved2;
2516 u32 reserved3;
2517 u32 reserved4[2];
2518 u32 delay_target;
2519 u32 reserved5[1009];
2520 struct chsc_header response;
2521 u32 reserved6;
2522 } *scsscf_area;
2523
2524 if (!irq_ptr->is_thinint_irq)
2525 return -ENODEV;
2526
a3ae39c0 2527 scsscf_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
1da177e4
LT		 2528 if (!scsscf_area) {
2529 QDIO_PRINT_WARN("No memory for setting delay target on " \
fb6958a5
CH		 2530 "subchannel 0.%x.%x.\n",
2531 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
1da177e4
LT		 2532 return -ENOMEM;
2533 }
2534 scsscf_area->request = (struct chsc_header) {
2535 .length = 0x0fe0,
2536 .code = 0x1027,
2537 };
2538
2539 scsscf_area->delay_target = delay_target<<16;
2540
2541 result=chsc(scsscf_area);
2542 if (result) {
fb6958a5
CH		 2543 QDIO_PRINT_WARN("could not set delay target on irq 0.%x.%x, " \
2544 "cc=%i. Continuing.\n",
2545 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
a8237fc4 2546 result);
1da177e4
LT		 2547 result = -EIO;
2548 goto out;
2549 }
2550
2551 resp_code = scsscf_area->response.code;
2552 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2553 QDIO_PRINT_WARN("response upon setting delay target " \
2554 "is 0x%x. Continuing.\n",resp_code);
2555 sprintf(dbf_text,"sdtR%4x",resp_code);
2556 QDIO_DBF_TEXT1(0,trace,dbf_text);
2557 QDIO_DBF_TEXT1(0,setup,dbf_text);
2558 ptr=&scsscf_area->response;
2559 QDIO_DBF_HEX2(1,trace,&ptr,QDIO_DBF_TRACE_LEN);
2560 }
2561 QDIO_DBF_TEXT2(0,trace,"delytrgt");
2562 QDIO_DBF_HEX2(0,trace,&delay_target,sizeof(unsigned long));
2563 result = 0; /* not critical */
2564out:
a3ae39c0 2565 mempool_free(scsscf_area, qdio_mempool_scssc);
1da177e4
LT		 2566 return result;
2567}
2568
2569int
2570qdio_cleanup(struct ccw_device *cdev, int how)
2571{
2572 struct qdio_irq *irq_ptr;
2573 char dbf_text[15];
2574 int rc;
2575
2576 irq_ptr = cdev->private->qdio_data;
2577 if (!irq_ptr)
2578 return -ENODEV;
2579
a8237fc4 2580 sprintf(dbf_text,"qcln%4x",irq_ptr->schid.sch_no);
1da177e4
LT		 2581 QDIO_DBF_TEXT1(0,trace,dbf_text);
2582 QDIO_DBF_TEXT0(0,setup,dbf_text);
2583
2584 rc = qdio_shutdown(cdev, how);
2585 if ((rc == 0) || (rc == -EINPROGRESS))
2586 rc = qdio_free(cdev);
2587 return rc;
2588}
2589
2590int
2591qdio_shutdown(struct ccw_device *cdev, int how)
2592{
2593 struct qdio_irq *irq_ptr;
2594 int i;
2595 int result = 0;
2596 int rc;
2597 unsigned long flags;
2598 int timeout;
2599 char dbf_text[15];
2600
2601 irq_ptr = cdev->private->qdio_data;
2602 if (!irq_ptr)
2603 return -ENODEV;
2604
2605 down(&irq_ptr->setting_up_sema);
2606
a8237fc4 2607 sprintf(dbf_text,"qsqs%4x",irq_ptr->schid.sch_no);
1da177e4
LT		 2608 QDIO_DBF_TEXT1(0,trace,dbf_text);
2609 QDIO_DBF_TEXT0(0,setup,dbf_text);
2610
2611 /* mark all qs as uninteresting */
2612 for (i=0;i<irq_ptr->no_input_qs;i++)
2613 atomic_set(&irq_ptr->input_qs[i]->is_in_shutdown,1);
2614
2615 for (i=0;i<irq_ptr->no_output_qs;i++)
2616 atomic_set(&irq_ptr->output_qs[i]->is_in_shutdown,1);
2617
2618 tasklet_kill(&tiqdio_tasklet);
2619
2620 for (i=0;i<irq_ptr->no_input_qs;i++) {
2621 qdio_unmark_q(irq_ptr->input_qs[i]);
2622 tasklet_kill(&irq_ptr->input_qs[i]->tasklet);
2623 wait_event_interruptible_timeout(cdev->private->wait_q,
2624 !atomic_read(&irq_ptr->
2625 input_qs[i]->
2626 use_count),
2627 QDIO_NO_USE_COUNT_TIMEOUT);
2628 if (atomic_read(&irq_ptr->input_qs[i]->use_count))
2629 result=-EINPROGRESS;
2630 }
2631
2632 for (i=0;i<irq_ptr->no_output_qs;i++) {
2633 tasklet_kill(&irq_ptr->output_qs[i]->tasklet);
1f8bdae9 2634 del_timer(&irq_ptr->output_qs[i]->timer);
1da177e4
LT		 2635 wait_event_interruptible_timeout(cdev->private->wait_q,
2636 !atomic_read(&irq_ptr->
2637 output_qs[i]->
2638 use_count),
2639 QDIO_NO_USE_COUNT_TIMEOUT);
2640 if (atomic_read(&irq_ptr->output_qs[i]->use_count))
2641 result=-EINPROGRESS;
2642 }
2643
2644 /* cleanup subchannel */
2645 spin_lock_irqsave(get_ccwdev_lock(cdev),flags);
2646 if (how&QDIO_FLAG_CLEANUP_USING_CLEAR) {
2647 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
2648 timeout=QDIO_CLEANUP_CLEAR_TIMEOUT;
2649 } else if (how&QDIO_FLAG_CLEANUP_USING_HALT) {
2650 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2651 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2652 } else { /* default behaviour */
2653 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2654 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2655 }
2656 if (rc == -ENODEV) {
2657 /* No need to wait for device no longer present. */
2658 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2659 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2660 } else if (((void *)cdev->handler != (void *)qdio_handler) && rc == 0) {
2661 /*
2662 * Whoever put another handler there, has to cope with the
2663 * interrupt theirself. Might happen if qdio_shutdown was
2664 * called on already shutdown queues, but this shouldn't have
2665 * bad side effects.
2666 */
2667 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2668 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2669 } else if (rc == 0) {
2670 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1da177e4
LT		 2671 spin_unlock_irqrestore(get_ccwdev_lock(cdev),flags);
2672
bb0ca330
UB		 2673 wait_event_interruptible_timeout(cdev->private->wait_q,
2674 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
2675 irq_ptr->state == QDIO_IRQ_STATE_ERR,
2676 timeout);
1da177e4
LT		 2677 } else {
2678 QDIO_PRINT_INFO("ccw_device_{halt,clear} returned %d for "
2679 "device %s\n", result, cdev->dev.bus_id);
2680 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2681 result = rc;
2682 goto out;
2683 }
2684 if (irq_ptr->is_thinint_irq) {
2685 qdio_put_indicator((__u32*)irq_ptr->dev_st_chg_ind);
2686 tiqdio_set_subchannel_ind(irq_ptr,1);
2687 /* reset adapter interrupt indicators */
2688 }
2689
2690 /* exchange int handlers, if necessary */
2691 if ((void*)cdev->handler == (void*)qdio_handler)
2692 cdev->handler=irq_ptr->original_int_handler;
2693
2694 /* Ignore errors. */
2695 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1da177e4
LT		 2696out:
2697 up(&irq_ptr->setting_up_sema);
2698 return result;
2699}
2700
2701int
2702qdio_free(struct ccw_device *cdev)
2703{
2704 struct qdio_irq *irq_ptr;
2705 char dbf_text[15];
2706
2707 irq_ptr = cdev->private->qdio_data;
2708 if (!irq_ptr)
2709 return -ENODEV;
2710
2711 down(&irq_ptr->setting_up_sema);
2712
a8237fc4 2713 sprintf(dbf_text,"qfqs%4x",irq_ptr->schid.sch_no);
1da177e4
LT		 2714 QDIO_DBF_TEXT1(0,trace,dbf_text);
2715 QDIO_DBF_TEXT0(0,setup,dbf_text);
2716
d2c993d8 2717 cdev->private->qdio_data = NULL;
1da177e4
LT		 2718
2719 up(&irq_ptr->setting_up_sema);
2720
2721 qdio_release_irq_memory(irq_ptr);
2722 module_put(THIS_MODULE);
2723 return 0;
2724}
2725
4d284cac 2726static void
1da177e4
LT		 2727qdio_allocate_do_dbf(struct qdio_initialize *init_data)
2728{
2729 char dbf_text[20]; /* if a printf printed out more than 8 chars */
2730
2731 sprintf(dbf_text,"qfmt:%x",init_data->q_format);
2732 QDIO_DBF_TEXT0(0,setup,dbf_text);
2733 QDIO_DBF_HEX0(0,setup,init_data->adapter_name,8);
2734 sprintf(dbf_text,"qpff%4x",init_data->qib_param_field_format);
2735 QDIO_DBF_TEXT0(0,setup,dbf_text);
2736 QDIO_DBF_HEX0(0,setup,&init_data->qib_param_field,sizeof(char*));
2737 QDIO_DBF_HEX0(0,setup,&init_data->input_slib_elements,sizeof(long*));
2738 QDIO_DBF_HEX0(0,setup,&init_data->output_slib_elements,sizeof(long*));
2739 sprintf(dbf_text,"miit%4x",init_data->min_input_threshold);
2740 QDIO_DBF_TEXT0(0,setup,dbf_text);
2741 sprintf(dbf_text,"mait%4x",init_data->max_input_threshold);
2742 QDIO_DBF_TEXT0(0,setup,dbf_text);
2743 sprintf(dbf_text,"miot%4x",init_data->min_output_threshold);
2744 QDIO_DBF_TEXT0(0,setup,dbf_text);
2745 sprintf(dbf_text,"maot%4x",init_data->max_output_threshold);
2746 QDIO_DBF_TEXT0(0,setup,dbf_text);
2747 sprintf(dbf_text,"niq:%4x",init_data->no_input_qs);
2748 QDIO_DBF_TEXT0(0,setup,dbf_text);
2749 sprintf(dbf_text,"noq:%4x",init_data->no_output_qs);
2750 QDIO_DBF_TEXT0(0,setup,dbf_text);
2751 QDIO_DBF_HEX0(0,setup,&init_data->input_handler,sizeof(void*));
2752 QDIO_DBF_HEX0(0,setup,&init_data->output_handler,sizeof(void*));
2753 QDIO_DBF_HEX0(0,setup,&init_data->int_parm,sizeof(long));
2754 QDIO_DBF_HEX0(0,setup,&init_data->flags,sizeof(long));
2755 QDIO_DBF_HEX0(0,setup,&init_data->input_sbal_addr_array,sizeof(void*));
2756 QDIO_DBF_HEX0(0,setup,&init_data->output_sbal_addr_array,sizeof(void*));
2757}
2758
4d284cac 2759static void
1da177e4
LT		 2760qdio_allocate_fill_input_desc(struct qdio_irq *irq_ptr, int i, int iqfmt)
2761{
2762 irq_ptr->input_qs[i]->is_iqdio_q = iqfmt;
2763 irq_ptr->input_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2764
2765 irq_ptr->qdr->qdf0[i].sliba=(unsigned long)(irq_ptr->input_qs[i]->slib);
2766
2767 irq_ptr->qdr->qdf0[i].sla=(unsigned long)(irq_ptr->input_qs[i]->sl);
2768
2769 irq_ptr->qdr->qdf0[i].slsba=
2770 (unsigned long)(&irq_ptr->input_qs[i]->slsb.acc.val[0]);
2771
2772 irq_ptr->qdr->qdf0[i].akey=QDIO_STORAGE_KEY;
2773 irq_ptr->qdr->qdf0[i].bkey=QDIO_STORAGE_KEY;
2774 irq_ptr->qdr->qdf0[i].ckey=QDIO_STORAGE_KEY;
2775 irq_ptr->qdr->qdf0[i].dkey=QDIO_STORAGE_KEY;
2776}
2777
4d284cac 2778static void
1da177e4
LT		 2779qdio_allocate_fill_output_desc(struct qdio_irq *irq_ptr, int i,
2780 int j, int iqfmt)
2781{
2782 irq_ptr->output_qs[i]->is_iqdio_q = iqfmt;
2783 irq_ptr->output_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2784
2785 irq_ptr->qdr->qdf0[i+j].sliba=(unsigned long)(irq_ptr->output_qs[i]->slib);
2786
2787 irq_ptr->qdr->qdf0[i+j].sla=(unsigned long)(irq_ptr->output_qs[i]->sl);
2788
2789 irq_ptr->qdr->qdf0[i+j].slsba=
2790 (unsigned long)(&irq_ptr->output_qs[i]->slsb.acc.val[0]);
2791
2792 irq_ptr->qdr->qdf0[i+j].akey=QDIO_STORAGE_KEY;
2793 irq_ptr->qdr->qdf0[i+j].bkey=QDIO_STORAGE_KEY;
2794 irq_ptr->qdr->qdf0[i+j].ckey=QDIO_STORAGE_KEY;
2795 irq_ptr->qdr->qdf0[i+j].dkey=QDIO_STORAGE_KEY;
2796}
2797
2798
4d284cac 2799static void
1da177e4
LT		 2800qdio_initialize_set_siga_flags_input(struct qdio_irq *irq_ptr)
2801{
2802 int i;
2803
2804 for (i=0;i<irq_ptr->no_input_qs;i++) {
2805 irq_ptr->input_qs[i]->siga_sync=
2806 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2807 irq_ptr->input_qs[i]->siga_in=
2808 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2809 irq_ptr->input_qs[i]->siga_out=
2810 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2811 irq_ptr->input_qs[i]->siga_sync_done_on_thinints=
2812 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2813 irq_ptr->input_qs[i]->hydra_gives_outbound_pcis=
2814 irq_ptr->hydra_gives_outbound_pcis;
2815 irq_ptr->input_qs[i]->siga_sync_done_on_outb_tis=
2816 ((irq_ptr->qdioac&
2817 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2818 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2819 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2820 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2821
2822 }
2823}
2824
4d284cac 2825static void
1da177e4
LT		 2826qdio_initialize_set_siga_flags_output(struct qdio_irq *irq_ptr)
2827{
2828 int i;
2829
2830 for (i=0;i<irq_ptr->no_output_qs;i++) {
2831 irq_ptr->output_qs[i]->siga_sync=
2832 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2833 irq_ptr->output_qs[i]->siga_in=
2834 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2835 irq_ptr->output_qs[i]->siga_out=
2836 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2837 irq_ptr->output_qs[i]->siga_sync_done_on_thinints=
2838 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2839 irq_ptr->output_qs[i]->hydra_gives_outbound_pcis=
2840 irq_ptr->hydra_gives_outbound_pcis;
2841 irq_ptr->output_qs[i]->siga_sync_done_on_outb_tis=
2842 ((irq_ptr->qdioac&
2843 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2844 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2845 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2846 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2847
2848 }
2849}
2850
4d284cac 2851static int
1da177e4
LT		 2852qdio_establish_irq_check_for_errors(struct ccw_device *cdev, int cstat,
2853 int dstat)
2854{
2855 char dbf_text[15];
2856 struct qdio_irq *irq_ptr;
2857
2858 irq_ptr = cdev->private->qdio_data;
2859
2860 if (cstat || (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END))) {
a8237fc4 2861 sprintf(dbf_text,"ick1%4x",irq_ptr->schid.sch_no);
1da177e4
LT		 2862 QDIO_DBF_TEXT2(1,trace,dbf_text);
2863 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2864 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2865 QDIO_PRINT_ERR("received check condition on establish " \
fb6958a5
CH		 2866 "queues on irq 0.%x.%x (cs=x%x, ds=x%x).\n",
2867 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2868 cstat,dstat);
1da177e4
LT		 2869 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ERR);
2870 }
2871
2872 if (!(dstat & DEV_STAT_DEV_END)) {
2873 QDIO_DBF_TEXT2(1,setup,"eq:no de");
2874 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2875 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
fb6958a5 2876 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: didn't get "
1da177e4 2877 "device end: dstat=%02x, cstat=%02x\n",
fb6958a5
CH		 2878 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2879 dstat, cstat);
1da177e4
LT		 2880 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2881 return 1;
2882 }
2883
2884 if (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END)) {
2885 QDIO_DBF_TEXT2(1,setup,"eq:badio");
2886 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2887 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
fb6958a5 2888 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: got "
1da177e4 2889 "the following devstat: dstat=%02x, "
fb6958a5 2890 "cstat=%02x\n", irq_ptr->schid.ssid,
a8237fc4 2891 irq_ptr->schid.sch_no, dstat, cstat);
1da177e4
LT		 2892 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2893 return 1;
2894 }
2895 return 0;
2896}
2897
2898static void
2899qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, int dstat)
2900{
2901 struct qdio_irq *irq_ptr;
2902 char dbf_text[15];
2903
2904 irq_ptr = cdev->private->qdio_data;
2905
78964268 2906 sprintf(dbf_text,"qehi%4x",cdev->private->schid.sch_no);
1da177e4
LT		 2907 QDIO_DBF_TEXT0(0,setup,dbf_text);
2908 QDIO_DBF_TEXT0(0,trace,dbf_text);
2909
bb0ca330 2910 if (qdio_establish_irq_check_for_errors(cdev, cstat, dstat))
1da177e4 2911 return;
1da177e4
LT		 2912
2913 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ESTABLISHED);
1da177e4
LT		 2914}
2915
2916int
2917qdio_initialize(struct qdio_initialize *init_data)
2918{
2919 int rc;
2920 char dbf_text[15];
2921
78964268 2922 sprintf(dbf_text,"qini%4x",init_data->cdev->private->schid.sch_no);
1da177e4
LT		 2923 QDIO_DBF_TEXT0(0,setup,dbf_text);
2924 QDIO_DBF_TEXT0(0,trace,dbf_text);
2925
2926 rc = qdio_allocate(init_data);
2927 if (rc == 0) {
2928 rc = qdio_establish(init_data);
2929 if (rc != 0)
2930 qdio_free(init_data->cdev);
2931 }
2932
2933 return rc;
2934}
2935
2936
2937int
2938qdio_allocate(struct qdio_initialize *init_data)
2939{
2940 struct qdio_irq *irq_ptr;
2941 char dbf_text[15];
2942
78964268 2943 sprintf(dbf_text,"qalc%4x",init_data->cdev->private->schid.sch_no);
1da177e4
LT		 2944 QDIO_DBF_TEXT0(0,setup,dbf_text);
2945 QDIO_DBF_TEXT0(0,trace,dbf_text);
2946 if ( (init_data->no_input_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2947 (init_data->no_output_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2948 ((init_data->no_input_qs) && (!init_data->input_handler)) ||
2949 ((init_data->no_output_qs) && (!init_data->output_handler)) )
2950 return -EINVAL;
2951
2952 if (!init_data->input_sbal_addr_array)
2953 return -EINVAL;
2954
2955 if (!init_data->output_sbal_addr_array)
2956 return -EINVAL;
2957
2958 qdio_allocate_do_dbf(init_data);
2959
2960 /* create irq */
40ac6b20 2961 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1da177e4
LT		 2962
2963 QDIO_DBF_TEXT0(0,setup,"irq_ptr:");
2964 QDIO_DBF_HEX0(0,setup,&irq_ptr,sizeof(void*));
2965
2966 if (!irq_ptr) {
c6d0e801 2967 QDIO_PRINT_ERR("allocation of irq_ptr failed!\n");
1da177e4
LT		 2968 return -ENOMEM;
2969 }
2970
1da177e4
LT		 2971 init_MUTEX(&irq_ptr->setting_up_sema);
2972
2973 /* QDR must be in DMA area since CCW data address is only 32 bit */
c6d0e801 2974 irq_ptr->qdr = (struct qdr *) __get_free_page(GFP_KERNEL | GFP_DMA);
1da177e4 2975 if (!(irq_ptr->qdr)) {
40ac6b20 2976 free_page((unsigned long) irq_ptr);
c6d0e801 2977 QDIO_PRINT_ERR("allocation of irq_ptr->qdr failed!\n");
1da177e4
LT		 2978 return -ENOMEM;
2979 }
2980 QDIO_DBF_TEXT0(0,setup,"qdr:");
2981 QDIO_DBF_HEX0(0,setup,&irq_ptr->qdr,sizeof(void*));
2982
2983 if (qdio_alloc_qs(irq_ptr,
2984 init_data->no_input_qs,
2985 init_data->no_output_qs)) {
c6d0e801 2986 QDIO_PRINT_ERR("queue allocation failed!\n");
1da177e4
LT		 2987 qdio_release_irq_memory(irq_ptr);
2988 return -ENOMEM;
2989 }
2990
2991 init_data->cdev->private->qdio_data = irq_ptr;
2992
2993 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_INACTIVE);
2994
2995 return 0;
2996}
2997
2b67fc46 2998static int qdio_fill_irq(struct qdio_initialize *init_data)
1da177e4
LT		 2999{
3000 int i;
3001 char dbf_text[15];
3002 struct ciw *ciw;
3003 int is_iqdio;
3004 struct qdio_irq *irq_ptr;
3005
3006 irq_ptr = init_data->cdev->private->qdio_data;
3007
3008 memset(irq_ptr,0,((char*)&irq_ptr->qdr)-((char*)irq_ptr));
3009
3010 /* wipes qib.ac, required by ar7063 */
3011 memset(irq_ptr->qdr,0,sizeof(struct qdr));
3012
3013 irq_ptr->int_parm=init_data->int_parm;
3014
a8237fc4 3015 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
1da177e4
LT		 3016 irq_ptr->no_input_qs=init_data->no_input_qs;
3017 irq_ptr->no_output_qs=init_data->no_output_qs;
3018
3019 if (init_data->q_format==QDIO_IQDIO_QFMT) {
3020 irq_ptr->is_iqdio_irq=1;
3021 irq_ptr->is_thinint_irq=1;
3022 } else {
3023 irq_ptr->is_iqdio_irq=0;
3024 irq_ptr->is_thinint_irq=hydra_thinints;
3025 }
3026 sprintf(dbf_text,"is_i_t%1x%1x",
3027 irq_ptr->is_iqdio_irq,irq_ptr->is_thinint_irq);
3028 QDIO_DBF_TEXT2(0,setup,dbf_text);
3029
3030 if (irq_ptr->is_thinint_irq) {
8129ee16 3031 irq_ptr->dev_st_chg_ind = qdio_get_indicator();
1da177e4
LT		 3032 QDIO_DBF_HEX1(0,setup,&irq_ptr->dev_st_chg_ind,sizeof(void*));
3033 if (!irq_ptr->dev_st_chg_ind) {
3034 QDIO_PRINT_WARN("no indicator location available " \
fb6958a5
CH		 3035 "for irq 0.%x.%x\n",
3036 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
1da177e4
LT		 3037 qdio_release_irq_memory(irq_ptr);
3038 return -ENOBUFS;
3039 }
3040 }
3041
3042 /* defaults */
3043 irq_ptr->equeue.cmd=DEFAULT_ESTABLISH_QS_CMD;
3044 irq_ptr->equeue.count=DEFAULT_ESTABLISH_QS_COUNT;
3045 irq_ptr->aqueue.cmd=DEFAULT_ACTIVATE_QS_CMD;
3046 irq_ptr->aqueue.count=DEFAULT_ACTIVATE_QS_COUNT;
3047
3048 qdio_fill_qs(irq_ptr, init_data->cdev,
3049 init_data->no_input_qs,
3050 init_data->no_output_qs,
3051 init_data->input_handler,
3052 init_data->output_handler,init_data->int_parm,
3053 init_data->q_format,init_data->flags,
3054 init_data->input_sbal_addr_array,
3055 init_data->output_sbal_addr_array);
3056
3057 if (!try_module_get(THIS_MODULE)) {
3058 QDIO_PRINT_CRIT("try_module_get() failed!\n");
3059 qdio_release_irq_memory(irq_ptr);
3060 return -EINVAL;
3061 }
3062
3063 qdio_fill_thresholds(irq_ptr,init_data->no_input_qs,
3064 init_data->no_output_qs,
3065 init_data->min_input_threshold,
3066 init_data->max_input_threshold,
3067 init_data->min_output_threshold,
3068 init_data->max_output_threshold);
3069
3070 /* fill in qdr */
3071 irq_ptr->qdr->qfmt=init_data->q_format;
3072 irq_ptr->qdr->iqdcnt=init_data->no_input_qs;
3073 irq_ptr->qdr->oqdcnt=init_data->no_output_qs;
3074 irq_ptr->qdr->iqdsz=sizeof(struct qdesfmt0)/4; /* size in words */
3075 irq_ptr->qdr->oqdsz=sizeof(struct qdesfmt0)/4;
3076
3077 irq_ptr->qdr->qiba=(unsigned long)&irq_ptr->qib;
3078 irq_ptr->qdr->qkey=QDIO_STORAGE_KEY;
3079
3080 /* fill in qib */
8129ee16
FP		 3081 irq_ptr->is_qebsm = is_passthrough;
3082 if (irq_ptr->is_qebsm)
3083 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
3084
1da177e4
LT		 3085 irq_ptr->qib.qfmt=init_data->q_format;
3086 if (init_data->no_input_qs)
3087 irq_ptr->qib.isliba=(unsigned long)(irq_ptr->input_qs[0]->slib);
3088 if (init_data->no_output_qs)
3089 irq_ptr->qib.osliba=(unsigned long)(irq_ptr->output_qs[0]->slib);
3090 memcpy(irq_ptr->qib.ebcnam,init_data->adapter_name,8);
3091
3092 qdio_set_impl_params(irq_ptr,init_data->qib_param_field_format,
3093 init_data->qib_param_field,
3094 init_data->no_input_qs,
3095 init_data->no_output_qs,
3096 init_data->input_slib_elements,
3097 init_data->output_slib_elements);
3098
3099 /* first input descriptors, then output descriptors */
3100 is_iqdio = (init_data->q_format == QDIO_IQDIO_QFMT) ? 1 : 0;
3101 for (i=0;i<init_data->no_input_qs;i++)
3102 qdio_allocate_fill_input_desc(irq_ptr, i, is_iqdio);
3103
3104 for (i=0;i<init_data->no_output_qs;i++)
3105 qdio_allocate_fill_output_desc(irq_ptr, i,
3106 init_data->no_input_qs,
3107 is_iqdio);
3108
3109 /* qdr, qib, sls, slsbs, slibs, sbales filled. */
3110
3111 /* get qdio commands */
3112 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
3113 if (!ciw) {
3114 QDIO_DBF_TEXT2(1,setup,"no eq");
3115 QDIO_PRINT_INFO("No equeue CIW found for QDIO commands. "
3116 "Trying to use default.\n");
3117 } else
3118 irq_ptr->equeue = *ciw;
3119 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
3120 if (!ciw) {
3121 QDIO_DBF_TEXT2(1,setup,"no aq");
3122 QDIO_PRINT_INFO("No aqueue CIW found for QDIO commands. "
3123 "Trying to use default.\n");
3124 } else
3125 irq_ptr->aqueue = *ciw;
3126
3127 /* Set new interrupt handler. */
3128 irq_ptr->original_int_handler = init_data->cdev->handler;
3129 init_data->cdev->handler = qdio_handler;
3130
3131 return 0;
3132}
3133
3134int
3135qdio_establish(struct qdio_initialize *init_data)
3136{
3137 struct qdio_irq *irq_ptr;
3138 unsigned long saveflags;
3139 int result, result2;
3140 struct ccw_device *cdev;
3141 char dbf_text[20];
3142
3143 cdev=init_data->cdev;
3144 irq_ptr = cdev->private->qdio_data;
3145 if (!irq_ptr)
3146 return -EINVAL;
3147
3148 if (cdev->private->state != DEV_STATE_ONLINE)
3149 return -EINVAL;
3150
3151 down(&irq_ptr->setting_up_sema);
3152
3153 qdio_fill_irq(init_data);
3154
3155 /* the thinint CHSC stuff */
3156 if (irq_ptr->is_thinint_irq) {
3157
3158 result = tiqdio_set_subchannel_ind(irq_ptr,0);
3159 if (result) {
3160 up(&irq_ptr->setting_up_sema);
3161 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3162 return result;
3163 }
3164 tiqdio_set_delay_target(irq_ptr,TIQDIO_DELAY_TARGET);
3165 }
3166
78964268 3167 sprintf(dbf_text,"qest%4x",cdev->private->schid.sch_no);
1da177e4
LT		 3168 QDIO_DBF_TEXT0(0,setup,dbf_text);
3169 QDIO_DBF_TEXT0(0,trace,dbf_text);
3170
3171 /* establish q */
3172 irq_ptr->ccw.cmd_code=irq_ptr->equeue.cmd;
3173 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3174 irq_ptr->ccw.count=irq_ptr->equeue.count;
3175 irq_ptr->ccw.cda=QDIO_GET_ADDR(irq_ptr->qdr);
3176
3177 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3178
4dd3cc5c 3179 ccw_device_set_options_mask(cdev, 0);
bf3f8378
UB		 3180 result = ccw_device_start(cdev, &irq_ptr->ccw,
3181 QDIO_DOING_ESTABLISH, 0, 0);
1da177e4 3182 if (result) {
bf3f8378
UB		 3183 result2 = ccw_device_start(cdev, &irq_ptr->ccw,
3184 QDIO_DOING_ESTABLISH, 0, 0);
1da177e4
LT		 3185 sprintf(dbf_text,"eq:io%4x",result);
3186 QDIO_DBF_TEXT2(1,setup,dbf_text);
3187 if (result2) {
3188 sprintf(dbf_text,"eq:io%4x",result);
3189 QDIO_DBF_TEXT2(1,setup,dbf_text);
3190 }
fb6958a5
CH		 3191 QDIO_PRINT_WARN("establish queues on irq 0.%x.%04x: do_IO " \
3192 "returned %i, next try returned %i\n",
3193 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3194 result, result2);
1da177e4 3195 result=result2;
1da177e4
LT		 3196 }
3197
3198 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3199
3200 if (result) {
3201 up(&irq_ptr->setting_up_sema);
3202 qdio_shutdown(cdev,QDIO_FLAG_CLEANUP_USING_CLEAR);
3203 return result;
3204 }
3205
bf3f8378
UB		 3206 wait_event_interruptible_timeout(cdev->private->wait_q,
3207 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
3208 irq_ptr->state == QDIO_IRQ_STATE_ERR,
3209 QDIO_ESTABLISH_TIMEOUT);
1da177e4
LT		 3210
3211 if (irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED)
3212 result = 0;
3213 else {
3214 up(&irq_ptr->setting_up_sema);
3215 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3216 return -EIO;
3217 }
3218
e1776856 3219 qdio_get_ssqd_siga(irq_ptr);
1da177e4
LT		 3220 /* if this gets set once, we're running under VM and can omit SVSes */
3221 if (irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY)
3222 omit_svs=1;
3223
3224 sprintf(dbf_text,"qdioac%2x",irq_ptr->qdioac);
3225 QDIO_DBF_TEXT2(0,setup,dbf_text);
3226
3227 sprintf(dbf_text,"qib ac%2x",irq_ptr->qib.ac);
3228 QDIO_DBF_TEXT2(0,setup,dbf_text);
3229
3230 irq_ptr->hydra_gives_outbound_pcis=
3231 irq_ptr->qib.ac&QIB_AC_OUTBOUND_PCI_SUPPORTED;
3232 irq_ptr->sync_done_on_outb_pcis=
3233 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS;
3234
3235 qdio_initialize_set_siga_flags_input(irq_ptr);
3236 qdio_initialize_set_siga_flags_output(irq_ptr);
3237
3238 up(&irq_ptr->setting_up_sema);
3239
3240 return result;
3241
3242}
3243
3244int
3245qdio_activate(struct ccw_device *cdev, int flags)
3246{
3247 struct qdio_irq *irq_ptr;
3248 int i,result=0,result2;
3249 unsigned long saveflags;
3250 char dbf_text[20]; /* see qdio_initialize */
3251
3252 irq_ptr = cdev->private->qdio_data;
3253 if (!irq_ptr)
3254 return -ENODEV;
3255
3256 if (cdev->private->state != DEV_STATE_ONLINE)
3257 return -EINVAL;
3258
3259 down(&irq_ptr->setting_up_sema);
3260 if (irq_ptr->state==QDIO_IRQ_STATE_INACTIVE) {
3261 result=-EBUSY;
3262 goto out;
3263 }
3264
a8237fc4 3265 sprintf(dbf_text,"qact%4x", irq_ptr->schid.sch_no);
1da177e4
LT		 3266 QDIO_DBF_TEXT2(0,setup,dbf_text);
3267 QDIO_DBF_TEXT2(0,trace,dbf_text);
3268
3269 /* activate q */
3270 irq_ptr->ccw.cmd_code=irq_ptr->aqueue.cmd;
3271 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3272 irq_ptr->ccw.count=irq_ptr->aqueue.count;
3273 irq_ptr->ccw.cda=QDIO_GET_ADDR(0);
3274
3275 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3276
1da177e4
LT		 3277 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
3278 result=ccw_device_start(cdev,&irq_ptr->ccw,QDIO_DOING_ACTIVATE,
3279 0, DOIO_DENY_PREFETCH);
3280 if (result) {
3281 result2=ccw_device_start(cdev,&irq_ptr->ccw,
3282 QDIO_DOING_ACTIVATE,0,0);
3283 sprintf(dbf_text,"aq:io%4x",result);
3284 QDIO_DBF_TEXT2(1,setup,dbf_text);
3285 if (result2) {
3286 sprintf(dbf_text,"aq:io%4x",result);
3287 QDIO_DBF_TEXT2(1,setup,dbf_text);
3288 }
fb6958a5
CH		 3289 QDIO_PRINT_WARN("activate queues on irq 0.%x.%04x: do_IO " \
3290 "returned %i, next try returned %i\n",
3291 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3292 result, result2);
1da177e4
LT		 3293 result=result2;
3294 }
3295
3296 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3297 if (result)
3298 goto out;
3299
3300 for (i=0;i<irq_ptr->no_input_qs;i++) {
3301 if (irq_ptr->is_thinint_irq) {
3302 /*
3303 * that way we know, that, if we will get interrupted
3304 * by tiqdio_inbound_processing, qdio_unmark_q will
3305 * not be called
3306 */
3307 qdio_reserve_q(irq_ptr->input_qs[i]);
3308 qdio_mark_tiq(irq_ptr->input_qs[i]);
3309 qdio_release_q(irq_ptr->input_qs[i]);
3310 }
3311 }
3312
3313 if (flags&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT) {
3314 for (i=0;i<irq_ptr->no_input_qs;i++) {
3315 irq_ptr->input_qs[i]->is_input_q|=
3316 QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT;
3317 }
3318 }
3319
b32ecdb7 3320 msleep(QDIO_ACTIVATE_TIMEOUT);
1da177e4
LT		 3321 switch (irq_ptr->state) {
3322 case QDIO_IRQ_STATE_STOPPED:
3323 case QDIO_IRQ_STATE_ERR:
3324 up(&irq_ptr->setting_up_sema);
3325 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3326 down(&irq_ptr->setting_up_sema);
3327 result = -EIO;
3328 break;
3329 default:
3330 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
3331 result = 0;
3332 }
3333 out:
3334 up(&irq_ptr->setting_up_sema);
3335
3336 return result;
3337}
3338
3339/* buffers filled forwards again to make Rick happy */
4d284cac 3340static void
1da177e4
LT		 3341qdio_do_qdio_fill_input(struct qdio_q *q, unsigned int qidx,
3342 unsigned int count, struct qdio_buffer *buffers)
3343{
8129ee16 3344 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
dcc49d46
UB		 3345 int tmp = 0;
3346
8129ee16
FP		 3347 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3348 if (irq->is_qebsm) {
dcc49d46
UB		 3349 while (count) {
3350 tmp = set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3351 if (!tmp)
3352 return;
3353 }
8129ee16
FP		 3354 return;
3355 }
1da177e4 3356 for (;;) {
8129ee16 3357 set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
1da177e4
LT		 3358 count--;
3359 if (!count) break;
8129ee16 3360 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
1da177e4 3361 }
1da177e4
LT		 3362}
3363
4d284cac 3364static void
1da177e4
LT		 3365qdio_do_qdio_fill_output(struct qdio_q *q, unsigned int qidx,
3366 unsigned int count, struct qdio_buffer *buffers)
3367{
8129ee16 3368 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
dcc49d46 3369 int tmp = 0;
8129ee16
FP		 3370
3371 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3372 if (irq->is_qebsm) {
dcc49d46
UB		 3373 while (count) {
3374 tmp = set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3375 if (!tmp)
3376 return;
3377 }
8129ee16
FP		 3378 return;
3379 }
3380
1da177e4 3381 for (;;) {
8129ee16 3382 set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
1da177e4
LT		 3383 count--;
3384 if (!count) break;
8129ee16 3385 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
1da177e4 3386 }
1da177e4
LT		 3387}
3388
4d284cac 3389static void
1da177e4
LT		 3390do_qdio_handle_inbound(struct qdio_q *q, unsigned int callflags,
3391 unsigned int qidx, unsigned int count,
3392 struct qdio_buffer *buffers)
3393{
3394 int used_elements;
3395
3396 /* This is the inbound handling of queues */
3397 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3398
3399 qdio_do_qdio_fill_input(q,qidx,count,buffers);
3400
3401 if ((used_elements+count==QDIO_MAX_BUFFERS_PER_Q)&&
3402 (callflags&QDIO_FLAG_UNDER_INTERRUPT))
9163bb2e 3403 atomic_xchg(&q->polling,0);
1da177e4
LT		 3404
3405 if (used_elements)
3406 return;
3407 if (callflags&QDIO_FLAG_DONT_SIGA)
3408 return;
3409 if (q->siga_in) {
3410 int result;
3411
3412 result=qdio_siga_input(q);
3413 if (result) {
3414 if (q->siga_error)
3415 q->error_status_flags|=
3416 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
3417 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
3418 q->siga_error=result;
3419 }
3420 }
3421
3422 qdio_mark_q(q);
3423}
3424
4d284cac 3425static void
1da177e4
LT		 3426do_qdio_handle_outbound(struct qdio_q *q, unsigned int callflags,
3427 unsigned int qidx, unsigned int count,
3428 struct qdio_buffer *buffers)
3429{
3430 int used_elements;
8129ee16
FP		 3431 unsigned int cnt, start_buf;
3432 unsigned char state = 0;
3433 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1da177e4
LT		 3434
3435 /* This is the outbound handling of queues */
1da177e4
LT		 3436 qdio_do_qdio_fill_output(q,qidx,count,buffers);
3437
3438 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3439
3440 if (callflags&QDIO_FLAG_DONT_SIGA) {
00c0c646 3441 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
1da177e4
LT		 3442 return;
3443 }
1f8bdae9
UB		 3444 if (callflags & QDIO_FLAG_PCI_OUT)
3445 q->is_pci_out = 1;
3446 else
3447 q->is_pci_out = 0;
1da177e4
LT		 3448 if (q->is_iqdio_q) {
3449 /* one siga for every sbal */
3450 while (count--)
3451 qdio_kick_outbound_q(q);
3452
3453 __qdio_outbound_processing(q);
3454 } else {
3455 /* under VM, we do a SIGA sync unconditionally */
3456 SYNC_MEMORY;
3457 else {
3458 /*
3459 * w/o shadow queues (else branch of
3460 * SYNC_MEMORY :-/ ), we try to
3461 * fast-requeue buffers
3462 */
8129ee16
FP		 3463 if (irq->is_qebsm) {
3464 cnt = 1;
3465 start_buf = ((qidx+QDIO_MAX_BUFFERS_PER_Q-1) &
3466 (QDIO_MAX_BUFFERS_PER_Q-1));
3467 qdio_do_eqbs(q, &state, &start_buf, &cnt);
3468 } else
3469 state = q->slsb.acc.val[(qidx+QDIO_MAX_BUFFERS_PER_Q-1)
3470 &(QDIO_MAX_BUFFERS_PER_Q-1) ];
3471 if (state != SLSB_CU_OUTPUT_PRIMED) {
1da177e4
LT		 3472 qdio_kick_outbound_q(q);
3473 } else {
3474 QDIO_DBF_TEXT3(0,trace, "fast-req");
00c0c646 3475 qdio_perf_stat_inc(&perf_stats.fast_reqs);
1da177e4
LT		 3476 }
3477 }
3478 /*
3479 * only marking the q could take too long,
3480 * the upper layer module could do a lot of
3481 * traffic in that time
3482 */
3483 __qdio_outbound_processing(q);
3484 }
3485
00c0c646 3486 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
1da177e4
LT		 3487}
3488
3489/* count must be 1 in iqdio */
3490int
3491do_QDIO(struct ccw_device *cdev,unsigned int callflags,
3492 unsigned int queue_number, unsigned int qidx,
3493 unsigned int count,struct qdio_buffer *buffers)
3494{
3495 struct qdio_irq *irq_ptr;
3496#ifdef CONFIG_QDIO_DEBUG
3497 char dbf_text[20];
3498
85a4aa64 3499 sprintf(dbf_text,"doQD%04x",cdev->private->schid.sch_no);
1da177e4
LT		 3500 QDIO_DBF_TEXT3(0,trace,dbf_text);
3501#endif /* CONFIG_QDIO_DEBUG */
3502
3503 if ( (qidx>QDIO_MAX_BUFFERS_PER_Q) ||
3504 (count>QDIO_MAX_BUFFERS_PER_Q) ||
3505 (queue_number>QDIO_MAX_QUEUES_PER_IRQ) )
3506 return -EINVAL;
3507
3508 if (count==0)
3509 return 0;
3510
3511 irq_ptr = cdev->private->qdio_data;
3512 if (!irq_ptr)
3513 return -ENODEV;
3514
3515#ifdef CONFIG_QDIO_DEBUG
3516 if (callflags&QDIO_FLAG_SYNC_INPUT)
3517 QDIO_DBF_HEX3(0,trace,&irq_ptr->input_qs[queue_number],
3518 sizeof(void*));
3519 else
3520 QDIO_DBF_HEX3(0,trace,&irq_ptr->output_qs[queue_number],
3521 sizeof(void*));
3522 sprintf(dbf_text,"flag%04x",callflags);
3523 QDIO_DBF_TEXT3(0,trace,dbf_text);
3524 sprintf(dbf_text,"qi%02xct%02x",qidx,count);
3525 QDIO_DBF_TEXT3(0,trace,dbf_text);
3526#endif /* CONFIG_QDIO_DEBUG */
3527
3528 if (irq_ptr->state!=QDIO_IRQ_STATE_ACTIVE)
3529 return -EBUSY;
3530
3531 if (callflags&QDIO_FLAG_SYNC_INPUT)
3532 do_qdio_handle_inbound(irq_ptr->input_qs[queue_number],
3533 callflags, qidx, count, buffers);
3534 else if (callflags&QDIO_FLAG_SYNC_OUTPUT)
3535 do_qdio_handle_outbound(irq_ptr->output_qs[queue_number],
3536 callflags, qidx, count, buffers);
3537 else {
3538 QDIO_DBF_TEXT3(1,trace,"doQD:inv");
3539 return -EINVAL;
3540 }
3541 return 0;
3542}
3543
1da177e4
LT		 3544static int
3545qdio_perf_procfile_read(char *buffer, char **buffer_location, off_t offset,
3546 int buffer_length, int *eof, void *data)
3547{
3548 int c=0;
3549
3550 /* we are always called with buffer_length=4k, so we all
3551 deliver on the first read */
3552 if (offset>0)
3553 return 0;
3554
3555#define _OUTP_IT(x...) c+=sprintf(buffer+c,x)
00c0c646
UB		 3556#ifdef CONFIG_64BIT
3557 _OUTP_IT("Number of tasklet runs (total) : %li\n",
3558 (long)atomic64_read(&perf_stats.tl_runs));
3559 _OUTP_IT("Inbound tasklet runs tried/retried : %li/%li\n",
3560 (long)atomic64_read(&perf_stats.inbound_tl_runs),
3561 (long)atomic64_read(&perf_stats.inbound_tl_runs_resched));
3562 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %li/%li\n",
3563 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs),
3564 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs_resched));
3565 _OUTP_IT("Outbound tasklet runs tried/retried : %li/%li\n",
3566 (long)atomic64_read(&perf_stats.outbound_tl_runs),
3567 (long)atomic64_read(&perf_stats.outbound_tl_runs_resched));
1da177e4 3568 _OUTP_IT("\n");
00c0c646
UB		 3569 _OUTP_IT("Number of SIGA sync's issued : %li\n",
3570 (long)atomic64_read(&perf_stats.siga_syncs));
3571 _OUTP_IT("Number of SIGA in's issued : %li\n",
3572 (long)atomic64_read(&perf_stats.siga_ins));
3573 _OUTP_IT("Number of SIGA out's issued : %li\n",
3574 (long)atomic64_read(&perf_stats.siga_outs));
3575 _OUTP_IT("Number of PCIs caught : %li\n",
3576 (long)atomic64_read(&perf_stats.pcis));
3577 _OUTP_IT("Number of adapter interrupts caught : %li\n",
3578 (long)atomic64_read(&perf_stats.thinints));
3579 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %li\n",
3580 (long)atomic64_read(&perf_stats.fast_reqs));
1da177e4 3581 _OUTP_IT("\n");
00c0c646
UB		 3582 _OUTP_IT("Number of inbound transfers : %li\n",
3583 (long)atomic64_read(&perf_stats.inbound_cnt));
3584 _OUTP_IT("Number of do_QDIOs outbound : %li\n",
3585 (long)atomic64_read(&perf_stats.outbound_cnt));
3586#else /* CONFIG_64BIT */
3587 _OUTP_IT("Number of tasklet runs (total) : %i\n",
3588 atomic_read(&perf_stats.tl_runs));
3589 _OUTP_IT("Inbound tasklet runs tried/retried : %i/%i\n",
3590 atomic_read(&perf_stats.inbound_tl_runs),
3591 atomic_read(&perf_stats.inbound_tl_runs_resched));
3592 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %i/%i\n",
3593 atomic_read(&perf_stats.inbound_thin_tl_runs),
3594 atomic_read(&perf_stats.inbound_thin_tl_runs_resched));
3595 _OUTP_IT("Outbound tasklet runs tried/retried : %i/%i\n",
3596 atomic_read(&perf_stats.outbound_tl_runs),
3597 atomic_read(&perf_stats.outbound_tl_runs_resched));
3598 _OUTP_IT("\n");
3599 _OUTP_IT("Number of SIGA sync's issued : %i\n",
3600 atomic_read(&perf_stats.siga_syncs));
3601 _OUTP_IT("Number of SIGA in's issued : %i\n",
3602 atomic_read(&perf_stats.siga_ins));
3603 _OUTP_IT("Number of SIGA out's issued : %i\n",
3604 atomic_read(&perf_stats.siga_outs));
3605 _OUTP_IT("Number of PCIs caught : %i\n",
3606 atomic_read(&perf_stats.pcis));
3607 _OUTP_IT("Number of adapter interrupts caught : %i\n",
3608 atomic_read(&perf_stats.thinints));
3609 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %i\n",
3610 atomic_read(&perf_stats.fast_reqs));
3611 _OUTP_IT("\n");
3612 _OUTP_IT("Number of inbound transfers : %i\n",
3613 atomic_read(&perf_stats.inbound_cnt));
3614 _OUTP_IT("Number of do_QDIOs outbound : %i\n",
3615 atomic_read(&perf_stats.outbound_cnt));
3616#endif /* CONFIG_64BIT */
1da177e4
LT		 3617 _OUTP_IT("\n");
3618
3619 return c;
3620}
3621
3622static struct proc_dir_entry *qdio_perf_proc_file;
1da177e4
LT		 3623
3624static void
3625qdio_add_procfs_entry(void)
3626{
1da177e4
LT		 3627 proc_perf_file_registration=0;
3628 qdio_perf_proc_file=create_proc_entry(QDIO_PERF,
c74c120a 3629 S_IFREG|0444,NULL);
1da177e4
LT		 3630 if (qdio_perf_proc_file) {
3631 qdio_perf_proc_file->read_proc=&qdio_perf_procfile_read;
3632 } else proc_perf_file_registration=-1;
3633
3634 if (proc_perf_file_registration)
3635 QDIO_PRINT_WARN("was not able to register perf. " \
3636 "proc-file (%i).\n",
3637 proc_perf_file_registration);
1da177e4
LT		 3638}
3639
3640static void
3641qdio_remove_procfs_entry(void)
3642{
1da177e4 3643 if (!proc_perf_file_registration) /* means if it went ok earlier */
c74c120a 3644 remove_proc_entry(QDIO_PERF,NULL);
1da177e4
LT		 3645}
3646
34249d0f
UB		 3647/**
3648 * attributes in sysfs
3649 *****************************************************************************/
3650
3651static ssize_t
3652qdio_performance_stats_show(struct bus_type *bus, char *buf)
3653{
3654 return sprintf(buf, "%i\n", qdio_performance_stats ? 1 : 0);
3655}
3656
3657static ssize_t
3658qdio_performance_stats_store(struct bus_type *bus, const char *buf, size_t count)
3659{
2f972202
CH		 3660 unsigned long i;
3661 int ret;
34249d0f 3662
2f972202
CH		 3663 ret = strict_strtoul(buf, 16, &i);
3664 if (!ret && ((i == 0) || (i == 1))) {
34249d0f
UB		 3665 if (i == qdio_performance_stats)
3666 return count;
3667 qdio_performance_stats = i;
3668 if (i==0) {
3669 /* reset perf. stat. info */
00c0c646
UB		 3670#ifdef CONFIG_64BIT
3671 atomic64_set(&perf_stats.tl_runs, 0);
3672 atomic64_set(&perf_stats.outbound_tl_runs, 0);
3673 atomic64_set(&perf_stats.inbound_tl_runs, 0);
3674 atomic64_set(&perf_stats.inbound_tl_runs_resched, 0);
3675 atomic64_set(&perf_stats.inbound_thin_tl_runs, 0);
3676 atomic64_set(&perf_stats.inbound_thin_tl_runs_resched,
3677 0);
3678 atomic64_set(&perf_stats.siga_outs, 0);
3679 atomic64_set(&perf_stats.siga_ins, 0);
3680 atomic64_set(&perf_stats.siga_syncs, 0);
3681 atomic64_set(&perf_stats.pcis, 0);
3682 atomic64_set(&perf_stats.thinints, 0);
3683 atomic64_set(&perf_stats.fast_reqs, 0);
3684 atomic64_set(&perf_stats.outbound_cnt, 0);
3685 atomic64_set(&perf_stats.inbound_cnt, 0);
3686#else /* CONFIG_64BIT */
3687 atomic_set(&perf_stats.tl_runs, 0);
3688 atomic_set(&perf_stats.outbound_tl_runs, 0);
3689 atomic_set(&perf_stats.inbound_tl_runs, 0);
3690 atomic_set(&perf_stats.inbound_tl_runs_resched, 0);
3691 atomic_set(&perf_stats.inbound_thin_tl_runs, 0);
3692 atomic_set(&perf_stats.inbound_thin_tl_runs_resched, 0);
3693 atomic_set(&perf_stats.siga_outs, 0);
3694 atomic_set(&perf_stats.siga_ins, 0);
3695 atomic_set(&perf_stats.siga_syncs, 0);
3696 atomic_set(&perf_stats.pcis, 0);
3697 atomic_set(&perf_stats.thinints, 0);
3698 atomic_set(&perf_stats.fast_reqs, 0);
3699 atomic_set(&perf_stats.outbound_cnt, 0);
3700 atomic_set(&perf_stats.inbound_cnt, 0);
3701#endif /* CONFIG_64BIT */
34249d0f
UB		 3702 }
3703 } else {
c622498e 3704 QDIO_PRINT_ERR("QDIO performance_stats: write 0 or 1 to this file!\n");
34249d0f
UB		 3705 return -EINVAL;
3706 }
3707 return count;
3708}
3709
3710static BUS_ATTR(qdio_performance_stats, 0644, qdio_performance_stats_show,
3711 qdio_performance_stats_store);
3712
1da177e4
LT		 3713static void
3714tiqdio_register_thinints(void)
3715{
3716 char dbf_text[20];
4e8e56c6
PO		 3717
3718 tiqdio_ind =
3719 s390_register_adapter_interrupt(&tiqdio_thinint_handler, NULL);
3720 if (IS_ERR(tiqdio_ind)) {
3721 sprintf(dbf_text, "regthn%lx", PTR_ERR(tiqdio_ind));
1da177e4
LT		 3722 QDIO_DBF_TEXT0(0,setup,dbf_text);
3723 QDIO_PRINT_ERR("failed to register adapter handler " \
4e8e56c6 3724 "(rc=%li).\nAdapter interrupts might " \
1da177e4 3725 "not work. Continuing.\n",
4e8e56c6
PO		 3726 PTR_ERR(tiqdio_ind));
3727 tiqdio_ind = NULL;
1da177e4
LT		 3728 }
3729}
3730
3731static void
3732tiqdio_unregister_thinints(void)
3733{
4e8e56c6
PO		 3734 if (tiqdio_ind)
3735 s390_unregister_adapter_interrupt(tiqdio_ind);
1da177e4
LT		 3736}
3737
3738static int
3739qdio_get_qdio_memory(void)
3740{
3741 int i;
3742 indicator_used[0]=1;
3743
3744 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
3745 indicator_used[i]=0;
88abaab4 3746 indicators = kzalloc(sizeof(__u32)*(INDICATORS_PER_CACHELINE),
4e8e56c6
PO		 3747 GFP_KERNEL);
3748 if (!indicators)
88abaab4 3749 return -ENOMEM;
1da177e4
LT		 3750 return 0;
3751}
3752
3753static void
3754qdio_release_qdio_memory(void)
3755{
17fd682e 3756 kfree(indicators);
1da177e4
LT		 3757}
3758
3759static void
3760qdio_unregister_dbf_views(void)
3761{
3762 if (qdio_dbf_setup)
3763 debug_unregister(qdio_dbf_setup);
3764 if (qdio_dbf_sbal)
3765 debug_unregister(qdio_dbf_sbal);
3766 if (qdio_dbf_sense)
3767 debug_unregister(qdio_dbf_sense);
3768 if (qdio_dbf_trace)
3769 debug_unregister(qdio_dbf_trace);
3770#ifdef CONFIG_QDIO_DEBUG
3771 if (qdio_dbf_slsb_out)
3772 debug_unregister(qdio_dbf_slsb_out);
3773 if (qdio_dbf_slsb_in)
3774 debug_unregister(qdio_dbf_slsb_in);
3775#endif /* CONFIG_QDIO_DEBUG */
3776}
3777
3778static int
3779qdio_register_dbf_views(void)
3780{
3781 qdio_dbf_setup=debug_register(QDIO_DBF_SETUP_NAME,
66a464db 3782 QDIO_DBF_SETUP_PAGES,
1da177e4
LT		 3783 QDIO_DBF_SETUP_NR_AREAS,
3784 QDIO_DBF_SETUP_LEN);
3785 if (!qdio_dbf_setup)
3786 goto oom;
3787 debug_register_view(qdio_dbf_setup,&debug_hex_ascii_view);
3788 debug_set_level(qdio_dbf_setup,QDIO_DBF_SETUP_LEVEL);
3789
3790 qdio_dbf_sbal=debug_register(QDIO_DBF_SBAL_NAME,
66a464db 3791 QDIO_DBF_SBAL_PAGES,
1da177e4
LT		 3792 QDIO_DBF_SBAL_NR_AREAS,
3793 QDIO_DBF_SBAL_LEN);
3794 if (!qdio_dbf_sbal)
3795 goto oom;
3796
3797 debug_register_view(qdio_dbf_sbal,&debug_hex_ascii_view);
3798 debug_set_level(qdio_dbf_sbal,QDIO_DBF_SBAL_LEVEL);
3799
3800 qdio_dbf_sense=debug_register(QDIO_DBF_SENSE_NAME,
66a464db 3801 QDIO_DBF_SENSE_PAGES,
1da177e4
LT		 3802 QDIO_DBF_SENSE_NR_AREAS,
3803 QDIO_DBF_SENSE_LEN);
3804 if (!qdio_dbf_sense)
3805 goto oom;
3806
3807 debug_register_view(qdio_dbf_sense,&debug_hex_ascii_view);
3808 debug_set_level(qdio_dbf_sense,QDIO_DBF_SENSE_LEVEL);
3809
3810 qdio_dbf_trace=debug_register(QDIO_DBF_TRACE_NAME,
66a464db 3811 QDIO_DBF_TRACE_PAGES,
1da177e4
LT		 3812 QDIO_DBF_TRACE_NR_AREAS,
3813 QDIO_DBF_TRACE_LEN);
3814 if (!qdio_dbf_trace)
3815 goto oom;
3816
3817 debug_register_view(qdio_dbf_trace,&debug_hex_ascii_view);
3818 debug_set_level(qdio_dbf_trace,QDIO_DBF_TRACE_LEVEL);
3819
3820#ifdef CONFIG_QDIO_DEBUG
3821 qdio_dbf_slsb_out=debug_register(QDIO_DBF_SLSB_OUT_NAME,
66a464db 3822 QDIO_DBF_SLSB_OUT_PAGES,
1da177e4
LT		 3823 QDIO_DBF_SLSB_OUT_NR_AREAS,
3824 QDIO_DBF_SLSB_OUT_LEN);
3825 if (!qdio_dbf_slsb_out)
3826 goto oom;
3827 debug_register_view(qdio_dbf_slsb_out,&debug_hex_ascii_view);
3828 debug_set_level(qdio_dbf_slsb_out,QDIO_DBF_SLSB_OUT_LEVEL);
3829
3830 qdio_dbf_slsb_in=debug_register(QDIO_DBF_SLSB_IN_NAME,
66a464db 3831 QDIO_DBF_SLSB_IN_PAGES,
1da177e4
LT		 3832 QDIO_DBF_SLSB_IN_NR_AREAS,
3833 QDIO_DBF_SLSB_IN_LEN);
3834 if (!qdio_dbf_slsb_in)
3835 goto oom;
3836 debug_register_view(qdio_dbf_slsb_in,&debug_hex_ascii_view);
3837 debug_set_level(qdio_dbf_slsb_in,QDIO_DBF_SLSB_IN_LEVEL);
3838#endif /* CONFIG_QDIO_DEBUG */
3839 return 0;
3840oom:
3841 QDIO_PRINT_ERR("not enough memory for dbf.\n");
3842 qdio_unregister_dbf_views();
3843 return -ENOMEM;
3844}
3845
a3ae39c0
AH		 3846static void *qdio_mempool_alloc(gfp_t gfp_mask, void *size)
3847{
3848 return (void *) get_zeroed_page(gfp_mask|GFP_DMA);
3849}
3850
3851static void qdio_mempool_free(void *element, void *size)
3852{
3853 free_page((unsigned long) element);
3854}
3855
1da177e4
LT		 3856static int __init
3857init_QDIO(void)
3858{
3859 int res;
1da177e4 3860 void *ptr;
1da177e4
LT		 3861
3862 printk("qdio: loading %s\n",version);
3863
3864 res=qdio_get_qdio_memory();
3865 if (res)
3866 return res;
3867
c6d0e801
HC		 3868 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
3869 256, 0, NULL);
3870 if (!qdio_q_cache) {
3871 qdio_release_qdio_memory();
3872 return -ENOMEM;
3873 }
3874
1da177e4 3875 res = qdio_register_dbf_views();
c6d0e801
HC		 3876 if (res) {
3877 kmem_cache_destroy(qdio_q_cache);
3878 qdio_release_qdio_memory();
1da177e4 3879 return res;
c6d0e801 3880 }
1da177e4
LT		 3881
3882 QDIO_DBF_TEXT0(0,setup,"initQDIO");
34249d0f 3883 res = bus_create_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
1da177e4 3884
34249d0f 3885 memset((void*)&perf_stats,0,sizeof(perf_stats));
1da177e4
LT		 3886 QDIO_DBF_TEXT0(0,setup,"perfstat");
3887 ptr=&perf_stats;
3888 QDIO_DBF_HEX0(0,setup,&ptr,sizeof(void*));
1da177e4
LT		 3889
3890 qdio_add_procfs_entry();
3891
a3ae39c0
AH		 3892 qdio_mempool_scssc = mempool_create(QDIO_MEMPOOL_SCSSC_ELEMENTS,
3893 qdio_mempool_alloc,
3894 qdio_mempool_free, NULL);
3895
1da177e4
LT		 3896 if (tiqdio_check_chsc_availability())
3897 QDIO_PRINT_ERR("Not all CHSCs supported. Continuing.\n");
3898
3899 tiqdio_register_thinints();
3900
3901 return 0;
3902 }
3903
3904static void __exit
3905cleanup_QDIO(void)
3906{
3907 tiqdio_unregister_thinints();
3908 qdio_remove_procfs_entry();
3909 qdio_release_qdio_memory();
3910 qdio_unregister_dbf_views();
a3ae39c0 3911 mempool_destroy(qdio_mempool_scssc);
c6d0e801 3912 kmem_cache_destroy(qdio_q_cache);
34249d0f 3913 bus_remove_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
1da177e4
LT		 3914 printk("qdio: %s: module removed\n",version);
3915}
3916
3917module_init(init_QDIO);
3918module_exit(cleanup_QDIO);
3919
3920EXPORT_SYMBOL(qdio_allocate);
3921EXPORT_SYMBOL(qdio_establish);
3922EXPORT_SYMBOL(qdio_initialize);
3923EXPORT_SYMBOL(qdio_activate);
3924EXPORT_SYMBOL(do_QDIO);
3925EXPORT_SYMBOL(qdio_shutdown);
3926EXPORT_SYMBOL(qdio_free);
3927EXPORT_SYMBOL(qdio_cleanup);
3928EXPORT_SYMBOL(qdio_synchronize);
Linux 6.x block layer and io_uring tree(s)