[linux-block.git] / drivers / pci / hotplug / pciehp.h

/*
 * PCI Express Hot Plug Controller Driver
 *
 * Copyright (C) 1995,2001 Compaq Computer Corporation
 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
 * Copyright (C) 2001 IBM Corp.
 * Copyright (C) 2003-2004 Intel Corporation
 *
 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 * NON INFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
 *
 */
#ifndef _PCIEHP_H
#define _PCIEHP_H

#include <linux/types.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <asm/semaphore.h>
#include <asm/io.h>		
#include <linux/pcieport_if.h>
#include "pci_hotplug.h"

#define MY_NAME	"pciehp"

extern int pciehp_poll_mode;
extern int pciehp_poll_time;
extern int pciehp_debug;

/*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/
#define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
#define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)

struct pci_func {
	struct pci_func *next;
	u8 bus;
	u8 device;
	u8 function;
	u8 is_a_board;
	u16 status;
	u8 configured;
	u8 switch_save;
	u8 presence_save;
	u32 base_length[0x06];
	u8 base_type[0x06];
	u16 reserved2;
	u32 config_space[0x20];
	struct pci_resource *mem_head;
	struct pci_resource *p_mem_head;
	struct pci_resource *io_head;
	struct pci_resource *bus_head;
	struct pci_dev* pci_dev;
};

struct slot {
	struct slot *next;
	u8 bus;
	u8 device;
	u32 number;
	u8 is_a_board;
	u8 configured;
	u8 state;
	u8 switch_save;
	u8 presence_save;
	u32 capabilities;
	u16 reserved2;
	struct timer_list task_event;
	u8 hp_slot;
	struct controller *ctrl;
	struct hpc_ops *hpc_ops;
	struct hotplug_slot *hotplug_slot;
	struct list_head	slot_list;
};

struct pci_resource {
	struct pci_resource * next;
	u32 base;
	u32 length;
};

struct event_info {
	u32 event_type;
	u8 hp_slot;
};

struct controller {
	struct controller *next;
	struct semaphore crit_sect;	/* critical section semaphore */
	void *hpc_ctlr_handle;		/* HPC controller handle */
	int num_slots;			/* Number of slots on ctlr */
	int slot_num_inc;		/* 1 or -1 */
	struct pci_resource *mem_head;
	struct pci_resource *p_mem_head;
	struct pci_resource *io_head;
	struct pci_resource *bus_head;
	struct pci_dev *pci_dev;
	struct pci_bus *pci_bus;
	struct event_info event_queue[10];
	struct slot *slot;
	struct hpc_ops *hpc_ops;
	wait_queue_head_t queue;	/* sleep & wake process */
	u8 next_event;
	u8 seg;
	u8 bus;
	u8 device;
	u8 function;
	u8 rev;
	u8 slot_device_offset;
	u8 add_support;
	enum pci_bus_speed speed;
	u32 first_slot;		/* First physical slot number */  /* PCIE only has 1 slot */
	u8 slot_bus;		/* Bus where the slots handled by this controller sit */
	u8 ctrlcap;
	u16 vendor_id;
	u8 cap_base;
};

struct irq_mapping {
	u8 barber_pole;
	u8 valid_INT;
	u8 interrupt[4];
};

struct resource_lists {
	struct pci_resource *mem_head;
	struct pci_resource *p_mem_head;
	struct pci_resource *io_head;
	struct pci_resource *bus_head;
	struct irq_mapping *irqs;
};

#define INT_BUTTON_IGNORE		0
#define INT_PRESENCE_ON			1
#define INT_PRESENCE_OFF		2
#define INT_SWITCH_CLOSE		3
#define INT_SWITCH_OPEN			4
#define INT_POWER_FAULT			5
#define INT_POWER_FAULT_CLEAR		6
#define INT_BUTTON_PRESS		7
#define INT_BUTTON_RELEASE		8
#define INT_BUTTON_CANCEL		9

#define STATIC_STATE			0
#define BLINKINGON_STATE		1
#define BLINKINGOFF_STATE		2
#define POWERON_STATE			3
#define POWEROFF_STATE			4

#define PCI_TO_PCI_BRIDGE_CLASS		0x00060400

/* Error messages */
#define INTERLOCK_OPEN			0x00000002
#define ADD_NOT_SUPPORTED		0x00000003
#define CARD_FUNCTIONING		0x00000005
#define ADAPTER_NOT_SAME		0x00000006
#define NO_ADAPTER_PRESENT		0x00000009
#define NOT_ENOUGH_RESOURCES		0x0000000B
#define DEVICE_TYPE_NOT_SUPPORTED	0x0000000C
#define WRONG_BUS_FREQUENCY		0x0000000D
#define POWER_FAILURE			0x0000000E

#define REMOVE_NOT_SUPPORTED		0x00000003

#define DISABLE_CARD			1

/* Field definitions in Slot Capabilities Register */
#define ATTN_BUTTN_PRSN	0x00000001
#define	PWR_CTRL_PRSN	0x00000002
#define MRL_SENS_PRSN	0x00000004
#define ATTN_LED_PRSN	0x00000008
#define PWR_LED_PRSN	0x00000010
#define HP_SUPR_RM_SUP	0x00000020

#define ATTN_BUTTN(cap)		(cap & ATTN_BUTTN_PRSN)
#define POWER_CTRL(cap)		(cap & PWR_CTRL_PRSN)
#define MRL_SENS(cap)		(cap & MRL_SENS_PRSN)
#define ATTN_LED(cap)		(cap & ATTN_LED_PRSN)
#define PWR_LED(cap)		(cap & PWR_LED_PRSN) 
#define HP_SUPR_RM(cap)		(cap & HP_SUPR_RM_SUP)

/*
 * error Messages
 */
#define msg_initialization_err	"Initialization failure, error=%d\n"
#define msg_HPC_rev_error	"Unsupported revision of the PCI hot plug controller found.\n"
#define msg_HPC_non_pcie	"The PCI hot plug controller is not supported by this driver.\n"
#define msg_HPC_not_supported	"This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n"
#define msg_unable_to_save	"Unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
#define msg_button_on		"PCI slot #%d - powering on due to button press.\n"
#define msg_button_off		"PCI slot #%d - powering off due to button press.\n"
#define msg_button_cancel	"PCI slot #%d - action canceled due to button press.\n"
#define msg_button_ignore	"PCI slot #%d - button press ignored.  (action in progress...)\n"

/* controller functions */
extern int	pciehprm_find_available_resources	(struct controller *ctrl);
extern int	pciehp_event_start_thread	(void);
extern void	pciehp_event_stop_thread	(void);
extern struct 	pci_func *pciehp_slot_create	(unsigned char busnumber);
extern struct 	pci_func *pciehp_slot_find	(unsigned char bus, unsigned char device, unsigned char index);
extern int	pciehp_enable_slot		(struct slot *slot);
extern int	pciehp_disable_slot		(struct slot *slot);

extern u8	pciehp_handle_attention_button	(u8 hp_slot, void *inst_id);
extern u8	pciehp_handle_switch_change	(u8 hp_slot, void *inst_id);
extern u8	pciehp_handle_presence_change	(u8 hp_slot, void *inst_id);
extern u8	pciehp_handle_power_fault	(u8 hp_slot, void *inst_id);
/* extern void	long_delay (int delay); */

/* resource functions */
extern int	pciehp_resource_sort_and_combine	(struct pci_resource **head);

/* pci functions */
extern int	pciehp_set_irq			(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
/*extern int	pciehp_get_bus_dev		(struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/
extern int	pciehp_save_config	 	(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
extern int	pciehp_save_used_resources	(struct controller *ctrl, struct pci_func * func, int flag);
extern int	pciehp_save_slot_config		(struct controller *ctrl, struct pci_func * new_slot);
extern void	pciehp_destroy_board_resources	(struct pci_func * func);
extern int	pciehp_return_board_resources	(struct pci_func * func, struct resource_lists * resources);
extern void	pciehp_destroy_resource_list	(struct resource_lists * resources);
extern int	pciehp_configure_device		(struct controller* ctrl, struct pci_func* func);
extern int	pciehp_unconfigure_device	(struct pci_func* func);


/* Global variables */
extern struct controller *pciehp_ctrl_list;
extern struct pci_func *pciehp_slot_list[256];

/* Inline functions */

static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device)
{
	struct slot *p_slot, *tmp_slot = NULL;

	p_slot = ctrl->slot;

	dbg("p_slot = %p\n", p_slot);

	while (p_slot && (p_slot->device != device)) {
		tmp_slot = p_slot;
		p_slot = p_slot->next;
		dbg("In while loop, p_slot = %p\n", p_slot);
	}
	if (p_slot == NULL) {
		err("ERROR: pciehp_find_slot device=0x%x\n", device);
		p_slot = tmp_slot;
	}

	return p_slot;
}

static inline int wait_for_ctrl_irq(struct controller *ctrl)
{
	int retval = 0;

	DECLARE_WAITQUEUE(wait, current);

	dbg("%s : start\n", __FUNCTION__);
	add_wait_queue(&ctrl->queue, &wait);
	if (!pciehp_poll_mode)
		/* Sleep for up to 1 second */
		msleep_interruptible(1000);
	else
		msleep_interruptible(2500);
	
	remove_wait_queue(&ctrl->queue, &wait);
	if (signal_pending(current))
		retval =  -EINTR;

	dbg("%s : end\n", __FUNCTION__);
	return retval;
}

/* Puts node back in the resource list pointed to by head */
static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
{
	if (!node || !head)
		return;
	node->next = *head;
	*head = node;
}

#define SLOT_NAME_SIZE 10

static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
{
	snprintf(buffer, buffer_size, "%d", slot->number);
}

enum php_ctlr_type {
	PCI,
	ISA,
	ACPI
};

typedef u8(*php_intr_callback_t) (unsigned int change_id, void *instance_id);

int pcie_init(struct controller *ctrl, struct pcie_device *dev,
		php_intr_callback_t attention_button_callback,
		php_intr_callback_t switch_change_callback,
		php_intr_callback_t presence_change_callback,
		php_intr_callback_t power_fault_callback);


/* This has no meaning for PCI Express, as there is only 1 slot per port */
int pcie_get_ctlr_slot_config(struct controller *ctrl,
		int *num_ctlr_slots,
		int *first_device_num,
		int *physical_slot_num,
		u8 *ctrlcap);

struct hpc_ops {
	int	(*power_on_slot)	(struct slot *slot);
	int	(*power_off_slot)	(struct slot *slot);
	int	(*get_power_status)	(struct slot *slot, u8 *status);
	int	(*get_attention_status)	(struct slot *slot, u8 *status);
	int	(*set_attention_status)	(struct slot *slot, u8 status);
	int	(*get_latch_status)	(struct slot *slot, u8 *status);
	int	(*get_adapter_status)	(struct slot *slot, u8 *status);

	int	(*get_max_bus_speed)	(struct slot *slot, enum pci_bus_speed *speed);
	int	(*get_cur_bus_speed)	(struct slot *slot, enum pci_bus_speed *speed);

	int	(*get_max_lnk_width)	(struct slot *slot, enum pcie_link_width *value);
	int	(*get_cur_lnk_width)	(struct slot *slot, enum pcie_link_width *value);
	
	int	(*query_power_fault)	(struct slot *slot);
	void	(*green_led_on)		(struct slot *slot);
	void	(*green_led_off)	(struct slot *slot);
	void	(*green_led_blink)	(struct slot *slot);
	void	(*release_ctlr)		(struct controller *ctrl);
	int	(*check_lnk_status)	(struct controller *ctrl);
};

#endif				/* _PCIEHP_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* PCI Express Hot Plug Controller Driver
	3	*
	4	* Copyright (C) 1995,2001 Compaq Computer Corporation
	5	* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
	6	* Copyright (C) 2001 IBM Corp.
	7	* Copyright (C) 2003-2004 Intel Corporation
	8	*
	9	* All rights reserved.
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or (at
	14	* your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful, but
	17	* WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
	19	* NON INFRINGEMENT. See the GNU General Public License for more
	20	* details.
	21	*
	22	* You should have received a copy of the GNU General Public License
	23	* along with this program; if not, write to the Free Software
	24	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	25	*
8cf4c195	26	* Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
1da177e4 LT	27	*
	28	*/
	29	#ifndef _PCIEHP_H
	30	#define _PCIEHP_H
	31
	32	#include <linux/types.h>
	33	#include <linux/pci.h>
	34	#include <linux/delay.h>
	35	#include <asm/semaphore.h>
	36	#include <asm/io.h>
	37	#include <linux/pcieport_if.h>
	38	#include "pci_hotplug.h"
	39
	40	#define MY_NAME "pciehp"
	41
	42	extern int pciehp_poll_mode;
	43	extern int pciehp_poll_time;
	44	extern int pciehp_debug;
	45
	46	/#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)/
	47	#define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
	48	#define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
	49	#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
	50	#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
	51
	52	struct pci_func {
	53	struct pci_func *next;
	54	u8 bus;
	55	u8 device;
	56	u8 function;
	57	u8 is_a_board;
	58	u16 status;
	59	u8 configured;
	60	u8 switch_save;
	61	u8 presence_save;
	62	u32 base_length[0x06];
	63	u8 base_type[0x06];
	64	u16 reserved2;
	65	u32 config_space[0x20];
	66	struct pci_resource *mem_head;
	67	struct pci_resource *p_mem_head;
	68	struct pci_resource *io_head;
	69	struct pci_resource *bus_head;
	70	struct pci_dev* pci_dev;
	71	};
	72
	73	struct slot {
	74	struct slot *next;
	75	u8 bus;
	76	u8 device;
	77	u32 number;
	78	u8 is_a_board;
	79	u8 configured;
	80	u8 state;
	81	u8 switch_save;
	82	u8 presence_save;
	83	u32 capabilities;
	84	u16 reserved2;
	85	struct timer_list task_event;
	86	u8 hp_slot;
	87	struct controller *ctrl;
	88	struct hpc_ops *hpc_ops;
	89	struct hotplug_slot *hotplug_slot;
	90	struct list_head slot_list;
91	};
92
93	struct pci_resource {
94	struct pci_resource * next;
95	u32 base;
96	u32 length;
97	};
98
99	struct event_info {
100	u32 event_type;
101	u8 hp_slot;
102	};
103
104	struct controller {
105	struct controller *next;
106	struct semaphore crit_sect; /* critical section semaphore */
107	void hpc_ctlr_handle; / HPC controller handle */
108	int num_slots; /* Number of slots on ctlr */
109	int slot_num_inc; /* 1 or -1 */
110	struct pci_resource *mem_head;
111	struct pci_resource *p_mem_head;
112	struct pci_resource *io_head;
113	struct pci_resource *bus_head;
114	struct pci_dev *pci_dev;
115	struct pci_bus *pci_bus;
116	struct event_info event_queue[10];
117	struct slot *slot;
118	struct hpc_ops *hpc_ops;
119	wait_queue_head_t queue; /* sleep & wake process */
120	u8 next_event;
121	u8 seg;
122	u8 bus;
123	u8 device;
124	u8 function;
125	u8 rev;
126	u8 slot_device_offset;
127	u8 add_support;
128	enum pci_bus_speed speed;
129	u32 first_slot; /* First physical slot number / / PCIE only has 1 slot */
130	u8 slot_bus; /* Bus where the slots handled by this controller sit */
131	u8 ctrlcap;
132	u16 vendor_id;
8b245e45	133	u8 cap_base;
1da177e4 LT	134	};
	135
	136	struct irq_mapping {
	137	u8 barber_pole;
	138	u8 valid_INT;
	139	u8 interrupt[4];
	140	};
	141
	142	struct resource_lists {
	143	struct pci_resource *mem_head;
	144	struct pci_resource *p_mem_head;
	145	struct pci_resource *io_head;
	146	struct pci_resource *bus_head;
	147	struct irq_mapping *irqs;
	148	};
	149
	150	#define INT_BUTTON_IGNORE 0
	151	#define INT_PRESENCE_ON 1
	152	#define INT_PRESENCE_OFF 2
	153	#define INT_SWITCH_CLOSE 3
	154	#define INT_SWITCH_OPEN 4
	155	#define INT_POWER_FAULT 5
	156	#define INT_POWER_FAULT_CLEAR 6
	157	#define INT_BUTTON_PRESS 7
	158	#define INT_BUTTON_RELEASE 8
	159	#define INT_BUTTON_CANCEL 9
	160
	161	#define STATIC_STATE 0
	162	#define BLINKINGON_STATE 1
	163	#define BLINKINGOFF_STATE 2
	164	#define POWERON_STATE 3
	165	#define POWEROFF_STATE 4
	166
	167	#define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
	168
	169	/* Error messages */
	170	#define INTERLOCK_OPEN 0x00000002
	171	#define ADD_NOT_SUPPORTED 0x00000003
	172	#define CARD_FUNCTIONING 0x00000005
	173	#define ADAPTER_NOT_SAME 0x00000006
	174	#define NO_ADAPTER_PRESENT 0x00000009
	175	#define NOT_ENOUGH_RESOURCES 0x0000000B
	176	#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
	177	#define WRONG_BUS_FREQUENCY 0x0000000D
	178	#define POWER_FAILURE 0x0000000E
	179
	180	#define REMOVE_NOT_SUPPORTED 0x00000003
	181
	182	#define DISABLE_CARD 1
	183
	184	/* Field definitions in Slot Capabilities Register */
	185	#define ATTN_BUTTN_PRSN 0x00000001
	186	#define PWR_CTRL_PRSN 0x00000002
	187	#define MRL_SENS_PRSN 0x00000004
	188	#define ATTN_LED_PRSN 0x00000008
	189	#define PWR_LED_PRSN 0x00000010
	190	#define HP_SUPR_RM_SUP 0x00000020
	191
	192	#define ATTN_BUTTN(cap) (cap & ATTN_BUTTN_PRSN)
	193	#define POWER_CTRL(cap) (cap & PWR_CTRL_PRSN)
	194	#define MRL_SENS(cap) (cap & MRL_SENS_PRSN)
	195	#define ATTN_LED(cap) (cap & ATTN_LED_PRSN)
	196	#define PWR_LED(cap) (cap & PWR_LED_PRSN)
	197	#define HP_SUPR_RM(cap) (cap & HP_SUPR_RM_SUP)
198
199	/*
200	* error Messages
201	*/
202	#define msg_initialization_err "Initialization failure, error=%d\n"
203	#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
204	#define msg_HPC_non_pcie "The PCI hot plug controller is not supported by this driver.\n"
205	#define msg_HPC_not_supported "This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n"
206	#define msg_unable_to_save "Unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
207	#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
208	#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
209	#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
210	#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
211
212	/* controller functions */
213	extern int pciehprm_find_available_resources (struct controller *ctrl);
214	extern int pciehp_event_start_thread (void);
215	extern void pciehp_event_stop_thread (void);
216	extern struct pci_func *pciehp_slot_create (unsigned char busnumber);
217	extern struct pci_func *pciehp_slot_find (unsigned char bus, unsigned char device, unsigned char index);
218	extern int pciehp_enable_slot (struct slot *slot);
219	extern int pciehp_disable_slot (struct slot *slot);
220
221	extern u8 pciehp_handle_attention_button (u8 hp_slot, void *inst_id);
222	extern u8 pciehp_handle_switch_change (u8 hp_slot, void *inst_id);
223	extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id);
224	extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
225	/* extern void long_delay (int delay); */
226
227	/* resource functions */
228	extern int pciehp_resource_sort_and_combine (struct pci_resource **head);
229
230	/* pci functions */
231	extern int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
232	/extern int pciehp_get_bus_dev (struct controller ctrl, u8 bus_num, u8 dev_num, struct slot slot);/
233	extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
234	extern int pciehp_save_used_resources (struct controller ctrl, struct pci_func func, int flag);
235	extern int pciehp_save_slot_config (struct controller ctrl, struct pci_func new_slot);
236	extern void pciehp_destroy_board_resources (struct pci_func * func);
237	extern int pciehp_return_board_resources (struct pci_func * func, struct resource_lists * resources);
238	extern void pciehp_destroy_resource_list (struct resource_lists * resources);
239	extern int pciehp_configure_device (struct controller* ctrl, struct pci_func* func);
240	extern int pciehp_unconfigure_device (struct pci_func* func);
241
242
243	/* Global variables */
244	extern struct controller *pciehp_ctrl_list;
245	extern struct pci_func *pciehp_slot_list[256];
246
247	/* Inline functions */
248
249	static inline struct slot pciehp_find_slot(struct controller ctrl, u8 device)
250	{
251	struct slot p_slot, tmp_slot = NULL;
252
253	p_slot = ctrl->slot;
254
255	dbg("p_slot = %p\n", p_slot);
256
257	while (p_slot && (p_slot->device != device)) {
258	tmp_slot = p_slot;
259	p_slot = p_slot->next;
260	dbg("In while loop, p_slot = %p\n", p_slot);
261	}
262	if (p_slot == NULL) {
263	err("ERROR: pciehp_find_slot device=0x%x\n", device);
264	p_slot = tmp_slot;
265	}
266
267	return p_slot;
268	}
269
270	static inline int wait_for_ctrl_irq(struct controller *ctrl)
271	{
272	int retval = 0;
273
274	DECLARE_WAITQUEUE(wait, current);
275
276	dbg("%s : start\n", __FUNCTION__);
277	add_wait_queue(&ctrl->queue, &wait);
278	if (!pciehp_poll_mode)
279	/* Sleep for up to 1 second */
280	msleep_interruptible(1000);
281	else
282	msleep_interruptible(2500);
283
284	remove_wait_queue(&ctrl->queue, &wait);
285	if (signal_pending(current))
286	retval = -EINTR;
287
288	dbg("%s : end\n", __FUNCTION__);
289	return retval;
290	}
291
292	/* Puts node back in the resource list pointed to by head */
293	static inline void return_resource(struct pci_resource *head, struct pci_resource node)
294	{
295	if (!node \|\| !head)
296	return;
297	node->next = *head;
298	*head = node;
299	}
300
301	#define SLOT_NAME_SIZE 10
302
303	static inline void make_slot_name(char buffer, int buffer_size, struct slot slot)
304	{
305	snprintf(buffer, buffer_size, "%d", slot->number);
306	}
307
308	enum php_ctlr_type {
309	PCI,
310	ISA,
311	ACPI
312	};
313
314	typedef u8(php_intr_callback_t) (unsigned int change_id, void instance_id);
315
316	int pcie_init(struct controller ctrl, struct pcie_device dev,
317	php_intr_callback_t attention_button_callback,
318	php_intr_callback_t switch_change_callback,
319	php_intr_callback_t presence_change_callback,
320	php_intr_callback_t power_fault_callback);
321
322
323	/* This has no meaning for PCI Express, as there is only 1 slot per port */
324	int pcie_get_ctlr_slot_config(struct controller *ctrl,
325	int *num_ctlr_slots,
326	int *first_device_num,
327	int *physical_slot_num,
328	u8 *ctrlcap);
329
330	struct hpc_ops {
331	int (power_on_slot) (struct slot slot);
332	int (power_off_slot) (struct slot slot);
333	int (get_power_status) (struct slot slot, u8 *status);
334	int (get_attention_status) (struct slot slot, u8 *status);
335	int (set_attention_status) (struct slot slot, u8 status);
336	int (get_latch_status) (struct slot slot, u8 *status);
337	int (get_adapter_status) (struct slot slot, u8 *status);
338
339	int (get_max_bus_speed) (struct slot slot, enum pci_bus_speed *speed);
340	int (get_cur_bus_speed) (struct slot slot, enum pci_bus_speed *speed);
341
342	int (get_max_lnk_width) (struct slot slot, enum pcie_link_width *value);
343	int (get_cur_lnk_width) (struct slot slot, enum pcie_link_width *value);
344
345	int (query_power_fault) (struct slot slot);
346	void (green_led_on) (struct slot slot);
347	void (green_led_off) (struct slot slot);
348	void (green_led_blink) (struct slot slot);
349	void (release_ctlr) (struct controller ctrl);
350	int (check_lnk_status) (struct controller ctrl);
351	};
352
353	#endif /* _PCIEHP_H */