[linux-block.git] / arch / s390 / kernel / swsusp_asm64.S

/*
 * S390 64-bit swsusp implementation
 *
 * Copyright IBM Corp. 2009
 *
 * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
 *	      Michael Holzheu <holzheu@linux.vnet.ibm.com>
 */

#include <asm/page.h>
#include <asm/ptrace.h>
#include <asm/thread_info.h>
#include <asm/asm-offsets.h>

/*
 * Save register context in absolute 0 lowcore and call swsusp_save() to
 * create in-memory kernel image. The context is saved in the designated
 * "store status" memory locations (see POP).
 * We return from this function twice. The first time during the suspend to
 * disk process. The second time via the swsusp_arch_resume() function
 * (see below) in the resume process.
 * This function runs with disabled interrupts.
 */
	.section .text
	.align	4
	.globl swsusp_arch_suspend
swsusp_arch_suspend:
	stmg	%r6,%r15,__SF_GPRS(%r15)
	lgr	%r1,%r15
	aghi	%r15,-STACK_FRAME_OVERHEAD
	stg	%r1,__SF_BACKCHAIN(%r15)

	/* Deactivate DAT */
	stnsm	__SF_EMPTY(%r15),0xfb

	/* Store prefix register on stack */
	stpx	__SF_EMPTY(%r15)

	/* Save prefix register contents for lowcore */
	llgf	%r4,__SF_EMPTY(%r15)

	/* Get pointer to save area */
	lghi	%r1,0x1000

	/* Save CPU address */
	stap	__LC_CPU_ADDRESS(%r1)

	/* Store registers */
	mvc	0x318(4,%r1),__SF_EMPTY(%r15)	/* move prefix to lowcore */
	stfpc	0x31c(%r1)			/* store fpu control */
	std	0,0x200(%r1)			/* store f0 */
	std	1,0x208(%r1)			/* store f1 */
	std	2,0x210(%r1)			/* store f2 */
	std	3,0x218(%r1)			/* store f3 */
	std	4,0x220(%r1)			/* store f4 */
	std	5,0x228(%r1)			/* store f5 */
	std	6,0x230(%r1)			/* store f6 */
	std	7,0x238(%r1)			/* store f7 */
	std	8,0x240(%r1)			/* store f8 */
	std	9,0x248(%r1)			/* store f9 */
	std	10,0x250(%r1)			/* store f10 */
	std	11,0x258(%r1)			/* store f11 */
	std	12,0x260(%r1)			/* store f12 */
	std	13,0x268(%r1)			/* store f13 */
	std	14,0x270(%r1)			/* store f14 */
	std	15,0x278(%r1)			/* store f15 */
	stam	%a0,%a15,0x340(%r1)		/* store access registers */
	stctg	%c0,%c15,0x380(%r1)		/* store control registers */
	stmg	%r0,%r15,0x280(%r1)		/* store general registers */

	stpt	0x328(%r1)			/* store timer */
	stckc	0x330(%r1)			/* store clock comparator */

	/* Activate DAT */
	stosm	__SF_EMPTY(%r15),0x04

	/* Set prefix page to zero */
	xc	__SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	spx	__SF_EMPTY(%r15)

	lghi	%r2,0
	lghi	%r3,2*PAGE_SIZE
	lghi	%r5,2*PAGE_SIZE
1:	mvcle	%r2,%r4,0
	jo	1b

	/* Save image */
	brasl	%r14,swsusp_save

	/* Restore prefix register and return */
	lghi	%r1,0x1000
	spx	0x318(%r1)
	lmg	%r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	lghi	%r2,0
	br	%r14

/*
 * Restore saved memory image to correct place and restore register context.
 * Then we return to the function that called swsusp_arch_suspend().
 * swsusp_arch_resume() runs with disabled interrupts.
 */
	.globl swsusp_arch_resume
swsusp_arch_resume:
	stmg	%r6,%r15,__SF_GPRS(%r15)
	lgr	%r1,%r15
	aghi	%r15,-STACK_FRAME_OVERHEAD
	stg	%r1,__SF_BACKCHAIN(%r15)

	/* Make all free pages stable */
	lghi	%r2,1
	brasl	%r14,arch_set_page_states

	/* Deactivate DAT */
	stnsm	__SF_EMPTY(%r15),0xfb

	/* Set prefix page to zero */
	xc	__SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	spx	__SF_EMPTY(%r15)

	/* Restore saved image */
	larl	%r1,restore_pblist
	lg	%r1,0(%r1)
	ltgr	%r1,%r1
	jz	2f
0:
	lg	%r2,8(%r1)
	lg	%r4,0(%r1)
	lghi	%r3,PAGE_SIZE
	lghi	%r5,PAGE_SIZE
1:
	mvcle	%r2,%r4,0
	jo	1b
	lg	%r1,16(%r1)
	ltgr	%r1,%r1
	jnz	0b
2:
	ptlb				/* flush tlb */

	/* Reset System */
	larl	%r1,restart_entry
	larl	%r2,.Lrestart_diag308_psw
	og	%r1,0(%r2)
	stg	%r1,0(%r0)
	larl	%r1,.Lnew_pgm_check_psw
	epsw	%r2,%r3
	stm	%r2,%r3,0(%r1)
	mvc	__LC_PGM_NEW_PSW(16,%r0),0(%r1)
	lghi	%r0,0
	diag	%r0,%r0,0x308
restart_entry:
	lhi	%r1,1
	sigp	%r1,%r0,0x12
	sam64
	larl	%r1,.Lnew_pgm_check_psw
	lpswe	0(%r1)
pgm_check_entry:

	/* Switch to original suspend CPU */
	larl	%r1,.Lresume_cpu		/* Resume CPU address: r2 */
	stap	0(%r1)
	llgh	%r2,0(%r1)
	lghi	%r3,0x1000
	llgh	%r1,__LC_CPU_ADDRESS(%r3)	/* Suspend CPU address: r1 */
	cgr	%r1,%r2
	je	restore_registers		/* r1 = r2 -> nothing to do */
	larl	%r4,.Lrestart_suspend_psw	/* Set new restart PSW */
	mvc	__LC_RESTART_PSW(16,%r0),0(%r4)
3:
	sigp	%r9,%r1,__SIGP_INITIAL_CPU_RESET
	brc	8,4f	/* accepted */
	brc	2,3b	/* busy, try again */

	/* Suspend CPU not available -> panic */
	larl	%r15,init_thread_union
	ahi	%r15,1<<(PAGE_SHIFT+THREAD_ORDER)
	larl	%r2,.Lpanic_string
	larl	%r3,_sclp_print_early
	lghi	%r1,0
	sam31
	sigp	%r1,%r0,0x12
	basr	%r14,%r3
	larl	%r3,.Ldisabled_wait_31
	lpsw	0(%r3)
4:
	/* Switch to suspend CPU */
	sigp	%r9,%r1,__SIGP_RESTART	/* start suspend CPU */
	brc	2,4b			/* busy, try again */
5:
	sigp	%r9,%r2,__SIGP_STOP	/* stop resume (current) CPU */
6:	j	6b

restart_suspend:
	larl	%r1,.Lresume_cpu
	llgh	%r2,0(%r1)
7:
	sigp	%r9,%r2,__SIGP_SENSE	/* Wait for resume CPU */
	brc	2,7b			/* busy, try again */
	tmll	%r9,0x40		/* Test if resume CPU is stopped */
	jz	7b

restore_registers:
	/* Restore registers */
	lghi	%r13,0x1000		/* %r1 = pointer to save arae */

	spt	0x328(%r13)		/* reprogram timer */
	//sckc	0x330(%r13)		/* set clock comparator */

	lctlg	%c0,%c15,0x380(%r13)	/* load control registers */
	lam	%a0,%a15,0x340(%r13)	/* load access registers */

	lfpc	0x31c(%r13)		/* load fpu control */
	ld	0,0x200(%r13)		/* load f0 */
	ld	1,0x208(%r13)		/* load f1 */
	ld	2,0x210(%r13)		/* load f2 */
	ld	3,0x218(%r13)		/* load f3 */
	ld	4,0x220(%r13)		/* load f4 */
	ld	5,0x228(%r13)		/* load f5 */
	ld	6,0x230(%r13)		/* load f6 */
	ld	7,0x238(%r13)		/* load f7 */
	ld	8,0x240(%r13)		/* load f8 */
	ld	9,0x248(%r13)		/* load f9 */
	ld	10,0x250(%r13)		/* load f10 */
	ld	11,0x258(%r13)		/* load f11 */
	ld	12,0x260(%r13)		/* load f12 */
	ld	13,0x268(%r13)		/* load f13 */
	ld	14,0x270(%r13)		/* load f14 */
	ld	15,0x278(%r13)		/* load f15 */

	/* Load old stack */
	lg	%r15,0x2f8(%r13)

	/* Pointer to save area */
	lghi	%r13,0x1000

	/* Restore prefix register */
	spx	0x318(%r13)

	/* Activate DAT */
	stosm	__SF_EMPTY(%r15),0x04

	/* Make all free pages unstable */
	lghi	%r2,0
	brasl	%r14,arch_set_page_states

	/* Return 0 */
	lmg	%r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	lghi	%r2,0
	br	%r14

	.section .data.nosave,"aw",@progbits
	.align	8
.Ldisabled_wait_31:
	.long  0x000a0000,0x00000000
.Lpanic_string:
	.asciz	"Resume not possible because suspend CPU is no longer available"
	.align	8
.Lrestart_diag308_psw:
	.long	0x00080000,0x80000000
.Lrestart_suspend_psw:
	.quad	0x0000000180000000,restart_suspend
.Lnew_pgm_check_psw:
	.quad	0,pgm_check_entry
.Lresume_cpu:
	.byte	0,0
Commit	Line	Data
155af2f9 HJP	1	/*
	2	* S390 64-bit swsusp implementation
	3	*
	4	* Copyright IBM Corp. 2009
	5	*
	6	* Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
	7	* Michael Holzheu <holzheu@linux.vnet.ibm.com>
	8	*/
	9
	10	#include <asm/page.h>
	11	#include <asm/ptrace.h>
1aaf179d	12	#include <asm/thread_info.h>
155af2f9 HJP	13	#include <asm/asm-offsets.h>
	14
	15	/*
	16	* Save register context in absolute 0 lowcore and call swsusp_save() to
	17	* create in-memory kernel image. The context is saved in the designated
	18	* "store status" memory locations (see POP).
	19	* We return from this function twice. The first time during the suspend to
	20	* disk process. The second time via the swsusp_arch_resume() function
	21	* (see below) in the resume process.
	22	* This function runs with disabled interrupts.
	23	*/
	24	.section .text
c48ff644	25	.align 4
155af2f9 HJP	26	.globl swsusp_arch_suspend
	27	swsusp_arch_suspend:
	28	stmg %r6,%r15,__SF_GPRS(%r15)
	29	lgr %r1,%r15
	30	aghi %r15,-STACK_FRAME_OVERHEAD
	31	stg %r1,__SF_BACKCHAIN(%r15)
	32
	33	/* Deactivate DAT */
	34	stnsm __SF_EMPTY(%r15),0xfb
	35
155af2f9 HJP	36	/* Store prefix register on stack */
	37	stpx __SF_EMPTY(%r15)
	38
5f954c34 HC	39	/* Save prefix register contents for lowcore */
5f954c34 HC	40	llgf %r4,__SF_EMPTY(%r15)
155af2f9 HJP	41
155af2f9 HJP	42	/* Get pointer to save area */
5f954c34	43	lghi %r1,0x1000
155af2f9	44
1aaf179d MH	45	/* Save CPU address */
	46	stap __LC_CPU_ADDRESS(%r1)
	47
155af2f9 HJP	48	/* Store registers */
	49	mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
	50	stfpc 0x31c(%r1) /* store fpu control */
	51	std 0,0x200(%r1) /* store f0 */
	52	std 1,0x208(%r1) /* store f1 */
	53	std 2,0x210(%r1) /* store f2 */
	54	std 3,0x218(%r1) /* store f3 */
	55	std 4,0x220(%r1) /* store f4 */
	56	std 5,0x228(%r1) /* store f5 */
	57	std 6,0x230(%r1) /* store f6 */
	58	std 7,0x238(%r1) /* store f7 */
	59	std 8,0x240(%r1) /* store f8 */
	60	std 9,0x248(%r1) /* store f9 */
	61	std 10,0x250(%r1) /* store f10 */
	62	std 11,0x258(%r1) /* store f11 */
	63	std 12,0x260(%r1) /* store f12 */
	64	std 13,0x268(%r1) /* store f13 */
	65	std 14,0x270(%r1) /* store f14 */
	66	std 15,0x278(%r1) /* store f15 */
	67	stam %a0,%a15,0x340(%r1) /* store access registers */
	68	stctg %c0,%c15,0x380(%r1) /* store control registers */
	69	stmg %r0,%r15,0x280(%r1) /* store general registers */
	70
	71	stpt 0x328(%r1) /* store timer */
	72	stckc 0x330(%r1) /* store clock comparator */
	73
	74	/* Activate DAT */
	75	stosm __SF_EMPTY(%r15),0x04
	76
	77	/* Set prefix page to zero */
	78	xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	79	spx __SF_EMPTY(%r15)
	80
5f954c34 HC	81	lghi %r2,0
	82	lghi %r3,2*PAGE_SIZE
	83	lghi %r5,2*PAGE_SIZE
	84	1: mvcle %r2,%r4,0
	85	jo 1b
155af2f9 HJP	86
	87	/* Save image */
	88	brasl %r14,swsusp_save
	89
155af2f9 HJP	90	/* Restore prefix register and return */
	91	lghi %r1,0x1000
	92	spx 0x318(%r1)
	93	lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	94	lghi %r2,0
	95	br %r14
	96
	97	/*
	98	* Restore saved memory image to correct place and restore register context.
	99	* Then we return to the function that called swsusp_arch_suspend().
	100	* swsusp_arch_resume() runs with disabled interrupts.
	101	*/
	102	.globl swsusp_arch_resume
	103	swsusp_arch_resume:
	104	stmg %r6,%r15,__SF_GPRS(%r15)
	105	lgr %r1,%r15
	106	aghi %r15,-STACK_FRAME_OVERHEAD
	107	stg %r1,__SF_BACKCHAIN(%r15)
	108
846955c8 HC	109	/* Make all free pages stable */
	110	lghi %r2,1
	111	brasl %r14,arch_set_page_states
1aaf179d	112
155af2f9 HJP	113	/* Deactivate DAT */
	114	stnsm __SF_EMPTY(%r15),0xfb
	115
155af2f9 HJP	116	/* Set prefix page to zero */
	117	xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	118	spx __SF_EMPTY(%r15)
	119
	120	/* Restore saved image */
	121	larl %r1,restore_pblist
	122	lg %r1,0(%r1)
	123	ltgr %r1,%r1
	124	jz 2f
	125	0:
	126	lg %r2,8(%r1)
	127	lg %r4,0(%r1)
	128	lghi %r3,PAGE_SIZE
	129	lghi %r5,PAGE_SIZE
	130	1:
	131	mvcle %r2,%r4,0
	132	jo 1b
	133	lg %r1,16(%r1)
	134	ltgr %r1,%r1
	135	jnz 0b
	136	2:
	137	ptlb /* flush tlb */
	138
2583d1ef HC	139	/* Reset System */
2583d1ef HC	140	larl %r1,restart_entry
1aaf179d	141	larl %r2,.Lrestart_diag308_psw
2583d1ef HC	142	og %r1,0(%r2)
2583d1ef HC	143	stg %r1,0(%r0)
1aaf179d	144	larl %r1,.Lnew_pgm_check_psw
2583d1ef HC	145	epsw %r2,%r3
	146	stm %r2,%r3,0(%r1)
	147	mvc __LC_PGM_NEW_PSW(16,%r0),0(%r1)
	148	lghi %r0,0
	149	diag %r0,%r0,0x308
	150	restart_entry:
	151	lhi %r1,1
	152	sigp %r1,%r0,0x12
	153	sam64
1aaf179d	154	larl %r1,.Lnew_pgm_check_psw
2583d1ef HC	155	lpswe 0(%r1)
2583d1ef HC	156	pgm_check_entry:
2583d1ef	157
1aaf179d MH	158	/* Switch to original suspend CPU */
	159	larl %r1,.Lresume_cpu /* Resume CPU address: r2 */
	160	stap 0(%r1)
	161	llgh %r2,0(%r1)
	162	lghi %r3,0x1000
	163	llgh %r1,__LC_CPU_ADDRESS(%r3) /* Suspend CPU address: r1 */
	164	cgr %r1,%r2
	165	je restore_registers /* r1 = r2 -> nothing to do */
	166	larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */
	167	mvc __LC_RESTART_PSW(16,%r0),0(%r4)
	168	3:
	169	sigp %r9,%r1,__SIGP_INITIAL_CPU_RESET
	170	brc 8,4f /* accepted */
	171	brc 2,3b /* busy, try again */
	172
	173	/* Suspend CPU not available -> panic */
	174	larl %r15,init_thread_union
	175	ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER)
	176	larl %r2,.Lpanic_string
	177	larl %r3,_sclp_print_early
	178	lghi %r1,0
	179	sam31
	180	sigp %r1,%r0,0x12
	181	basr %r14,%r3
	182	larl %r3,.Ldisabled_wait_31
	183	lpsw 0(%r3)
	184	4:
	185	/* Switch to suspend CPU */
	186	sigp %r9,%r1,__SIGP_RESTART /* start suspend CPU */
	187	brc 2,4b /* busy, try again */
	188	5:
	189	sigp %r9,%r2,__SIGP_STOP /* stop resume (current) CPU */
	190	6: j 6b
	191
	192	restart_suspend:
	193	larl %r1,.Lresume_cpu
	194	llgh %r2,0(%r1)
	195	7:
	196	sigp %r9,%r2,__SIGP_SENSE /* Wait for resume CPU */
	197	brc 2,7b /* busy, try again */
	198	tmll %r9,0x40 /* Test if resume CPU is stopped */
	199	jz 7b
	200
	201	restore_registers:
155af2f9 HJP	202	/* Restore registers */
	203	lghi %r13,0x1000 /* %r1 = pointer to save arae */
	204
	205	spt 0x328(%r13) /* reprogram timer */
	206	//sckc 0x330(%r13) /* set clock comparator */
	207
	208	lctlg %c0,%c15,0x380(%r13) /* load control registers */
	209	lam %a0,%a15,0x340(%r13) /* load access registers */
	210
	211	lfpc 0x31c(%r13) /* load fpu control */
	212	ld 0,0x200(%r13) /* load f0 */
	213	ld 1,0x208(%r13) /* load f1 */
	214	ld 2,0x210(%r13) /* load f2 */
	215	ld 3,0x218(%r13) /* load f3 */
	216	ld 4,0x220(%r13) /* load f4 */
	217	ld 5,0x228(%r13) /* load f5 */
	218	ld 6,0x230(%r13) /* load f6 */
	219	ld 7,0x238(%r13) /* load f7 */
	220	ld 8,0x240(%r13) /* load f8 */
	221	ld 9,0x248(%r13) /* load f9 */
	222	ld 10,0x250(%r13) /* load f10 */
	223	ld 11,0x258(%r13) /* load f11 */
	224	ld 12,0x260(%r13) /* load f12 */
	225	ld 13,0x268(%r13) /* load f13 */
	226	ld 14,0x270(%r13) /* load f14 */
	227	ld 15,0x278(%r13) /* load f15 */
	228
	229	/* Load old stack */
	230	lg %r15,0x2f8(%r13)
	231
c63b196a	232	/* Pointer to save area */
155af2f9 HJP	233	lghi %r13,0x1000
155af2f9 HJP	234
155af2f9 HJP	235	/* Restore prefix register */
	236	spx 0x318(%r13)
	237
155af2f9 HJP	238	/* Activate DAT */
	239	stosm __SF_EMPTY(%r15),0x04
	240
846955c8 HC	241	/* Make all free pages unstable */
	242	lghi %r2,0
	243	brasl %r14,arch_set_page_states
	244
155af2f9 HJP	245	/* Return 0 */
	246	lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	247	lghi %r2,0
	248	br %r14
2583d1ef HC	249
	250	.section .data.nosave,"aw",@progbits
	251	.align 8
1aaf179d MH	252	.Ldisabled_wait_31:
	253	.long 0x000a0000,0x00000000
	254	.Lpanic_string:
	255	.asciz "Resume not possible because suspend CPU is no longer available"
	256	.align 8
	257	.Lrestart_diag308_psw:
2583d1ef	258	.long 0x00080000,0x80000000
1aaf179d MH	259	.Lrestart_suspend_psw:
	260	.quad 0x0000000180000000,restart_suspend
	261	.Lnew_pgm_check_psw:
2583d1ef	262	.quad 0,pgm_check_entry
1aaf179d MH	263	.Lresume_cpu:
1aaf179d MH	264	.byte 0,0