[S390] hibernate: Do real CPU swap at resume time
[linux-block.git] / arch / s390 / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/smp.c
3 *
155af2f9 4 * Copyright IBM Corp. 1999, 2009
1da177e4 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
39ce010d
HC
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com)
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * We work with logical cpu numbering everywhere we can. The only
14 * functions using the real cpu address (got from STAP) are the sigp
15 * functions. For all other functions we use the identity mapping.
16 * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
17 * used e.g. to find the idle task belonging to a logical cpu. Every array
18 * in the kernel is sorted by the logical cpu number and not by the physical
19 * one which is causing all the confusion with __cpu_logical_map and
20 * cpu_number_map in other architectures.
21 */
22
395d31d4
MS
23#define KMSG_COMPONENT "cpu"
24#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
25
1da177e4
LT
26#include <linux/module.h>
27#include <linux/init.h>
1da177e4 28#include <linux/mm.h>
4e950f6f 29#include <linux/err.h>
1da177e4
LT
30#include <linux/spinlock.h>
31#include <linux/kernel_stat.h>
1da177e4
LT
32#include <linux/delay.h>
33#include <linux/cache.h>
34#include <linux/interrupt.h>
3324e60a 35#include <linux/irqflags.h>
1da177e4 36#include <linux/cpu.h>
2b67fc46 37#include <linux/timex.h>
411ed322 38#include <linux/bootmem.h>
46b05d26 39#include <asm/ipl.h>
2b67fc46 40#include <asm/setup.h>
1da177e4
LT
41#include <asm/sigp.h>
42#include <asm/pgalloc.h>
43#include <asm/irq.h>
44#include <asm/s390_ext.h>
45#include <asm/cpcmd.h>
46#include <asm/tlbflush.h>
2b67fc46 47#include <asm/timer.h>
411ed322 48#include <asm/lowcore.h>
08d07968 49#include <asm/sclp.h>
76d4e00a 50#include <asm/cputime.h>
c742b31c 51#include <asm/vdso.h>
4bb5e07b 52#include <asm/cpu.h>
a806170e 53#include "entry.h"
1da177e4 54
1da177e4
LT
55static struct task_struct *current_set[NR_CPUS];
56
08d07968
HC
57static u8 smp_cpu_type;
58static int smp_use_sigp_detection;
59
60enum s390_cpu_state {
61 CPU_STATE_STANDBY,
62 CPU_STATE_CONFIGURED,
63};
64
dbd70fb4 65DEFINE_MUTEX(smp_cpu_state_mutex);
c10fde0d 66int smp_cpu_polarization[NR_CPUS];
08d07968 67static int smp_cpu_state[NR_CPUS];
c10fde0d 68static int cpu_management;
08d07968
HC
69
70static DEFINE_PER_CPU(struct cpu, cpu_devices);
08d07968 71
1da177e4 72static void smp_ext_bitcall(int, ec_bit_sig);
1da177e4 73
5c0b912e
HC
74static int cpu_stopped(int cpu)
75{
76 __u32 status;
77
78 switch (signal_processor_ps(&status, 0, cpu, sigp_sense)) {
79 case sigp_order_code_accepted:
80 case sigp_status_stored:
81 /* Check for stopped and check stop state */
82 if (status & 0x50)
83 return 1;
84 break;
85 default:
86 break;
87 }
88 return 0;
89}
90
677d7623 91void smp_send_stop(void)
1da177e4 92{
39ce010d 93 int cpu, rc;
1da177e4 94
677d7623
HC
95 /* Disable all interrupts/machine checks */
96 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
3324e60a 97 trace_hardirqs_off();
1da177e4 98
677d7623 99 /* stop all processors */
1da177e4
LT
100 for_each_online_cpu(cpu) {
101 if (cpu == smp_processor_id())
102 continue;
103 do {
677d7623 104 rc = signal_processor(cpu, sigp_stop);
39ce010d 105 } while (rc == sigp_busy);
1da177e4 106
5c0b912e 107 while (!cpu_stopped(cpu))
c6b5b847
HC
108 cpu_relax();
109 }
110}
111
1da177e4
LT
112/*
113 * This is the main routine where commands issued by other
114 * cpus are handled.
115 */
116
2b67fc46 117static void do_ext_call_interrupt(__u16 code)
1da177e4 118{
39ce010d 119 unsigned long bits;
1da177e4 120
39ce010d
HC
121 /*
122 * handle bit signal external calls
123 *
124 * For the ec_schedule signal we have to do nothing. All the work
125 * is done automatically when we return from the interrupt.
126 */
1da177e4
LT
127 bits = xchg(&S390_lowcore.ext_call_fast, 0);
128
39ce010d 129 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
130 generic_smp_call_function_interrupt();
131
132 if (test_bit(ec_call_function_single, &bits))
133 generic_smp_call_function_single_interrupt();
1da177e4
LT
134}
135
136/*
137 * Send an external call sigp to another cpu and return without waiting
138 * for its completion.
139 */
140static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
141{
39ce010d
HC
142 /*
143 * Set signaling bit in lowcore of target cpu and kick it
144 */
1da177e4 145 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
39ce010d 146 while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy)
1da177e4
LT
147 udelay(10);
148}
149
ca9fc75a
HC
150void arch_send_call_function_ipi(cpumask_t mask)
151{
152 int cpu;
153
154 for_each_cpu_mask(cpu, mask)
155 smp_ext_bitcall(cpu, ec_call_function);
156}
157
158void arch_send_call_function_single_ipi(int cpu)
159{
160 smp_ext_bitcall(cpu, ec_call_function_single);
161}
162
347a8dc3 163#ifndef CONFIG_64BIT
1da177e4
LT
164/*
165 * this function sends a 'purge tlb' signal to another CPU.
166 */
a806170e 167static void smp_ptlb_callback(void *info)
1da177e4 168{
ba8a9229 169 __tlb_flush_local();
1da177e4
LT
170}
171
172void smp_ptlb_all(void)
173{
15c8b6c1 174 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
175}
176EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 177#endif /* ! CONFIG_64BIT */
1da177e4
LT
178
179/*
180 * this function sends a 'reschedule' IPI to another CPU.
181 * it goes straight through and wastes no time serializing
182 * anything. Worst case is that we lose a reschedule ...
183 */
184void smp_send_reschedule(int cpu)
185{
39ce010d 186 smp_ext_bitcall(cpu, ec_schedule);
1da177e4
LT
187}
188
189/*
190 * parameter area for the set/clear control bit callbacks
191 */
94c12cc7 192struct ec_creg_mask_parms {
1da177e4
LT
193 unsigned long orvals[16];
194 unsigned long andvals[16];
94c12cc7 195};
1da177e4
LT
196
197/*
198 * callback for setting/clearing control bits
199 */
39ce010d
HC
200static void smp_ctl_bit_callback(void *info)
201{
94c12cc7 202 struct ec_creg_mask_parms *pp = info;
1da177e4
LT
203 unsigned long cregs[16];
204 int i;
39ce010d 205
94c12cc7
MS
206 __ctl_store(cregs, 0, 15);
207 for (i = 0; i <= 15; i++)
1da177e4 208 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
94c12cc7 209 __ctl_load(cregs, 0, 15);
1da177e4
LT
210}
211
212/*
213 * Set a bit in a control register of all cpus
214 */
94c12cc7
MS
215void smp_ctl_set_bit(int cr, int bit)
216{
217 struct ec_creg_mask_parms parms;
1da177e4 218
94c12cc7
MS
219 memset(&parms.orvals, 0, sizeof(parms.orvals));
220 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 221 parms.orvals[cr] = 1 << bit;
15c8b6c1 222 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 223}
39ce010d 224EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
225
226/*
227 * Clear a bit in a control register of all cpus
228 */
94c12cc7
MS
229void smp_ctl_clear_bit(int cr, int bit)
230{
231 struct ec_creg_mask_parms parms;
1da177e4 232
94c12cc7
MS
233 memset(&parms.orvals, 0, sizeof(parms.orvals));
234 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 235 parms.andvals[cr] = ~(1L << bit);
15c8b6c1 236 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 237}
39ce010d 238EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 239
08d07968
HC
240/*
241 * In early ipl state a temp. logically cpu number is needed, so the sigp
242 * functions can be used to sense other cpus. Since NR_CPUS is >= 2 on
243 * CONFIG_SMP and the ipl cpu is logical cpu 0, it must be 1.
244 */
245#define CPU_INIT_NO 1
246
59f2e69d 247#ifdef CONFIG_ZFCPDUMP
411ed322
MH
248
249/*
250 * zfcpdump_prefix_array holds prefix registers for the following scenario:
251 * 64 bit zfcpdump kernel and 31 bit kernel which is to be dumped. We have to
252 * save its prefix registers, since they get lost, when switching from 31 bit
253 * to 64 bit.
254 */
255unsigned int zfcpdump_prefix_array[NR_CPUS + 1] \
256 __attribute__((__section__(".data")));
257
285f6722 258static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
411ed322 259{
411ed322
MH
260 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
261 return;
285f6722 262 if (cpu >= NR_CPUS) {
395d31d4
MS
263 pr_warning("CPU %i exceeds the maximum %i and is excluded from "
264 "the dump\n", cpu, NR_CPUS - 1);
285f6722 265 return;
411ed322 266 }
48483b32 267 zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL);
08d07968
HC
268 __cpu_logical_map[CPU_INIT_NO] = (__u16) phy_cpu;
269 while (signal_processor(CPU_INIT_NO, sigp_stop_and_store_status) ==
270 sigp_busy)
285f6722
HC
271 cpu_relax();
272 memcpy(zfcpdump_save_areas[cpu],
273 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
274 SAVE_AREA_SIZE);
275#ifdef CONFIG_64BIT
276 /* copy original prefix register */
277 zfcpdump_save_areas[cpu]->s390x.pref_reg = zfcpdump_prefix_array[cpu];
278#endif
411ed322
MH
279}
280
281union save_area *zfcpdump_save_areas[NR_CPUS + 1];
282EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
283
284#else
285f6722
HC
285
286static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
287
59f2e69d 288#endif /* CONFIG_ZFCPDUMP */
411ed322 289
08d07968
HC
290static int cpu_known(int cpu_id)
291{
292 int cpu;
293
294 for_each_present_cpu(cpu) {
295 if (__cpu_logical_map[cpu] == cpu_id)
296 return 1;
297 }
298 return 0;
299}
300
301static int smp_rescan_cpus_sigp(cpumask_t avail)
302{
303 int cpu_id, logical_cpu;
304
93632d1b
RR
305 logical_cpu = cpumask_first(&avail);
306 if (logical_cpu >= nr_cpu_ids)
08d07968 307 return 0;
4bb5e07b 308 for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) {
08d07968
HC
309 if (cpu_known(cpu_id))
310 continue;
311 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 312 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
313 if (!cpu_stopped(logical_cpu))
314 continue;
315 cpu_set(logical_cpu, cpu_present_map);
316 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
317 logical_cpu = cpumask_next(logical_cpu, &avail);
318 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
319 break;
320 }
321 return 0;
322}
323
48483b32 324static int smp_rescan_cpus_sclp(cpumask_t avail)
08d07968
HC
325{
326 struct sclp_cpu_info *info;
327 int cpu_id, logical_cpu, cpu;
328 int rc;
329
93632d1b
RR
330 logical_cpu = cpumask_first(&avail);
331 if (logical_cpu >= nr_cpu_ids)
08d07968 332 return 0;
48483b32 333 info = kmalloc(sizeof(*info), GFP_KERNEL);
08d07968
HC
334 if (!info)
335 return -ENOMEM;
336 rc = sclp_get_cpu_info(info);
337 if (rc)
338 goto out;
339 for (cpu = 0; cpu < info->combined; cpu++) {
340 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
341 continue;
342 cpu_id = info->cpu[cpu].address;
343 if (cpu_known(cpu_id))
344 continue;
345 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 346 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
347 cpu_set(logical_cpu, cpu_present_map);
348 if (cpu >= info->configured)
349 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
350 else
351 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
352 logical_cpu = cpumask_next(logical_cpu, &avail);
353 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
354 break;
355 }
356out:
48483b32 357 kfree(info);
08d07968
HC
358 return rc;
359}
360
1e489518 361static int __smp_rescan_cpus(void)
08d07968
HC
362{
363 cpumask_t avail;
364
48483b32 365 cpus_xor(avail, cpu_possible_map, cpu_present_map);
08d07968
HC
366 if (smp_use_sigp_detection)
367 return smp_rescan_cpus_sigp(avail);
368 else
369 return smp_rescan_cpus_sclp(avail);
1da177e4
LT
370}
371
48483b32
HC
372static void __init smp_detect_cpus(void)
373{
374 unsigned int cpu, c_cpus, s_cpus;
375 struct sclp_cpu_info *info;
376 u16 boot_cpu_addr, cpu_addr;
377
378 c_cpus = 1;
379 s_cpus = 0;
7b468488 380 boot_cpu_addr = __cpu_logical_map[0];
48483b32
HC
381 info = kmalloc(sizeof(*info), GFP_KERNEL);
382 if (!info)
383 panic("smp_detect_cpus failed to allocate memory\n");
384 /* Use sigp detection algorithm if sclp doesn't work. */
385 if (sclp_get_cpu_info(info)) {
386 smp_use_sigp_detection = 1;
4bb5e07b 387 for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) {
48483b32
HC
388 if (cpu == boot_cpu_addr)
389 continue;
390 __cpu_logical_map[CPU_INIT_NO] = cpu;
391 if (!cpu_stopped(CPU_INIT_NO))
392 continue;
393 smp_get_save_area(c_cpus, cpu);
394 c_cpus++;
395 }
396 goto out;
397 }
398
399 if (info->has_cpu_type) {
400 for (cpu = 0; cpu < info->combined; cpu++) {
401 if (info->cpu[cpu].address == boot_cpu_addr) {
402 smp_cpu_type = info->cpu[cpu].type;
403 break;
404 }
405 }
406 }
407
408 for (cpu = 0; cpu < info->combined; cpu++) {
409 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
410 continue;
411 cpu_addr = info->cpu[cpu].address;
412 if (cpu_addr == boot_cpu_addr)
413 continue;
414 __cpu_logical_map[CPU_INIT_NO] = cpu_addr;
415 if (!cpu_stopped(CPU_INIT_NO)) {
416 s_cpus++;
417 continue;
418 }
419 smp_get_save_area(c_cpus, cpu_addr);
420 c_cpus++;
421 }
422out:
423 kfree(info);
395d31d4 424 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 425 get_online_cpus();
1e489518 426 __smp_rescan_cpus();
9d40d2e3 427 put_online_cpus();
48483b32
HC
428}
429
1da177e4 430/*
39ce010d 431 * Activate a secondary processor.
1da177e4 432 */
ea1f4eec 433int __cpuinit start_secondary(void *cpuvoid)
1da177e4 434{
39ce010d
HC
435 /* Setup the cpu */
436 cpu_init();
5bfb5d69 437 preempt_disable();
d54853ef 438 /* Enable TOD clock interrupts on the secondary cpu. */
39ce010d 439 init_cpu_timer();
d54853ef 440 /* Enable cpu timer interrupts on the secondary cpu. */
39ce010d 441 init_cpu_vtimer();
1da177e4 442 /* Enable pfault pseudo page faults on this cpu. */
29b08d2b
HC
443 pfault_init();
444
e545a614
MS
445 /* call cpu notifiers */
446 notify_cpu_starting(smp_processor_id());
1da177e4 447 /* Mark this cpu as online */
ca9fc75a 448 ipi_call_lock();
1da177e4 449 cpu_set(smp_processor_id(), cpu_online_map);
ca9fc75a 450 ipi_call_unlock();
1da177e4
LT
451 /* Switch on interrupts */
452 local_irq_enable();
39ce010d 453 /* Print info about this processor */
7b468488 454 print_cpu_info();
39ce010d
HC
455 /* cpu_idle will call schedule for us */
456 cpu_idle();
457 return 0;
1da177e4
LT
458}
459
460static void __init smp_create_idle(unsigned int cpu)
461{
462 struct task_struct *p;
463
464 /*
465 * don't care about the psw and regs settings since we'll never
466 * reschedule the forked task.
467 */
468 p = fork_idle(cpu);
469 if (IS_ERR(p))
470 panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
471 current_set[cpu] = p;
472}
473
1cb6bb4b
HC
474static int __cpuinit smp_alloc_lowcore(int cpu)
475{
476 unsigned long async_stack, panic_stack;
477 struct _lowcore *lowcore;
1cb6bb4b 478
3fd26a77 479 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1cb6bb4b
HC
480 if (!lowcore)
481 return -ENOMEM;
482 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
1cb6bb4b 483 panic_stack = __get_free_page(GFP_KERNEL);
591bb4f6
HC
484 if (!panic_stack || !async_stack)
485 goto out;
98c7b388
HC
486 memcpy(lowcore, &S390_lowcore, 512);
487 memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
1cb6bb4b
HC
488 lowcore->async_stack = async_stack + ASYNC_SIZE;
489 lowcore->panic_stack = panic_stack + PAGE_SIZE;
490
491#ifndef CONFIG_64BIT
492 if (MACHINE_HAS_IEEE) {
493 unsigned long save_area;
494
495 save_area = get_zeroed_page(GFP_KERNEL);
496 if (!save_area)
33b1d09e 497 goto out;
1cb6bb4b
HC
498 lowcore->extended_save_area_addr = (u32) save_area;
499 }
c742b31c
MS
500#else
501 if (vdso_alloc_per_cpu(cpu, lowcore))
502 goto out;
1cb6bb4b
HC
503#endif
504 lowcore_ptr[cpu] = lowcore;
505 return 0;
506
591bb4f6 507out:
33b1d09e 508 free_page(panic_stack);
1cb6bb4b 509 free_pages(async_stack, ASYNC_ORDER);
3fd26a77 510 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
511 return -ENOMEM;
512}
513
1cb6bb4b
HC
514static void smp_free_lowcore(int cpu)
515{
516 struct _lowcore *lowcore;
1cb6bb4b 517
1cb6bb4b
HC
518 lowcore = lowcore_ptr[cpu];
519#ifndef CONFIG_64BIT
520 if (MACHINE_HAS_IEEE)
521 free_page((unsigned long) lowcore->extended_save_area_addr);
c742b31c
MS
522#else
523 vdso_free_per_cpu(cpu, lowcore);
1cb6bb4b
HC
524#endif
525 free_page(lowcore->panic_stack - PAGE_SIZE);
526 free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
3fd26a77 527 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
528 lowcore_ptr[cpu] = NULL;
529}
1cb6bb4b 530
1da177e4 531/* Upping and downing of CPUs */
1cb6bb4b 532int __cpuinit __cpu_up(unsigned int cpu)
1da177e4
LT
533{
534 struct task_struct *idle;
39ce010d 535 struct _lowcore *cpu_lowcore;
1da177e4 536 struct stack_frame *sf;
39ce010d 537 sigp_ccode ccode;
d0d3cdf4 538 u32 lowcore;
1da177e4 539
08d07968
HC
540 if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
541 return -EIO;
1cb6bb4b
HC
542 if (smp_alloc_lowcore(cpu))
543 return -ENOMEM;
d0d3cdf4
HC
544 do {
545 ccode = signal_processor(cpu, sigp_initial_cpu_reset);
546 if (ccode == sigp_busy)
547 udelay(10);
548 if (ccode == sigp_not_operational)
549 goto err_out;
550 } while (ccode == sigp_busy);
551
552 lowcore = (u32)(unsigned long)lowcore_ptr[cpu];
553 while (signal_processor_p(lowcore, cpu, sigp_set_prefix) == sigp_busy)
554 udelay(10);
1da177e4
LT
555
556 idle = current_set[cpu];
39ce010d 557 cpu_lowcore = lowcore_ptr[cpu];
1da177e4 558 cpu_lowcore->kernel_stack = (unsigned long)
39ce010d 559 task_stack_page(idle) + THREAD_SIZE;
1cb6bb4b 560 cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
1da177e4
LT
561 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
562 - sizeof(struct pt_regs)
563 - sizeof(struct stack_frame));
564 memset(sf, 0, sizeof(struct stack_frame));
565 sf->gprs[9] = (unsigned long) sf;
566 cpu_lowcore->save_area[15] = (unsigned long) sf;
24d3e210 567 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
94c12cc7
MS
568 asm volatile(
569 " stam 0,15,0(%0)"
570 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
1da177e4 571 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
39ce010d 572 cpu_lowcore->current_task = (unsigned long) idle;
7b468488 573 cpu_lowcore->cpu_nr = cpu;
591bb4f6 574 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
25097bf1 575 cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
dfd9f7ab 576 cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func;
1da177e4 577 eieio();
699ff13f 578
39ce010d 579 while (signal_processor(cpu, sigp_restart) == sigp_busy)
699ff13f 580 udelay(10);
1da177e4
LT
581
582 while (!cpu_online(cpu))
583 cpu_relax();
584 return 0;
d0d3cdf4
HC
585
586err_out:
587 smp_free_lowcore(cpu);
588 return -EIO;
1da177e4
LT
589}
590
48483b32 591static int __init setup_possible_cpus(char *s)
255acee7 592{
48483b32 593 int pcpus, cpu;
255acee7 594
48483b32 595 pcpus = simple_strtoul(s, NULL, 0);
88e01285
HC
596 init_cpu_possible(cpumask_of(0));
597 for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
def6cfb7 598 set_cpu_possible(cpu, true);
37a33026
HC
599 return 0;
600}
601early_param("possible_cpus", setup_possible_cpus);
602
48483b32
HC
603#ifdef CONFIG_HOTPLUG_CPU
604
39ce010d 605int __cpu_disable(void)
1da177e4 606{
94c12cc7 607 struct ec_creg_mask_parms cr_parms;
f3705136 608 int cpu = smp_processor_id();
1da177e4 609
f3705136 610 cpu_clear(cpu, cpu_online_map);
1da177e4 611
1da177e4 612 /* Disable pfault pseudo page faults on this cpu. */
29b08d2b 613 pfault_fini();
1da177e4 614
94c12cc7
MS
615 memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
616 memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
1da177e4 617
94c12cc7 618 /* disable all external interrupts */
1da177e4 619 cr_parms.orvals[0] = 0;
39ce010d
HC
620 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 |
621 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4);
1da177e4 622 /* disable all I/O interrupts */
1da177e4 623 cr_parms.orvals[6] = 0;
39ce010d
HC
624 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
625 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
1da177e4 626 /* disable most machine checks */
1da177e4 627 cr_parms.orvals[14] = 0;
39ce010d
HC
628 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
629 1 << 25 | 1 << 24);
94c12cc7 630
1da177e4
LT
631 smp_ctl_bit_callback(&cr_parms);
632
1da177e4
LT
633 return 0;
634}
635
39ce010d 636void __cpu_die(unsigned int cpu)
1da177e4
LT
637{
638 /* Wait until target cpu is down */
5c0b912e 639 while (!cpu_stopped(cpu))
1da177e4 640 cpu_relax();
1cb6bb4b 641 smp_free_lowcore(cpu);
395d31d4 642 pr_info("Processor %d stopped\n", cpu);
1da177e4
LT
643}
644
39ce010d 645void cpu_die(void)
1da177e4
LT
646{
647 idle_task_exit();
648 signal_processor(smp_processor_id(), sigp_stop);
649 BUG();
39ce010d 650 for (;;);
1da177e4
LT
651}
652
255acee7
HC
653#endif /* CONFIG_HOTPLUG_CPU */
654
1da177e4
LT
655void __init smp_prepare_cpus(unsigned int max_cpus)
656{
591bb4f6
HC
657#ifndef CONFIG_64BIT
658 unsigned long save_area = 0;
659#endif
660 unsigned long async_stack, panic_stack;
661 struct _lowcore *lowcore;
1da177e4 662 unsigned int cpu;
39ce010d 663
48483b32
HC
664 smp_detect_cpus();
665
39ce010d
HC
666 /* request the 0x1201 emergency signal external interrupt */
667 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
668 panic("Couldn't request external interrupt 0x1201");
7b468488 669 print_cpu_info();
1da177e4 670
591bb4f6 671 /* Reallocate current lowcore, but keep its contents. */
3fd26a77 672 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
591bb4f6
HC
673 panic_stack = __get_free_page(GFP_KERNEL);
674 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
c742b31c 675 BUG_ON(!lowcore || !panic_stack || !async_stack);
347a8dc3 676#ifndef CONFIG_64BIT
77fa2245 677 if (MACHINE_HAS_IEEE)
591bb4f6 678 save_area = get_zeroed_page(GFP_KERNEL);
77fa2245 679#endif
591bb4f6
HC
680 local_irq_disable();
681 local_mcck_disable();
682 lowcore_ptr[smp_processor_id()] = lowcore;
683 *lowcore = S390_lowcore;
684 lowcore->panic_stack = panic_stack + PAGE_SIZE;
685 lowcore->async_stack = async_stack + ASYNC_SIZE;
686#ifndef CONFIG_64BIT
687 if (MACHINE_HAS_IEEE)
688 lowcore->extended_save_area_addr = (u32) save_area;
689#endif
690 set_prefix((u32)(unsigned long) lowcore);
691 local_mcck_enable();
692 local_irq_enable();
3a6ba460
HC
693#ifdef CONFIG_64BIT
694 if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore))
695 BUG();
696#endif
97db7fbf 697 for_each_possible_cpu(cpu)
1da177e4
LT
698 if (cpu != smp_processor_id())
699 smp_create_idle(cpu);
700}
701
ea1f4eec 702void __init smp_prepare_boot_cpu(void)
1da177e4
LT
703{
704 BUG_ON(smp_processor_id() != 0);
705
48483b32
HC
706 current_thread_info()->cpu = 0;
707 cpu_set(0, cpu_present_map);
1da177e4 708 cpu_set(0, cpu_online_map);
1da177e4
LT
709 S390_lowcore.percpu_offset = __per_cpu_offset[0];
710 current_set[0] = current;
08d07968 711 smp_cpu_state[0] = CPU_STATE_CONFIGURED;
c10fde0d 712 smp_cpu_polarization[0] = POLARIZATION_UNKNWN;
1da177e4
LT
713}
714
ea1f4eec 715void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 716{
1da177e4
LT
717}
718
719/*
720 * the frequency of the profiling timer can be changed
721 * by writing a multiplier value into /proc/profile.
722 *
723 * usually you want to run this on all CPUs ;)
724 */
725int setup_profiling_timer(unsigned int multiplier)
726{
39ce010d 727 return 0;
1da177e4
LT
728}
729
08d07968 730#ifdef CONFIG_HOTPLUG_CPU
4a0b2b4d
AK
731static ssize_t cpu_configure_show(struct sys_device *dev,
732 struct sysdev_attribute *attr, char *buf)
08d07968
HC
733{
734 ssize_t count;
735
736 mutex_lock(&smp_cpu_state_mutex);
737 count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
738 mutex_unlock(&smp_cpu_state_mutex);
739 return count;
740}
741
4a0b2b4d
AK
742static ssize_t cpu_configure_store(struct sys_device *dev,
743 struct sysdev_attribute *attr,
744 const char *buf, size_t count)
08d07968
HC
745{
746 int cpu = dev->id;
747 int val, rc;
748 char delim;
749
750 if (sscanf(buf, "%d %c", &val, &delim) != 1)
751 return -EINVAL;
752 if (val != 0 && val != 1)
753 return -EINVAL;
754
9d40d2e3 755 get_online_cpus();
0b18d318 756 mutex_lock(&smp_cpu_state_mutex);
08d07968
HC
757 rc = -EBUSY;
758 if (cpu_online(cpu))
759 goto out;
760 rc = 0;
761 switch (val) {
762 case 0:
763 if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
764 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
c10fde0d 765 if (!rc) {
08d07968 766 smp_cpu_state[cpu] = CPU_STATE_STANDBY;
c10fde0d
HC
767 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
768 }
08d07968
HC
769 }
770 break;
771 case 1:
772 if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
773 rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
c10fde0d 774 if (!rc) {
08d07968 775 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
c10fde0d
HC
776 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
777 }
08d07968
HC
778 }
779 break;
780 default:
781 break;
782 }
783out:
08d07968 784 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 785 put_online_cpus();
08d07968
HC
786 return rc ? rc : count;
787}
788static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
789#endif /* CONFIG_HOTPLUG_CPU */
790
4a0b2b4d
AK
791static ssize_t cpu_polarization_show(struct sys_device *dev,
792 struct sysdev_attribute *attr, char *buf)
c10fde0d
HC
793{
794 int cpu = dev->id;
795 ssize_t count;
796
797 mutex_lock(&smp_cpu_state_mutex);
798 switch (smp_cpu_polarization[cpu]) {
799 case POLARIZATION_HRZ:
800 count = sprintf(buf, "horizontal\n");
801 break;
802 case POLARIZATION_VL:
803 count = sprintf(buf, "vertical:low\n");
804 break;
805 case POLARIZATION_VM:
806 count = sprintf(buf, "vertical:medium\n");
807 break;
808 case POLARIZATION_VH:
809 count = sprintf(buf, "vertical:high\n");
810 break;
811 default:
812 count = sprintf(buf, "unknown\n");
813 break;
814 }
815 mutex_unlock(&smp_cpu_state_mutex);
816 return count;
817}
818static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
819
4a0b2b4d
AK
820static ssize_t show_cpu_address(struct sys_device *dev,
821 struct sysdev_attribute *attr, char *buf)
08d07968
HC
822{
823 return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
824}
825static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
826
827
828static struct attribute *cpu_common_attrs[] = {
829#ifdef CONFIG_HOTPLUG_CPU
830 &attr_configure.attr,
831#endif
832 &attr_address.attr,
c10fde0d 833 &attr_polarization.attr,
08d07968
HC
834 NULL,
835};
836
837static struct attribute_group cpu_common_attr_group = {
838 .attrs = cpu_common_attrs,
839};
1da177e4 840
4a0b2b4d
AK
841static ssize_t show_capability(struct sys_device *dev,
842 struct sysdev_attribute *attr, char *buf)
2fc2d1e9
HC
843{
844 unsigned int capability;
845 int rc;
846
847 rc = get_cpu_capability(&capability);
848 if (rc)
849 return rc;
850 return sprintf(buf, "%u\n", capability);
851}
852static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
853
4a0b2b4d
AK
854static ssize_t show_idle_count(struct sys_device *dev,
855 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
856{
857 struct s390_idle_data *idle;
858 unsigned long long idle_count;
e98bbaaf 859 unsigned int sequence;
fae8b22d
HC
860
861 idle = &per_cpu(s390_idle, dev->id);
e98bbaaf
MS
862repeat:
863 sequence = idle->sequence;
864 smp_rmb();
865 if (sequence & 1)
866 goto repeat;
fae8b22d 867 idle_count = idle->idle_count;
6f430924
MS
868 if (idle->idle_enter)
869 idle_count++;
e98bbaaf
MS
870 smp_rmb();
871 if (idle->sequence != sequence)
872 goto repeat;
fae8b22d
HC
873 return sprintf(buf, "%llu\n", idle_count);
874}
875static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
876
4a0b2b4d
AK
877static ssize_t show_idle_time(struct sys_device *dev,
878 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
879{
880 struct s390_idle_data *idle;
6f430924 881 unsigned long long now, idle_time, idle_enter;
e98bbaaf 882 unsigned int sequence;
fae8b22d
HC
883
884 idle = &per_cpu(s390_idle, dev->id);
6f430924 885 now = get_clock();
e98bbaaf
MS
886repeat:
887 sequence = idle->sequence;
888 smp_rmb();
889 if (sequence & 1)
890 goto repeat;
6f430924
MS
891 idle_time = idle->idle_time;
892 idle_enter = idle->idle_enter;
893 if (idle_enter != 0ULL && idle_enter < now)
894 idle_time += now - idle_enter;
e98bbaaf
MS
895 smp_rmb();
896 if (idle->sequence != sequence)
897 goto repeat;
6f430924 898 return sprintf(buf, "%llu\n", idle_time >> 12);
fae8b22d 899}
69d39d66 900static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 901
08d07968 902static struct attribute *cpu_online_attrs[] = {
fae8b22d
HC
903 &attr_capability.attr,
904 &attr_idle_count.attr,
69d39d66 905 &attr_idle_time_us.attr,
fae8b22d
HC
906 NULL,
907};
908
08d07968
HC
909static struct attribute_group cpu_online_attr_group = {
910 .attrs = cpu_online_attrs,
fae8b22d
HC
911};
912
2fc2d1e9
HC
913static int __cpuinit smp_cpu_notify(struct notifier_block *self,
914 unsigned long action, void *hcpu)
915{
916 unsigned int cpu = (unsigned int)(long)hcpu;
917 struct cpu *c = &per_cpu(cpu_devices, cpu);
918 struct sys_device *s = &c->sysdev;
fae8b22d 919 struct s390_idle_data *idle;
2fc2d1e9
HC
920
921 switch (action) {
922 case CPU_ONLINE:
8bb78442 923 case CPU_ONLINE_FROZEN:
fae8b22d 924 idle = &per_cpu(s390_idle, cpu);
e98bbaaf 925 memset(idle, 0, sizeof(struct s390_idle_data));
08d07968 926 if (sysfs_create_group(&s->kobj, &cpu_online_attr_group))
2fc2d1e9
HC
927 return NOTIFY_BAD;
928 break;
929 case CPU_DEAD:
8bb78442 930 case CPU_DEAD_FROZEN:
08d07968 931 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
932 break;
933 }
934 return NOTIFY_OK;
935}
936
937static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 938 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
939};
940
2bc89b5e 941static int __devinit smp_add_present_cpu(int cpu)
08d07968
HC
942{
943 struct cpu *c = &per_cpu(cpu_devices, cpu);
944 struct sys_device *s = &c->sysdev;
945 int rc;
946
947 c->hotpluggable = 1;
948 rc = register_cpu(c, cpu);
949 if (rc)
950 goto out;
951 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
952 if (rc)
953 goto out_cpu;
954 if (!cpu_online(cpu))
955 goto out;
956 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
957 if (!rc)
958 return 0;
959 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
960out_cpu:
961#ifdef CONFIG_HOTPLUG_CPU
962 unregister_cpu(c);
963#endif
964out:
965 return rc;
966}
967
968#ifdef CONFIG_HOTPLUG_CPU
1e489518 969
67060d9c 970int __ref smp_rescan_cpus(void)
08d07968
HC
971{
972 cpumask_t newcpus;
973 int cpu;
974 int rc;
975
9d40d2e3 976 get_online_cpus();
0b18d318 977 mutex_lock(&smp_cpu_state_mutex);
08d07968 978 newcpus = cpu_present_map;
1e489518 979 rc = __smp_rescan_cpus();
08d07968
HC
980 if (rc)
981 goto out;
982 cpus_andnot(newcpus, cpu_present_map, newcpus);
983 for_each_cpu_mask(cpu, newcpus) {
984 rc = smp_add_present_cpu(cpu);
985 if (rc)
986 cpu_clear(cpu, cpu_present_map);
987 }
988 rc = 0;
989out:
08d07968 990 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 991 put_online_cpus();
c10fde0d
HC
992 if (!cpus_empty(newcpus))
993 topology_schedule_update();
1e489518
HC
994 return rc;
995}
996
da5aae70 997static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf,
1e489518
HC
998 size_t count)
999{
1000 int rc;
1001
1002 rc = smp_rescan_cpus();
08d07968
HC
1003 return rc ? rc : count;
1004}
da5aae70 1005static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
1006#endif /* CONFIG_HOTPLUG_CPU */
1007
da5aae70 1008static ssize_t dispatching_show(struct sysdev_class *class, char *buf)
c10fde0d
HC
1009{
1010 ssize_t count;
1011
1012 mutex_lock(&smp_cpu_state_mutex);
1013 count = sprintf(buf, "%d\n", cpu_management);
1014 mutex_unlock(&smp_cpu_state_mutex);
1015 return count;
1016}
1017
da5aae70
HC
1018static ssize_t dispatching_store(struct sysdev_class *dev, const char *buf,
1019 size_t count)
c10fde0d
HC
1020{
1021 int val, rc;
1022 char delim;
1023
1024 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1025 return -EINVAL;
1026 if (val != 0 && val != 1)
1027 return -EINVAL;
1028 rc = 0;
c10fde0d 1029 get_online_cpus();
0b18d318 1030 mutex_lock(&smp_cpu_state_mutex);
c10fde0d
HC
1031 if (cpu_management == val)
1032 goto out;
1033 rc = topology_set_cpu_management(val);
1034 if (!rc)
1035 cpu_management = val;
1036out:
c10fde0d 1037 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1038 put_online_cpus();
c10fde0d
HC
1039 return rc ? rc : count;
1040}
da5aae70
HC
1041static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
1042 dispatching_store);
c10fde0d 1043
1da177e4
LT
1044static int __init topology_init(void)
1045{
1046 int cpu;
fae8b22d 1047 int rc;
2fc2d1e9
HC
1048
1049 register_cpu_notifier(&smp_cpu_nb);
1da177e4 1050
08d07968 1051#ifdef CONFIG_HOTPLUG_CPU
da5aae70 1052 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
08d07968
HC
1053 if (rc)
1054 return rc;
1055#endif
da5aae70 1056 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
c10fde0d
HC
1057 if (rc)
1058 return rc;
08d07968
HC
1059 for_each_present_cpu(cpu) {
1060 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1061 if (rc)
1062 return rc;
1da177e4
LT
1063 }
1064 return 0;
1065}
1da177e4 1066subsys_initcall(topology_init);