[linux-block.git] / arch / s390 / include / asm / lowcore.h

/*
 *  include/asm-s390/lowcore.h
 *
 *  S390 version
 *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
 *    Author(s): Hartmut Penner (hp@de.ibm.com),
 *               Martin Schwidefsky (schwidefsky@de.ibm.com),
 *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
 */

#ifndef _ASM_S390_LOWCORE_H
#define _ASM_S390_LOWCORE_H

#define __LC_IPL_PARMBLOCK_PTR		0x0014
#define __LC_EXT_PARAMS			0x0080
#define __LC_CPU_ADDRESS		0x0084
#define __LC_EXT_INT_CODE		0x0086

#define __LC_SVC_ILC			0x0088
#define __LC_SVC_INT_CODE		0x008a
#define __LC_PGM_ILC			0x008c
#define __LC_PGM_INT_CODE		0x008e

#define __LC_PER_ATMID			0x0096
#define __LC_PER_ADDRESS		0x0098
#define __LC_PER_ACCESS_ID		0x00a1
#define __LC_AR_MODE_ID			0x00a3

#define __LC_SUBCHANNEL_ID		0x00b8
#define __LC_SUBCHANNEL_NR		0x00ba
#define __LC_IO_INT_PARM		0x00bc
#define __LC_IO_INT_WORD		0x00c0
#define __LC_STFL_FAC_LIST		0x00c8
#define __LC_MCCK_CODE			0x00e8

#define __LC_DUMP_REIPL			0x0e00

#ifndef __s390x__
#define __LC_EXT_OLD_PSW		0x0018
#define __LC_SVC_OLD_PSW		0x0020
#define __LC_PGM_OLD_PSW		0x0028
#define __LC_MCK_OLD_PSW		0x0030
#define __LC_IO_OLD_PSW			0x0038
#define __LC_EXT_NEW_PSW		0x0058
#define __LC_SVC_NEW_PSW		0x0060
#define __LC_PGM_NEW_PSW		0x0068
#define __LC_MCK_NEW_PSW		0x0070
#define __LC_IO_NEW_PSW			0x0078
#define __LC_SAVE_AREA			0x0200
#define __LC_RETURN_PSW			0x0240
#define __LC_RETURN_MCCK_PSW		0x0248
#define __LC_SYNC_ENTER_TIMER		0x0250
#define __LC_ASYNC_ENTER_TIMER		0x0258
#define __LC_EXIT_TIMER			0x0260
#define __LC_USER_TIMER			0x0268
#define __LC_SYSTEM_TIMER		0x0270
#define __LC_STEAL_TIMER		0x0278
#define __LC_LAST_UPDATE_TIMER		0x0280
#define __LC_LAST_UPDATE_CLOCK		0x0288
#define __LC_CURRENT			0x0290
#define __LC_THREAD_INFO		0x0294
#define __LC_KERNEL_STACK		0x0298
#define __LC_ASYNC_STACK		0x029c
#define __LC_PANIC_STACK		0x02a0
#define __LC_KERNEL_ASCE		0x02a4
#define __LC_USER_ASCE			0x02a8
#define __LC_USER_EXEC_ASCE		0x02ac
#define __LC_CPUID			0x02b0
#define __LC_INT_CLOCK			0x02c8
#define __LC_MACHINE_FLAGS		0x02d8
#define __LC_FTRACE_FUNC		0x02dc
#define __LC_IRB			0x0300
#define __LC_PFAULT_INTPARM		0x0080
#define __LC_CPU_TIMER_SAVE_AREA	0x00d8
#define __LC_CLOCK_COMP_SAVE_AREA	0x00e0
#define __LC_PSW_SAVE_AREA		0x0100
#define __LC_PREFIX_SAVE_AREA		0x0108
#define __LC_AREGS_SAVE_AREA		0x0120
#define __LC_FPREGS_SAVE_AREA		0x0160
#define __LC_GPREGS_SAVE_AREA		0x0180
#define __LC_CREGS_SAVE_AREA		0x01c0
#else /* __s390x__ */
#define __LC_LAST_BREAK			0x0110
#define __LC_EXT_OLD_PSW		0x0130
#define __LC_SVC_OLD_PSW		0x0140
#define __LC_PGM_OLD_PSW		0x0150
#define __LC_MCK_OLD_PSW		0x0160
#define __LC_IO_OLD_PSW			0x0170
#define __LC_RESTART_PSW		0x01a0
#define __LC_EXT_NEW_PSW		0x01b0
#define __LC_SVC_NEW_PSW		0x01c0
#define __LC_PGM_NEW_PSW		0x01d0
#define __LC_MCK_NEW_PSW		0x01e0
#define __LC_IO_NEW_PSW			0x01f0
#define __LC_SAVE_AREA			0x0200
#define __LC_RETURN_PSW			0x0280
#define __LC_RETURN_MCCK_PSW		0x0290
#define __LC_SYNC_ENTER_TIMER		0x02a0
#define __LC_ASYNC_ENTER_TIMER		0x02a8
#define __LC_EXIT_TIMER			0x02b0
#define __LC_USER_TIMER			0x02b8
#define __LC_SYSTEM_TIMER		0x02c0
#define __LC_STEAL_TIMER		0x02c8
#define __LC_LAST_UPDATE_TIMER		0x02d0
#define __LC_LAST_UPDATE_CLOCK		0x02d8
#define __LC_CURRENT			0x02e0
#define __LC_THREAD_INFO		0x02e8
#define __LC_KERNEL_STACK		0x02f0
#define __LC_ASYNC_STACK		0x02f8
#define __LC_PANIC_STACK		0x0300
#define __LC_KERNEL_ASCE		0x0308
#define __LC_USER_ASCE			0x0310
#define __LC_USER_EXEC_ASCE		0x0318
#define __LC_CPUID			0x0320
#define __LC_INT_CLOCK			0x0340
#define __LC_VDSO_PER_CPU		0x0350
#define __LC_MACHINE_FLAGS		0x0358
#define __LC_FTRACE_FUNC		0x0360
#define __LC_IRB			0x0380
#define __LC_PASTE			0x03c0
#define __LC_PFAULT_INTPARM		0x11b8
#define __LC_FPREGS_SAVE_AREA		0x1200
#define __LC_GPREGS_SAVE_AREA		0x1280
#define __LC_PSW_SAVE_AREA		0x1300
#define __LC_PREFIX_SAVE_AREA		0x1318
#define __LC_FP_CREG_SAVE_AREA		0x131c
#define __LC_TODREG_SAVE_AREA		0x1324
#define __LC_CPU_TIMER_SAVE_AREA	0x1328
#define __LC_CLOCK_COMP_SAVE_AREA	0x1331
#define __LC_AREGS_SAVE_AREA		0x1340
#define __LC_CREGS_SAVE_AREA		0x1380
#endif /* __s390x__ */

#ifndef __ASSEMBLY__

#include <asm/cpu.h>
#include <asm/ptrace.h>
#include <linux/types.h>

void restart_int_handler(void);
void ext_int_handler(void);
void system_call(void);
void pgm_check_handler(void);
void mcck_int_handler(void);
void io_int_handler(void);

struct save_area_s390 {
	u32	ext_save;
	u64	timer;
	u64	clk_cmp;
	u8	pad1[24];
	u8	psw[8];
	u32	pref_reg;
	u8	pad2[20];
	u32	acc_regs[16];
	u64	fp_regs[4];
	u32	gp_regs[16];
	u32	ctrl_regs[16];
}  __attribute__((packed));

struct save_area_s390x {
	u64	fp_regs[16];
	u64	gp_regs[16];
	u8	psw[16];
	u8	pad1[8];
	u32	pref_reg;
	u32	fp_ctrl_reg;
	u8	pad2[4];
	u32	tod_reg;
	u64	timer;
	u64	clk_cmp;
	u8	pad3[8];
	u32	acc_regs[16];
	u64	ctrl_regs[16];
}  __attribute__((packed));

union save_area {
	struct save_area_s390	s390;
	struct save_area_s390x	s390x;
};

#define SAVE_AREA_BASE_S390	0xd4
#define SAVE_AREA_BASE_S390X	0x1200

#ifndef __s390x__
#define SAVE_AREA_SIZE sizeof(struct save_area_s390)
#define SAVE_AREA_BASE SAVE_AREA_BASE_S390
#else
#define SAVE_AREA_SIZE sizeof(struct save_area_s390x)
#define SAVE_AREA_BASE SAVE_AREA_BASE_S390X
#endif

#ifndef __s390x__
#define LC_ORDER 0
#else
#define LC_ORDER 1
#endif

#define LC_PAGES (1UL << LC_ORDER)

struct _lowcore
{
#ifndef __s390x__
	/* 0x0000 - 0x01ff: defined by architecture */
	psw_t	restart_psw;			/* 0x0000 */
	__u32	ccw2[4];			/* 0x0008 */
	psw_t	external_old_psw;		/* 0x0018 */
	psw_t	svc_old_psw;			/* 0x0020 */
	psw_t	program_old_psw;		/* 0x0028 */
	psw_t	mcck_old_psw;			/* 0x0030 */
	psw_t	io_old_psw;			/* 0x0038 */
	__u8	pad_0x0040[0x0058-0x0040];	/* 0x0040 */
	psw_t	external_new_psw;		/* 0x0058 */
	psw_t	svc_new_psw;			/* 0x0060 */
	psw_t	program_new_psw;		/* 0x0068 */
	psw_t	mcck_new_psw;			/* 0x0070 */
	psw_t	io_new_psw;			/* 0x0078 */
	__u32	ext_params;			/* 0x0080 */
	__u16	cpu_addr;			/* 0x0084 */
	__u16	ext_int_code;			/* 0x0086 */
	__u16	svc_ilc;			/* 0x0088 */
	__u16	svc_code;			/* 0x008a */
	__u16	pgm_ilc;			/* 0x008c */
	__u16	pgm_code;			/* 0x008e */
	__u32	trans_exc_code;			/* 0x0090 */
	__u16	mon_class_num;			/* 0x0094 */
	__u16	per_perc_atmid;			/* 0x0096 */
	__u32	per_address;			/* 0x0098 */
	__u32	monitor_code;			/* 0x009c */
	__u8	exc_access_id;			/* 0x00a0 */
	__u8	per_access_id;			/* 0x00a1 */
	__u8	pad_0x00a2[0x00b8-0x00a2];	/* 0x00a2 */
	__u16	subchannel_id;			/* 0x00b8 */
	__u16	subchannel_nr;			/* 0x00ba */
	__u32	io_int_parm;			/* 0x00bc */
	__u32	io_int_word;			/* 0x00c0 */
	__u8	pad_0x00c4[0x00c8-0x00c4];	/* 0x00c4 */
	__u32	stfl_fac_list;			/* 0x00c8 */
	__u8	pad_0x00cc[0x00d4-0x00cc];	/* 0x00cc */
	__u32	extended_save_area_addr;	/* 0x00d4 */
	__u32	cpu_timer_save_area[2];		/* 0x00d8 */
	__u32	clock_comp_save_area[2];	/* 0x00e0 */
	__u32	mcck_interruption_code[2];	/* 0x00e8 */
	__u8	pad_0x00f0[0x00f4-0x00f0];	/* 0x00f0 */
	__u32	external_damage_code;		/* 0x00f4 */
	__u32	failing_storage_address;	/* 0x00f8 */
	__u8	pad_0x00fc[0x0100-0x00fc];	/* 0x00fc */
	__u32	st_status_fixed_logout[4];	/* 0x0100 */
	__u8	pad_0x0110[0x0120-0x0110];	/* 0x0110 */

	/* CPU register save area: defined by architecture */
	__u32	access_regs_save_area[16];	/* 0x0120 */
	__u32	floating_pt_save_area[8];	/* 0x0160 */
	__u32	gpregs_save_area[16];		/* 0x0180 */
	__u32	cregs_save_area[16];		/* 0x01c0 */

	/* Return psws. */
	__u32	save_area[16];			/* 0x0200 */
	psw_t	return_psw;			/* 0x0240 */
	psw_t	return_mcck_psw;		/* 0x0248 */

	/* CPU time accounting values */
	__u64	sync_enter_timer;		/* 0x0250 */
	__u64	async_enter_timer;		/* 0x0258 */
	__u64	exit_timer;			/* 0x0260 */
	__u64	user_timer;			/* 0x0268 */
	__u64	system_timer;			/* 0x0270 */
	__u64	steal_timer;			/* 0x0278 */
	__u64	last_update_timer;		/* 0x0280 */
	__u64	last_update_clock;		/* 0x0288 */

	/* Current process. */
	__u32	current_task;			/* 0x0290 */
	__u32	thread_info;			/* 0x0294 */
	__u32	kernel_stack;			/* 0x0298 */

	/* Interrupt and panic stack. */
	__u32	async_stack;			/* 0x029c */
	__u32	panic_stack;			/* 0x02a0 */

	/* Address space pointer. */
	__u32	kernel_asce;			/* 0x02a4 */
	__u32	user_asce;			/* 0x02a8 */
	__u32	user_exec_asce;			/* 0x02ac */

	/* SMP info area */
	struct cpuid cpu_id;			/* 0x02b0 */
	__u32	cpu_nr;				/* 0x02b8 */
	__u32	softirq_pending;		/* 0x02bc */
	__u32	percpu_offset;			/* 0x02c0 */
	__u32	ext_call_fast;			/* 0x02c4 */
	__u64	int_clock;			/* 0x02c8 */
	__u64	clock_comparator;		/* 0x02d0 */
	__u32	machine_flags;			/* 0x02d8 */
	__u32	ftrace_func;			/* 0x02dc */
	__u8	pad_0x02f0[0x0300-0x02f0];	/* 0x02f0 */

	/* Interrupt response block */
	__u8	irb[64];			/* 0x0300 */

	__u8	pad_0x0400[0x0e00-0x0400];	/* 0x0400 */

	/*
	 * 0xe00 contains the address of the IPL Parameter Information
	 * block. Dump tools need IPIB for IPL after dump.
	 * Note: do not change the position of any fields in 0x0e00-0x0f00
	 */
	__u32	ipib;				/* 0x0e00 */
	__u32	ipib_checksum;			/* 0x0e04 */

	/* Align to the top 1k of prefix area */
	__u8	pad_0x0e08[0x1000-0x0e08];	/* 0x0e08 */
#else /* !__s390x__ */
	/* 0x0000 - 0x01ff: defined by architecture */
	__u32	ccw1[2];			/* 0x0000 */
	__u32	ccw2[4];			/* 0x0008 */
	__u8	pad_0x0018[0x0080-0x0018];	/* 0x0018 */
	__u32	ext_params;			/* 0x0080 */
	__u16	cpu_addr;			/* 0x0084 */
	__u16	ext_int_code;			/* 0x0086 */
	__u16	svc_ilc;			/* 0x0088 */
	__u16	svc_code;			/* 0x008a */
	__u16	pgm_ilc;			/* 0x008c */
	__u16	pgm_code;			/* 0x008e */
	__u32	data_exc_code;			/* 0x0090 */
	__u16	mon_class_num;			/* 0x0094 */
	__u16	per_perc_atmid;			/* 0x0096 */
	addr_t	per_address;			/* 0x0098 */
	__u8	exc_access_id;			/* 0x00a0 */
	__u8	per_access_id;			/* 0x00a1 */
	__u8	op_access_id;			/* 0x00a2 */
	__u8	ar_access_id;			/* 0x00a3 */
	__u8	pad_0x00a4[0x00a8-0x00a4];	/* 0x00a4 */
	addr_t	trans_exc_code;			/* 0x00a8 */
	addr_t	monitor_code;			/* 0x00b0 */
	__u16	subchannel_id;			/* 0x00b8 */
	__u16	subchannel_nr;			/* 0x00ba */
	__u32	io_int_parm;			/* 0x00bc */
	__u32	io_int_word;			/* 0x00c0 */
	__u8	pad_0x00c4[0x00c8-0x00c4];	/* 0x00c4 */
	__u32	stfl_fac_list;			/* 0x00c8 */
	__u8	pad_0x00cc[0x00e8-0x00cc];	/* 0x00cc */
	__u32	mcck_interruption_code[2];	/* 0x00e8 */
	__u8	pad_0x00f0[0x00f4-0x00f0];	/* 0x00f0 */
	__u32	external_damage_code;		/* 0x00f4 */
	addr_t	failing_storage_address;	/* 0x00f8 */
	__u8	pad_0x0100[0x0120-0x0100];	/* 0x0100 */
	psw_t	restart_old_psw;		/* 0x0120 */
	psw_t	external_old_psw;		/* 0x0130 */
	psw_t	svc_old_psw;			/* 0x0140 */
	psw_t	program_old_psw;		/* 0x0150 */
	psw_t	mcck_old_psw;			/* 0x0160 */
	psw_t	io_old_psw;			/* 0x0170 */
	__u8	pad_0x0180[0x01a0-0x0180];	/* 0x0180 */
	psw_t	restart_psw;			/* 0x01a0 */
	psw_t	external_new_psw;		/* 0x01b0 */
	psw_t	svc_new_psw;			/* 0x01c0 */
	psw_t	program_new_psw;		/* 0x01d0 */
	psw_t	mcck_new_psw;			/* 0x01e0 */
	psw_t	io_new_psw;			/* 0x01f0 */

	/* Entry/exit save area & return psws. */
	__u64	save_area[16];			/* 0x0200 */
	psw_t	return_psw;			/* 0x0280 */
	psw_t	return_mcck_psw;		/* 0x0290 */

	/* CPU accounting and timing values. */
	__u64	sync_enter_timer;		/* 0x02a0 */
	__u64	async_enter_timer;		/* 0x02a8 */
	__u64	exit_timer;			/* 0x02b0 */
	__u64	user_timer;			/* 0x02b8 */
	__u64	system_timer;			/* 0x02c0 */
	__u64	steal_timer;			/* 0x02c8 */
	__u64	last_update_timer;		/* 0x02d0 */
	__u64	last_update_clock;		/* 0x02d8 */

	/* Current process. */
	__u64	current_task;			/* 0x02e0 */
	__u64	thread_info;			/* 0x02e8 */
	__u64	kernel_stack;			/* 0x02f0 */

	/* Interrupt and panic stack. */
	__u64	async_stack;			/* 0x02f8 */
	__u64	panic_stack;			/* 0x0300 */

	/* Address space pointer. */
	__u64	kernel_asce;			/* 0x0308 */
	__u64	user_asce;			/* 0x0310 */
	__u64	user_exec_asce;			/* 0x0318 */

	/* SMP info area */
	struct cpuid cpu_id;			/* 0x0320 */
	__u32	cpu_nr;				/* 0x0328 */
	__u32	softirq_pending;		/* 0x032c */
	__u64	percpu_offset;			/* 0x0330 */
	__u64	ext_call_fast;			/* 0x0338 */
	__u64	int_clock;			/* 0x0340 */
	__u64	clock_comparator;		/* 0x0348 */
	__u64	vdso_per_cpu_data;		/* 0x0350 */
	__u64	machine_flags;			/* 0x0358 */
	__u64	ftrace_func;			/* 0x0360 */
	__u8	pad_0x0368[0x0380-0x0368];	/* 0x0368 */

	/* Interrupt response block. */
	__u8	irb[64];			/* 0x0380 */

	/* Per cpu primary space access list */
	__u32	paste[16];			/* 0x03c0 */

	__u8	pad_0x0400[0x0e00-0x0400];	/* 0x0400 */

	/*
	 * 0xe00 contains the address of the IPL Parameter Information
	 * block. Dump tools need IPIB for IPL after dump.
	 * Note: do not change the position of any fields in 0x0e00-0x0f00
	 */
	__u64	ipib;				/* 0x0e00 */
	__u32	ipib_checksum;			/* 0x0e08 */
	__u8	pad_0x0e0c[0x11b8-0x0e0c];	/* 0x0e0c */

	/* 64 bit extparam used for pfault/diag 250: defined by architecture */
	__u64	ext_params2;			/* 0x11B8 */
	__u8	pad_0x11c0[0x1200-0x11C0];	/* 0x11C0 */

	/* CPU register save area: defined by architecture */
	__u64	floating_pt_save_area[16];	/* 0x1200 */
	__u64	gpregs_save_area[16];		/* 0x1280 */
	__u32	st_status_fixed_logout[4];	/* 0x1300 */
	__u8	pad_0x1310[0x1318-0x1310];	/* 0x1310 */
	__u32	prefixreg_save_area;		/* 0x1318 */
	__u32	fpt_creg_save_area;		/* 0x131c */
	__u8	pad_0x1320[0x1324-0x1320];	/* 0x1320 */
	__u32	tod_progreg_save_area;		/* 0x1324 */
	__u32	cpu_timer_save_area[2];		/* 0x1328 */
	__u32	clock_comp_save_area[2];	/* 0x1330 */
	__u8	pad_0x1338[0x1340-0x1338];	/* 0x1338 */
	__u32	access_regs_save_area[16];	/* 0x1340 */
	__u64	cregs_save_area[16];		/* 0x1380 */

	/* align to the top of the prefix area */
	__u8	pad_0x1400[0x2000-0x1400];	/* 0x1400 */
#endif /* !__s390x__ */
} __attribute__((packed)); /* End structure*/

#define S390_lowcore (*((struct _lowcore *) 0))
extern struct _lowcore *lowcore_ptr[];

static inline void set_prefix(__u32 address)
{
	asm volatile("spx %0" : : "m" (address) : "memory");
}

static inline __u32 store_prefix(void)
{
	__u32 address;

	asm volatile("stpx %0" : "=m" (address));
	return address;
}

#endif

#endif
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/asm-s390/lowcore.h
	3	*
	4	* S390 version
	5	* Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
	6	* Author(s): Hartmut Penner (hp@de.ibm.com),
	7	* Martin Schwidefsky (schwidefsky@de.ibm.com),
	8	* Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
	9	*/
	10
	11	#ifndef _ASM_S390_LOWCORE_H
	12	#define _ASM_S390_LOWCORE_H
	13
866ba284 MS	14	#define __LC_IPL_PARMBLOCK_PTR 0x0014
	15	#define __LC_EXT_PARAMS 0x0080
	16	#define __LC_CPU_ADDRESS 0x0084
	17	#define __LC_EXT_INT_CODE 0x0086
1da177e4	18
866ba284 MS	19	#define __LC_SVC_ILC 0x0088
	20	#define __LC_SVC_INT_CODE 0x008a
	21	#define __LC_PGM_ILC 0x008c
	22	#define __LC_PGM_INT_CODE 0x008e
1da177e4	23
866ba284 MS	24	#define __LC_PER_ATMID 0x0096
	25	#define __LC_PER_ADDRESS 0x0098
	26	#define __LC_PER_ACCESS_ID 0x00a1
	27	#define __LC_AR_MODE_ID 0x00a3
1da177e4	28
866ba284 MS	29	#define __LC_SUBCHANNEL_ID 0x00b8
	30	#define __LC_SUBCHANNEL_NR 0x00ba
	31	#define __LC_IO_INT_PARM 0x00bc
	32	#define __LC_IO_INT_WORD 0x00c0
8c4caa4f	33	#define __LC_STFL_FAC_LIST 0x00c8
866ba284	34	#define __LC_MCCK_CODE 0x00e8
9e74a6b8	35
866ba284	36	#define __LC_DUMP_REIPL 0x0e00
1da177e4 LT	37
1da177e4 LT	38	#ifndef __s390x__
866ba284 MS	39	#define __LC_EXT_OLD_PSW 0x0018
	40	#define __LC_SVC_OLD_PSW 0x0020
	41	#define __LC_PGM_OLD_PSW 0x0028
	42	#define __LC_MCK_OLD_PSW 0x0030
	43	#define __LC_IO_OLD_PSW 0x0038
	44	#define __LC_EXT_NEW_PSW 0x0058
	45	#define __LC_SVC_NEW_PSW 0x0060
	46	#define __LC_PGM_NEW_PSW 0x0068
	47	#define __LC_MCK_NEW_PSW 0x0070
	48	#define __LC_IO_NEW_PSW 0x0078
	49	#define __LC_SAVE_AREA 0x0200
	50	#define __LC_RETURN_PSW 0x0240
	51	#define __LC_RETURN_MCCK_PSW 0x0248
	52	#define __LC_SYNC_ENTER_TIMER 0x0250
	53	#define __LC_ASYNC_ENTER_TIMER 0x0258
	54	#define __LC_EXIT_TIMER 0x0260
	55	#define __LC_USER_TIMER 0x0268
	56	#define __LC_SYSTEM_TIMER 0x0270
	57	#define __LC_STEAL_TIMER 0x0278
	58	#define __LC_LAST_UPDATE_TIMER 0x0280
	59	#define __LC_LAST_UPDATE_CLOCK 0x0288
	60	#define __LC_CURRENT 0x0290
	61	#define __LC_THREAD_INFO 0x0294
	62	#define __LC_KERNEL_STACK 0x0298
	63	#define __LC_ASYNC_STACK 0x029c
	64	#define __LC_PANIC_STACK 0x02a0
	65	#define __LC_KERNEL_ASCE 0x02a4
	66	#define __LC_USER_ASCE 0x02a8
	67	#define __LC_USER_EXEC_ASCE 0x02ac
	68	#define __LC_CPUID 0x02b0
	69	#define __LC_INT_CLOCK 0x02c8
25097bf1	70	#define __LC_MACHINE_FLAGS 0x02d8
dfd9f7ab	71	#define __LC_FTRACE_FUNC 0x02dc
866ba284 MS	72	#define __LC_IRB 0x0300
	73	#define __LC_PFAULT_INTPARM 0x0080
	74	#define __LC_CPU_TIMER_SAVE_AREA 0x00d8
	75	#define __LC_CLOCK_COMP_SAVE_AREA 0x00e0
	76	#define __LC_PSW_SAVE_AREA 0x0100
	77	#define __LC_PREFIX_SAVE_AREA 0x0108
	78	#define __LC_AREGS_SAVE_AREA 0x0120
	79	#define __LC_FPREGS_SAVE_AREA 0x0160
	80	#define __LC_GPREGS_SAVE_AREA 0x0180
	81	#define __LC_CREGS_SAVE_AREA 0x01c0
1da177e4	82	#else /* __s390x__ */
866ba284 MS	83	#define __LC_LAST_BREAK 0x0110
	84	#define __LC_EXT_OLD_PSW 0x0130
	85	#define __LC_SVC_OLD_PSW 0x0140
	86	#define __LC_PGM_OLD_PSW 0x0150
	87	#define __LC_MCK_OLD_PSW 0x0160
	88	#define __LC_IO_OLD_PSW 0x0170
1aaf179d	89	#define __LC_RESTART_PSW 0x01a0
866ba284 MS	90	#define __LC_EXT_NEW_PSW 0x01b0
	91	#define __LC_SVC_NEW_PSW 0x01c0
	92	#define __LC_PGM_NEW_PSW 0x01d0
	93	#define __LC_MCK_NEW_PSW 0x01e0
	94	#define __LC_IO_NEW_PSW 0x01f0
	95	#define __LC_SAVE_AREA 0x0200
	96	#define __LC_RETURN_PSW 0x0280
	97	#define __LC_RETURN_MCCK_PSW 0x0290
	98	#define __LC_SYNC_ENTER_TIMER 0x02a0
	99	#define __LC_ASYNC_ENTER_TIMER 0x02a8
	100	#define __LC_EXIT_TIMER 0x02b0
	101	#define __LC_USER_TIMER 0x02b8
	102	#define __LC_SYSTEM_TIMER 0x02c0
	103	#define __LC_STEAL_TIMER 0x02c8
	104	#define __LC_LAST_UPDATE_TIMER 0x02d0
	105	#define __LC_LAST_UPDATE_CLOCK 0x02d8
	106	#define __LC_CURRENT 0x02e0
	107	#define __LC_THREAD_INFO 0x02e8
	108	#define __LC_KERNEL_STACK 0x02f0
	109	#define __LC_ASYNC_STACK 0x02f8
	110	#define __LC_PANIC_STACK 0x0300
	111	#define __LC_KERNEL_ASCE 0x0308
	112	#define __LC_USER_ASCE 0x0310
	113	#define __LC_USER_EXEC_ASCE 0x0318
	114	#define __LC_CPUID 0x0320
	115	#define __LC_INT_CLOCK 0x0340
	116	#define __LC_VDSO_PER_CPU 0x0350
25097bf1	117	#define __LC_MACHINE_FLAGS 0x0358
dfd9f7ab	118	#define __LC_FTRACE_FUNC 0x0360
866ba284 MS	119	#define __LC_IRB 0x0380
	120	#define __LC_PASTE 0x03c0
	121	#define __LC_PFAULT_INTPARM 0x11b8
ff6b8ea6	122	#define __LC_FPREGS_SAVE_AREA 0x1200
866ba284	123	#define __LC_GPREGS_SAVE_AREA 0x1280
ff6b8ea6 MH	124	#define __LC_PSW_SAVE_AREA 0x1300
ff6b8ea6 MH	125	#define __LC_PREFIX_SAVE_AREA 0x1318
866ba284	126	#define __LC_FP_CREG_SAVE_AREA 0x131c
ff6b8ea6	127	#define __LC_TODREG_SAVE_AREA 0x1324
866ba284	128	#define __LC_CPU_TIMER_SAVE_AREA 0x1328
ff6b8ea6	129	#define __LC_CLOCK_COMP_SAVE_AREA 0x1331
866ba284 MS	130	#define __LC_AREGS_SAVE_AREA 0x1340
866ba284 MS	131	#define __LC_CREGS_SAVE_AREA 0x1380
1da177e4 LT	132	#endif /* __s390x__ */
	133
	134	#ifndef __ASSEMBLY__
	135
e86a6ed6	136	#include <asm/cpu.h>
25097bf1	137	#include <asm/ptrace.h>
1da177e4	138	#include <linux/types.h>
1da177e4 LT	139
	140	void restart_int_handler(void);
	141	void ext_int_handler(void);
	142	void system_call(void);
	143	void pgm_check_handler(void);
	144	void mcck_int_handler(void);
	145	void io_int_handler(void);
	146
411ed322 MH	147	struct save_area_s390 {
	148	u32 ext_save;
	149	u64 timer;
	150	u64 clk_cmp;
	151	u8 pad1[24];
	152	u8 psw[8];
	153	u32 pref_reg;
	154	u8 pad2[20];
	155	u32 acc_regs[16];
	156	u64 fp_regs[4];
	157	u32 gp_regs[16];
	158	u32 ctrl_regs[16];
	159	} __attribute__((packed));
	160
	161	struct save_area_s390x {
	162	u64 fp_regs[16];
	163	u64 gp_regs[16];
	164	u8 psw[16];
	165	u8 pad1[8];
	166	u32 pref_reg;
	167	u32 fp_ctrl_reg;
	168	u8 pad2[4];
	169	u32 tod_reg;
	170	u64 timer;
	171	u64 clk_cmp;
	172	u8 pad3[8];
	173	u32 acc_regs[16];
	174	u64 ctrl_regs[16];
	175	} __attribute__((packed));
	176
	177	union save_area {
	178	struct save_area_s390 s390;
	179	struct save_area_s390x s390x;
	180	};
	181
	182	#define SAVE_AREA_BASE_S390 0xd4
	183	#define SAVE_AREA_BASE_S390X 0x1200
	184
	185	#ifndef __s390x__
	186	#define SAVE_AREA_SIZE sizeof(struct save_area_s390)
	187	#define SAVE_AREA_BASE SAVE_AREA_BASE_S390
	188	#else
	189	#define SAVE_AREA_SIZE sizeof(struct save_area_s390x)
	190	#define SAVE_AREA_BASE SAVE_AREA_BASE_S390X
	191	#endif
	192
3fd26a77 HC	193	#ifndef __s390x__
	194	#define LC_ORDER 0
	195	#else
	196	#define LC_ORDER 1
	197	#endif
	198
2573a575 HC	199	#define LC_PAGES (1UL << LC_ORDER)
2573a575 HC	200
1da177e4 LT	201	struct _lowcore
	202	{
	203	#ifndef __s390x__
866ba284 MS	204	/* 0x0000 - 0x01ff: defined by architecture */
	205	psw_t restart_psw; /* 0x0000 */
	206	__u32 ccw2[4]; /* 0x0008 */
	207	psw_t external_old_psw; /* 0x0018 */
	208	psw_t svc_old_psw; /* 0x0020 */
	209	psw_t program_old_psw; /* 0x0028 */
	210	psw_t mcck_old_psw; /* 0x0030 */
	211	psw_t io_old_psw; /* 0x0038 */
	212	__u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */
	213	psw_t external_new_psw; /* 0x0058 */
	214	psw_t svc_new_psw; /* 0x0060 */
	215	psw_t program_new_psw; /* 0x0068 */
	216	psw_t mcck_new_psw; /* 0x0070 */
	217	psw_t io_new_psw; /* 0x0078 */
	218	__u32 ext_params; /* 0x0080 */
	219	__u16 cpu_addr; /* 0x0084 */
	220	__u16 ext_int_code; /* 0x0086 */
	221	__u16 svc_ilc; /* 0x0088 */
	222	__u16 svc_code; /* 0x008a */
	223	__u16 pgm_ilc; /* 0x008c */
	224	__u16 pgm_code; /* 0x008e */
	225	__u32 trans_exc_code; /* 0x0090 */
	226	__u16 mon_class_num; /* 0x0094 */
	227	__u16 per_perc_atmid; /* 0x0096 */
	228	__u32 per_address; /* 0x0098 */
	229	__u32 monitor_code; /* 0x009c */
	230	__u8 exc_access_id; /* 0x00a0 */
	231	__u8 per_access_id; /* 0x00a1 */
	232	__u8 pad_0x00a2[0x00b8-0x00a2]; /* 0x00a2 */
	233	__u16 subchannel_id; /* 0x00b8 */
	234	__u16 subchannel_nr; /* 0x00ba */
	235	__u32 io_int_parm; /* 0x00bc */
	236	__u32 io_int_word; /* 0x00c0 */
	237	__u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
	238	__u32 stfl_fac_list; /* 0x00c8 */
	239	__u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */
	240	__u32 extended_save_area_addr; /* 0x00d4 */
	241	__u32 cpu_timer_save_area[2]; /* 0x00d8 */
	242	__u32 clock_comp_save_area[2]; /* 0x00e0 */
	243	__u32 mcck_interruption_code[2]; /* 0x00e8 */
	244	__u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
	245	__u32 external_damage_code; /* 0x00f4 */
	246	__u32 failing_storage_address; /* 0x00f8 */
	247	__u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */
	248	__u32 st_status_fixed_logout[4]; /* 0x0100 */
	249	__u8 pad_0x0110[0x0120-0x0110]; /* 0x0110 */
	250
	251	/* CPU register save area: defined by architecture */
	252	__u32 access_regs_save_area[16]; /* 0x0120 */
	253	__u32 floating_pt_save_area[8]; /* 0x0160 */
	254	__u32 gpregs_save_area[16]; /* 0x0180 */
	255	__u32 cregs_save_area[16]; /* 0x01c0 */
	256
	257	/* Return psws. */
	258	__u32 save_area[16]; /* 0x0200 */
	259	psw_t return_psw; /* 0x0240 */
	260	psw_t return_mcck_psw; /* 0x0248 */
	261
	262	/* CPU time accounting values */
	263	__u64 sync_enter_timer; /* 0x0250 */
	264	__u64 async_enter_timer; /* 0x0258 */
	265	__u64 exit_timer; /* 0x0260 */
	266	__u64 user_timer; /* 0x0268 */
	267	__u64 system_timer; /* 0x0270 */
268	__u64 steal_timer; /* 0x0278 */
269	__u64 last_update_timer; /* 0x0280 */
270	__u64 last_update_clock; /* 0x0288 */
271
272	/* Current process. */
273	__u32 current_task; /* 0x0290 */
274	__u32 thread_info; /* 0x0294 */
275	__u32 kernel_stack; /* 0x0298 */
276
277	/* Interrupt and panic stack. */
278	__u32 async_stack; /* 0x029c */
279	__u32 panic_stack; /* 0x02a0 */
280
281	/* Address space pointer. */
282	__u32 kernel_asce; /* 0x02a4 */
283	__u32 user_asce; /* 0x02a8 */
284	__u32 user_exec_asce; /* 0x02ac */
285
286	/* SMP info area */
e86a6ed6	287	struct cpuid cpu_id; /* 0x02b0 */
866ba284 MS	288	__u32 cpu_nr; /* 0x02b8 */
	289	__u32 softirq_pending; /* 0x02bc */
	290	__u32 percpu_offset; /* 0x02c0 */
	291	__u32 ext_call_fast; /* 0x02c4 */
	292	__u64 int_clock; /* 0x02c8 */
	293	__u64 clock_comparator; /* 0x02d0 */
25097bf1	294	__u32 machine_flags; /* 0x02d8 */
dfd9f7ab HC	295	__u32 ftrace_func; /* 0x02dc */
dfd9f7ab HC	296	__u8 pad_0x02f0[0x0300-0x02f0]; /* 0x02f0 */
866ba284 MS	297
	298	/* Interrupt response block */
	299	__u8 irb[64]; /* 0x0300 */
	300
	301	__u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */
	302
	303	/*
	304	* 0xe00 contains the address of the IPL Parameter Information
	305	* block. Dump tools need IPIB for IPL after dump.
	306	* Note: do not change the position of any fields in 0x0e00-0x0f00
	307	*/
	308	__u32 ipib; /* 0x0e00 */
	309	__u32 ipib_checksum; /* 0x0e04 */
	310
	311	/* Align to the top 1k of prefix area */
	312	__u8 pad_0x0e08[0x1000-0x0e08]; /* 0x0e08 */
1da177e4	313	#else /* !__s390x__ */
866ba284 MS	314	/* 0x0000 - 0x01ff: defined by architecture */
	315	__u32 ccw1[2]; /* 0x0000 */
	316	__u32 ccw2[4]; /* 0x0008 */
	317	__u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
	318	__u32 ext_params; /* 0x0080 */
	319	__u16 cpu_addr; /* 0x0084 */
	320	__u16 ext_int_code; /* 0x0086 */
	321	__u16 svc_ilc; /* 0x0088 */
	322	__u16 svc_code; /* 0x008a */
	323	__u16 pgm_ilc; /* 0x008c */
	324	__u16 pgm_code; /* 0x008e */
	325	__u32 data_exc_code; /* 0x0090 */
	326	__u16 mon_class_num; /* 0x0094 */
	327	__u16 per_perc_atmid; /* 0x0096 */
	328	addr_t per_address; /* 0x0098 */
	329	__u8 exc_access_id; /* 0x00a0 */
	330	__u8 per_access_id; /* 0x00a1 */
	331	__u8 op_access_id; /* 0x00a2 */
	332	__u8 ar_access_id; /* 0x00a3 */
	333	__u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
	334	addr_t trans_exc_code; /* 0x00a8 */
	335	addr_t monitor_code; /* 0x00b0 */
	336	__u16 subchannel_id; /* 0x00b8 */
	337	__u16 subchannel_nr; /* 0x00ba */
	338	__u32 io_int_parm; /* 0x00bc */
	339	__u32 io_int_word; /* 0x00c0 */
	340	__u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
	341	__u32 stfl_fac_list; /* 0x00c8 */
	342	__u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
	343	__u32 mcck_interruption_code[2]; /* 0x00e8 */
	344	__u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
	345	__u32 external_damage_code; /* 0x00f4 */
	346	addr_t failing_storage_address; /* 0x00f8 */
	347	__u8 pad_0x0100[0x0120-0x0100]; /* 0x0100 */
	348	psw_t restart_old_psw; /* 0x0120 */
	349	psw_t external_old_psw; /* 0x0130 */
	350	psw_t svc_old_psw; /* 0x0140 */
	351	psw_t program_old_psw; /* 0x0150 */
	352	psw_t mcck_old_psw; /* 0x0160 */
	353	psw_t io_old_psw; /* 0x0170 */
	354	__u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
	355	psw_t restart_psw; /* 0x01a0 */
	356	psw_t external_new_psw; /* 0x01b0 */
	357	psw_t svc_new_psw; /* 0x01c0 */
	358	psw_t program_new_psw; /* 0x01d0 */
	359	psw_t mcck_new_psw; /* 0x01e0 */
	360	psw_t io_new_psw; /* 0x01f0 */
	361
	362	/* Entry/exit save area & return psws. */
	363	__u64 save_area[16]; /* 0x0200 */
	364	psw_t return_psw; /* 0x0280 */
	365	psw_t return_mcck_psw; /* 0x0290 */
	366
	367	/* CPU accounting and timing values. */
	368	__u64 sync_enter_timer; /* 0x02a0 */
	369	__u64 async_enter_timer; /* 0x02a8 */
	370	__u64 exit_timer; /* 0x02b0 */
	371	__u64 user_timer; /* 0x02b8 */
	372	__u64 system_timer; /* 0x02c0 */
	373	__u64 steal_timer; /* 0x02c8 */
	374	__u64 last_update_timer; /* 0x02d0 */
	375	__u64 last_update_clock; /* 0x02d8 */
	376
	377	/* Current process. */
378	__u64 current_task; /* 0x02e0 */
379	__u64 thread_info; /* 0x02e8 */
380	__u64 kernel_stack; /* 0x02f0 */
381
382	/* Interrupt and panic stack. */
383	__u64 async_stack; /* 0x02f8 */
384	__u64 panic_stack; /* 0x0300 */
385
386	/* Address space pointer. */
387	__u64 kernel_asce; /* 0x0308 */
388	__u64 user_asce; /* 0x0310 */
389	__u64 user_exec_asce; /* 0x0318 */
390
391	/* SMP info area */
e86a6ed6	392	struct cpuid cpu_id; /* 0x0320 */
866ba284 MS	393	__u32 cpu_nr; /* 0x0328 */
	394	__u32 softirq_pending; /* 0x032c */
	395	__u64 percpu_offset; /* 0x0330 */
	396	__u64 ext_call_fast; /* 0x0338 */
	397	__u64 int_clock; /* 0x0340 */
	398	__u64 clock_comparator; /* 0x0348 */
	399	__u64 vdso_per_cpu_data; /* 0x0350 */
25097bf1	400	__u64 machine_flags; /* 0x0358 */
dfd9f7ab HC	401	__u64 ftrace_func; /* 0x0360 */
dfd9f7ab HC	402	__u8 pad_0x0368[0x0380-0x0368]; /* 0x0368 */
866ba284 MS	403
	404	/* Interrupt response block. */
	405	__u8 irb[64]; /* 0x0380 */
1da177e4	406
c742b31c	407	/* Per cpu primary space access list */
866ba284 MS	408	__u32 paste[16]; /* 0x03c0 */
	409
	410	__u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */
	411
	412	/*
	413	* 0xe00 contains the address of the IPL Parameter Information
	414	* block. Dump tools need IPIB for IPL after dump.
	415	* Note: do not change the position of any fields in 0x0e00-0x0f00
	416	*/
	417	__u64 ipib; /* 0x0e00 */
	418	__u32 ipib_checksum; /* 0x0e08 */
	419	__u8 pad_0x0e0c[0x11b8-0x0e0c]; /* 0x0e0c */
	420
	421	/* 64 bit extparam used for pfault/diag 250: defined by architecture */
	422	__u64 ext_params2; /* 0x11B8 */
	423	__u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
	424
	425	/* CPU register save area: defined by architecture */
	426	__u64 floating_pt_save_area[16]; /* 0x1200 */
	427	__u64 gpregs_save_area[16]; /* 0x1280 */
	428	__u32 st_status_fixed_logout[4]; /* 0x1300 */
	429	__u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
	430	__u32 prefixreg_save_area; /* 0x1318 */
	431	__u32 fpt_creg_save_area; /* 0x131c */
	432	__u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
	433	__u32 tod_progreg_save_area; /* 0x1324 */
	434	__u32 cpu_timer_save_area[2]; /* 0x1328 */
	435	__u32 clock_comp_save_area[2]; /* 0x1330 */
	436	__u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */
	437	__u32 access_regs_save_area[16]; /* 0x1340 */
	438	__u64 cregs_save_area[16]; /* 0x1380 */
1da177e4 LT	439
1da177e4 LT	440	/* align to the top of the prefix area */
866ba284	441	__u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */
1da177e4 LT	442	#endif /* !__s390x__ */
	443	} __attribute__((packed)); /* End structure*/
	444
	445	#define S390_lowcore (((struct _lowcore ) 0))
	446	extern struct _lowcore *lowcore_ptr[];
	447
4448aaf0	448	static inline void set_prefix(__u32 address)
1da177e4	449	{
94c12cc7	450	asm volatile("spx %0" : : "m" (address) : "memory");
1da177e4 LT	451	}
1da177e4 LT	452
15e9b586 HC	453	static inline __u32 store_prefix(void)
	454	{
	455	__u32 address;
	456
	457	asm volatile("stpx %0" : "=m" (address));
	458	return address;
	459	}
	460
1da177e4 LT	461	#endif
	462
	463	#endif