perf/x86/intel/cqm: Document PQR MSR abuse
authorThomas Gleixner <tglx@linutronix.de>
Tue, 19 May 2015 00:00:50 +0000 (00:00 +0000)
committerIngo Molnar <mingo@kernel.org>
Wed, 27 May 2015 07:17:38 +0000 (09:17 +0200)
commitf4d9757ca6f5a2db6919a5b1ab86b8afa16773d0
tree4f67700eba0d5fab74cfa5b07b4e988208afb06d
parent8d12ded3dd499e38e8022fe3ec53920d085e57a3
perf/x86/intel/cqm: Document PQR MSR abuse

The CQM code acts like it owns the PQR MSR completely. That's not true
because only the lower 10 bits are used for CQM. The upper 32 bits are
used for the 'CLass Of Service ID' (CLOSID). Document the abuse. Will be
fixed in a later patch.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Matt Fleming <matt.fleming@intel.com>
Cc: Kanaka Juvva <kanaka.d.juvva@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Cc: Will Auld <will.auld@intel.com>
Link: http://lkml.kernel.org/r/20150518235149.823214798@linutronix.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel_cqm.c