MIPS: Don't write ones to reserved entryhi bits.
authorRalf Baechle <ralf@linux-mips.org>
Wed, 27 May 2009 16:29:37 +0000 (17:29 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 2 Nov 2009 11:00:01 +0000 (12:00 +0100)
commitd30cecbcbe149a36a354757cea835c1bb28689cf
tree695c69480dfa8e083cf567aad02bef2a5a35cfca
parent22242681cff52bfb7cba5d2a37b91802be7a4e4c
MIPS: Don't write ones to reserved entryhi bits.

We've silently been relying on the hardware chopping off excess, reserved
ASID bits for no better reason that it saving an instruction.  Because we
already have:

#define cpu_asid(cpu, mm)       (cpu_context((cpu), (mm)) & ASID_MASK)

in <asm/mmu_context.h>.

We can use a cleanup to avoid writing non-zero bits into the reserved
entryhi bits.  This avoid triggering some debugging assertion in the
Cavium simulator.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mmu_context.h