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pinctrl: sh-pfc: r8a77990: Add bias pinconf support
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Fri, 11 May 2018 03:22:24 +0000 (12:22 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 23 May 2018 12:43:32 +0000 (14:43 +0200)
commit83f6941a42a5e773a5e850944a0f1200841eae65
tree1a46cec7573e90e0431444169db50ed14c2382dctree | snapshot
parent6d4036a1e3b3ac0f3eebda5a0bbc6d78ebc14389commit | diff
pinctrl: sh-pfc: r8a77990: Add bias pinconf support

This patch implements control of pull-up and pull-down. On this SoC there
is no simple mapping of GP pins to bias register bits, so we need a table.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a77990.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)