pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Sat, 1 Dec 2018 06:19:24 +0000 (15:19 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 21 Jan 2019 12:24:52 +0000 (13:24 +0100)
commit699c7d1346fbef69e60ca7647c50bbebc483d1c8
tree8093abe6bb6338e28cea5eb9df9e80f2bb0f36c5
parentbfeffd155283772bbe78c6a05dec7c0128ee500c
pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0

According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
Aug 24, 2018, the MOD_SEL0 bit3 is set to 0 when TX0_A pin function is
selected, and the MOD_SEL0 bit3 is set to 1 when TX0_B pin function is
selected.

Fixes: 6d4036a1e3b3ac0f ("pinctrl: sh-pfc: Initial R8A77990 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
drivers/pinctrl/sh-pfc/pfc-r8a77990.c