firmware: tegra: Simplify channel management
authorMikko Perttunen <mperttunen@nvidia.com>
Tue, 20 Feb 2018 11:58:06 +0000 (13:58 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 8 Mar 2018 13:20:58 +0000 (14:20 +0100)
commit1abb081e41a718d73183b0e1b76bfff66e92f7e1
tree5d1e42f21241910c4a7af23a9b52ae763fd68aeb
parent7928b2cbe55b2a410a0f5c1f154610059c57b1b2
firmware: tegra: Simplify channel management

The Tegra194 BPMP only implements 5 channels (4 to BPMP, 1 to CCPLEX),
and they are not placed contiguously in memory. The current channel
management in the BPMP driver does not support this.

Simplify and refactor the channel management such that only one atomic
transmit channel and one receive channel are supported, and channels
are not required to be placed contiguously in memory. The same
configuration also works on T186 so we end up with less code.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/firmware/tegra/bpmp.c
include/soc/tegra/bpmp.h