arm64: Handle el1 synchronous instruction aborts cleanly

[linux-2.6-block.git] / arch / arm64 / kernel / entry.S

diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 6c3b7345a6c428f5952909ac0833684ca0401f1a..441420ca7d084af131bf7e7373c7bfc22c8ae26f 100644 (file)
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -258,6 +258,7 @@ tsk .req    x28             // current thread_info
 /*
  * Exception vectors.
  */
+       .pushsection ".entry.text", "ax"
 
        .align  11
 ENTRY(vectors)
@@ -352,6 +353,8 @@ el1_sync:
        lsr     x24, x1, #ESR_ELx_EC_SHIFT      // exception class
        cmp     x24, #ESR_ELx_EC_DABT_CUR       // data abort in EL1
        b.eq    el1_da
+       cmp     x24, #ESR_ELx_EC_IABT_CUR       // instruction abort in EL1
+       b.eq    el1_ia
        cmp     x24, #ESR_ELx_EC_SYS64          // configurable trap
        b.eq    el1_undef
        cmp     x24, #ESR_ELx_EC_SP_ALIGN       // stack alignment exception
@@ -363,6 +366,11 @@ el1_sync:
        cmp     x24, #ESR_ELx_EC_BREAKPT_CUR    // debug exception in EL1
        b.ge    el1_dbg
        b       el1_inv
+
+el1_ia:
+       /*
+        * Fall through to the Data abort case
+        */
 el1_da:
        /*
         * Data abort handling
@@ -466,7 +474,7 @@ el0_sync:
        cmp     x24, #ESR_ELx_EC_FP_EXC64       // FP/ASIMD exception
        b.eq    el0_fpsimd_exc
        cmp     x24, #ESR_ELx_EC_SYS64          // configurable trap
-       b.eq    el0_undef
+       b.eq    el0_sys
        cmp     x24, #ESR_ELx_EC_SP_ALIGN       // stack alignment exception
        b.eq    el0_sp_pc
        cmp     x24, #ESR_ELx_EC_PC_ALIGN       // pc alignment exception
@@ -547,7 +555,7 @@ el0_ia:
        enable_dbg_and_irq
        ct_user_exit
        mov     x0, x26
-       orr     x1, x25, #1 << 24               // use reserved ISS bit for instruction aborts
+       mov     x1, x25
        mov     x2, sp
        bl      do_mem_abort
        b       ret_to_user
@@ -594,6 +602,16 @@ el0_undef:
        mov     x0, sp
        bl      do_undefinstr
        b       ret_to_user
+el0_sys:
+       /*
+        * System instructions, for trapped cache maintenance instructions
+        */
+       enable_dbg_and_irq
+       ct_user_exit
+       mov     x0, x25
+       mov     x1, sp
+       bl      do_sysinstr
+       b       ret_to_user
 el0_dbg:
        /*
         * Debug exception handling
@@ -789,6 +807,8 @@ __ni_sys_trace:
        bl      do_ni_syscall
        b       __sys_trace_return
 
+       .popsection                             // .entry.text
+
 /*
  * Special system call wrappers.
  */