arm64: dts: Fix broken architected timer interrupt trigger

[linux-2.6-block.git] / arch / arm64 / boot / dts / freescale / fsl-ls2080a.dtsi

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 3187c822afa3b0681bc6cc09e3d1ac95168fadf6..e3b6034ea5d9084190cddfcf76fdc2e7283cb0d9 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -51,7 +51,7 @@
        #size-cells = <2>;
 
        cpus {
-               #address-cells = <2>;
+               #address-cells = <1>;
                #size-cells = <0>;
 
                /*
@@ -65,57 +65,81 @@
                cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a57";
-                       reg = <0x0 0x0>;
+                       reg = <0x0>;
                        clocks = <&clockgen 1 0>;
+                       next-level-cache = <&cluster0_l2>;
                };
 
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a57";
-                       reg = <0x0 0x1>;
+                       reg = <0x1>;
                        clocks = <&clockgen 1 0>;
+                       next-level-cache = <&cluster0_l2>;
                };
 
                cpu@100 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a57";
-                       reg = <0x0 0x100>;
+                       reg = <0x100>;
                        clocks = <&clockgen 1 1>;
+                       next-level-cache = <&cluster1_l2>;
                };
 
                cpu@101 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a57";
-                       reg = <0x0 0x101>;
+                       reg = <0x101>;
                        clocks = <&clockgen 1 1>;
+                       next-level-cache = <&cluster1_l2>;
                };
 
                cpu@200 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a57";
-                       reg = <0x0 0x200>;
+                       reg = <0x200>;
                        clocks = <&clockgen 1 2>;
+                       next-level-cache = <&cluster2_l2>;
                };
 
                cpu@201 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a57";
-                       reg = <0x0 0x201>;
+                       reg = <0x201>;
                        clocks = <&clockgen 1 2>;
+                       next-level-cache = <&cluster2_l2>;
                };
 
                cpu@300 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a57";
-                       reg = <0x0 0x300>;
+                       reg = <0x300>;
                        clocks = <&clockgen 1 3>;
+                       next-level-cache = <&cluster3_l2>;
                };
 
                cpu@301 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a57";
-                       reg = <0x0 0x301>;
+                       reg = <0x301>;
                        clocks = <&clockgen 1 3>;
+                       next-level-cache = <&cluster3_l2>;
+               };
+
+               cluster0_l2: l2-cache0 {
+                       compatible = "cache";
+               };
+
+               cluster1_l2: l2-cache1 {
+                       compatible = "cache";
+               };
+
+               cluster2_l2: l2-cache2 {
+                       compatible = "cache";
+               };
+
+               cluster3_l2: l2-cache3 {
+                       compatible = "cache";
                };
        };
 
@@ -167,10 +191,10 @@
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
-                            <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
-                            <1 11 0x8>, /* Virtual PPI, active-low */
-                            <1 10 0x8>; /* Hypervisor PPI, active-low */
+               interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
+                            <1 14 4>, /* Physical Non-Secure PPI, active-low */
+                            <1 11 4>, /* Virtual PPI, active-low */
+                            <1 10 4>; /* Hypervisor PPI, active-low */
        };
 
        pmu {
@@ -672,6 +696,7 @@
                        interrupts = <0 80 0x4>; /* Level high type */
                        dr_mode = "host";
                        snps,quirk-frame-length-adjustment = <0x20>;
+                       snps,dis_rxdet_inp3_quirk;
                };
 
                usb1: usb3@3110000 {
@@ -681,6 +706,7 @@
                        interrupts = <0 81 0x4>; /* Level high type */
                        dr_mode = "host";
                        snps,quirk-frame-length-adjustment = <0x20>;
+                       snps,dis_rxdet_inp3_quirk;
                };
 
                ccn@4000000 {