arm64: dts: Fix broken architected timer interrupt trigger
[linux-2.6-block.git] / arch / arm64 / boot / dts / freescale / fsl-ls1043a.dtsi
index 6bd46c133010d25d936f7f30453784bfc959e839..a67e210e201935a65768b0505e683801624bc3b1 100644 (file)
@@ -51,7 +51,7 @@
        #size-cells = <2>;
 
        cpus {
-               #address-cells = <2>;
+               #address-cells = <1>;
                #size-cells = <0>;
 
                /*
                cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53";
-                       reg = <0x0 0x0>;
+                       reg = <0x0>;
                        clocks = <&clockgen 1 0>;
+                       next-level-cache = <&l2>;
                };
 
                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53";
-                       reg = <0x0 0x1>;
+                       reg = <0x1>;
                        clocks = <&clockgen 1 0>;
+                       next-level-cache = <&l2>;
                };
 
                cpu2: cpu@2 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53";
-                       reg = <0x0 0x2>;
+                       reg = <0x2>;
                        clocks = <&clockgen 1 0>;
+                       next-level-cache = <&l2>;
                };
 
                cpu3: cpu@3 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53";
-                       reg = <0x0 0x3>;
+                       reg = <0x3>;
                        clocks = <&clockgen 1 0>;
+                       next-level-cache = <&l2>;
+               };
+
+               l2: l2-cache {
+                       compatible = "cache";
                };
        };
 
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts = <1 13 0x1>, /* Physical Secure PPI */
-                            <1 14 0x1>, /* Physical Non-Secure PPI */
-                            <1 11 0x1>, /* Virtual PPI */
-                            <1 10 0x1>; /* Hypervisor PPI */
+               interrupts = <1 13 0xf08>, /* Physical Secure PPI */
+                            <1 14 0xf08>, /* Physical Non-Secure PPI */
+                            <1 11 0xf08>, /* Virtual PPI */
+                            <1 10 0xf08>; /* Hypervisor PPI */
        };
 
        pmu {
                        interrupts = <0 60 0x4>;
                        dr_mode = "host";
                        snps,quirk-frame-length-adjustment = <0x20>;
+                       snps,dis_rxdet_inp3_quirk;
                };
 
                usb1: usb3@3000000 {
                        interrupts = <0 61 0x4>;
                        dr_mode = "host";
                        snps,quirk-frame-length-adjustment = <0x20>;
+                       snps,dis_rxdet_inp3_quirk;
                };
 
                usb2: usb3@3100000 {
                        interrupts = <0 63 0x4>;
                        dr_mode = "host";
                        snps,quirk-frame-length-adjustment = <0x20>;
+                       snps,dis_rxdet_inp3_quirk;
                };
 
                sata: sata@3200000 {
                        #address-cells = <3>;
                        #size-cells = <2>;
                        device_type = "pci";
+                       dma-coherent;
                        num-lanes = <4>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
                        #address-cells = <3>;
                        #size-cells = <2>;
                        device_type = "pci";
+                       dma-coherent;
                        num-lanes = <2>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
                        #address-cells = <3>;
                        #size-cells = <2>;
                        device_type = "pci";
+                       dma-coherent;
                        num-lanes = <2>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */