mm, dax, pmem: introduce {get|put}_dev_pagemap() for dax-gup
[linux-2.6-block.git] / mm / pgtable-generic.c
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1/*
2 * mm/pgtable-generic.c
3 *
4 * Generic pgtable methods declared in asm-generic/pgtable.h
5 *
6 * Copyright (C) 2010 Linus Torvalds
7 */
8
f95ba941 9#include <linux/pagemap.h>
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10#include <asm/tlb.h>
11#include <asm-generic/pgtable.h>
12
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13/*
14 * If a p?d_bad entry is found while walking page tables, report
15 * the error, before resetting entry to p?d_none. Usually (but
16 * very seldom) called out from the p?d_none_or_clear_bad macros.
17 */
18
19void pgd_clear_bad(pgd_t *pgd)
20{
21 pgd_ERROR(*pgd);
22 pgd_clear(pgd);
23}
24
25void pud_clear_bad(pud_t *pud)
26{
27 pud_ERROR(*pud);
28 pud_clear(pud);
29}
30
31void pmd_clear_bad(pmd_t *pmd)
32{
33 pmd_ERROR(*pmd);
34 pmd_clear(pmd);
35}
36
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37#ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
38/*
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39 * Only sets the access flags (dirty, accessed), as well as write
40 * permission. Furthermore, we know it always gets set to a "more
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41 * permissive" setting, which allows most architectures to optimize
42 * this. We return whether the PTE actually changed, which in turn
43 * instructs the caller to do things like update__mmu_cache. This
44 * used to be done in the caller, but sparc needs minor faults to
45 * force that call on sun4c so we changed this macro slightly
46 */
47int ptep_set_access_flags(struct vm_area_struct *vma,
48 unsigned long address, pte_t *ptep,
49 pte_t entry, int dirty)
50{
51 int changed = !pte_same(*ptep, entry);
52 if (changed) {
53 set_pte_at(vma->vm_mm, address, ptep, entry);
cef23d9d 54 flush_tlb_fix_spurious_fault(vma, address);
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55 }
56 return changed;
57}
58#endif
59
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60#ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
61int ptep_clear_flush_young(struct vm_area_struct *vma,
62 unsigned long address, pte_t *ptep)
63{
64 int young;
65 young = ptep_test_and_clear_young(vma, address, ptep);
66 if (young)
67 flush_tlb_page(vma, address);
68 return young;
69}
70#endif
71
72#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
73pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long address,
74 pte_t *ptep)
75{
76 struct mm_struct *mm = (vma)->vm_mm;
77 pte_t pte;
78 pte = ptep_get_and_clear(mm, address, ptep);
79 if (pte_accessible(mm, pte))
80 flush_tlb_page(vma, address);
81 return pte;
82}
83#endif
84
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85#ifdef CONFIG_TRANSPARENT_HUGEPAGE
86
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87#ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
88
89/*
90 * ARCHes with special requirements for evicting THP backing TLB entries can
91 * implement this. Otherwise also, it can help optimize normal TLB flush in
92 * THP regime. stock flush_tlb_range() typically has optimization to nuke the
93 * entire TLB TLB if flush span is greater than a threshhold, which will
94 * likely be true for a single huge page. Thus a single thp flush will
95 * invalidate the entire TLB which is not desitable.
96 * e.g. see arch/arc: flush_pmd_tlb_range
97 */
98#define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
99#endif
100
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101#ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
102int pmdp_set_access_flags(struct vm_area_struct *vma,
103 unsigned long address, pmd_t *pmdp,
104 pmd_t entry, int dirty)
105{
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106 int changed = !pmd_same(*pmdp, entry);
107 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
108 if (changed) {
109 set_pmd_at(vma->vm_mm, address, pmdp, entry);
12ebc158 110 flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
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111 }
112 return changed;
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113}
114#endif
115
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116#ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
117int pmdp_clear_flush_young(struct vm_area_struct *vma,
118 unsigned long address, pmd_t *pmdp)
119{
120 int young;
d8c37c48 121 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
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122 young = pmdp_test_and_clear_young(vma, address, pmdp);
123 if (young)
12ebc158 124 flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
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125 return young;
126}
127#endif
128
8809aa2d 129#ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
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130pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma, unsigned long address,
131 pmd_t *pmdp)
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132{
133 pmd_t pmd;
e2cda322 134 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
f28b6ff8 135 VM_BUG_ON(!pmd_trans_huge(*pmdp));
8809aa2d 136 pmd = pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
12ebc158 137 flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
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138 return pmd;
139}
140#endif
141
e3ebcf64 142#ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
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143void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
144 pgtable_t pgtable)
e3ebcf64 145{
c4088ebd 146 assert_spin_locked(pmd_lockptr(mm, pmdp));
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147
148 /* FIFO */
c389a250 149 if (!pmd_huge_pte(mm, pmdp))
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150 INIT_LIST_HEAD(&pgtable->lru);
151 else
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152 list_add(&pgtable->lru, &pmd_huge_pte(mm, pmdp)->lru);
153 pmd_huge_pte(mm, pmdp) = pgtable;
e3ebcf64 154}
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155#endif
156
157#ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
e3ebcf64 158/* no "address" argument so destroys page coloring of some arch */
6b0b50b0 159pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
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160{
161 pgtable_t pgtable;
162
c4088ebd 163 assert_spin_locked(pmd_lockptr(mm, pmdp));
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164
165 /* FIFO */
c389a250 166 pgtable = pmd_huge_pte(mm, pmdp);
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167 pmd_huge_pte(mm, pmdp) = list_first_entry_or_null(&pgtable->lru,
168 struct page, lru);
169 if (pmd_huge_pte(mm, pmdp))
e3ebcf64 170 list_del(&pgtable->lru);
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171 return pgtable;
172}
e3ebcf64 173#endif
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174
175#ifndef __HAVE_ARCH_PMDP_INVALIDATE
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176void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
177 pmd_t *pmdp)
178{
67f87463 179 pmd_t entry = *pmdp;
ce8369bc 180 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mknotpresent(entry));
12ebc158 181 flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
46dcde73 182}
46dcde73 183#endif
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184
185#ifndef pmdp_collapse_flush
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186pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, unsigned long address,
187 pmd_t *pmdp)
188{
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189 /*
190 * pmd and hugepage pte format are same. So we could
191 * use the same function.
192 */
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193 pmd_t pmd;
194
195 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
196 VM_BUG_ON(pmd_trans_huge(*pmdp));
8809aa2d 197 pmd = pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
12ebc158 198 flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
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199 return pmd;
200}
f28b6ff8 201#endif
bd5e88ad 202#endif /* CONFIG_TRANSPARENT_HUGEPAGE */