NVMe: Only release requested regions
[linux-2.6-block.git] / include / sound / wss.h
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1#ifndef __SOUND_WSS_H
2#define __SOUND_WSS_H
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3
4/*
c1017a4c 5 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
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6 * Definitions for CS4231 & InterWave chips & compatible chips
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
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25#include <sound/control.h>
26#include <sound/pcm.h>
27#include <sound/timer.h>
1da177e4 28
a1ce3928 29#include <sound/cs4231-regs.h>
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30
31/* defines for codec.mode */
32
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33#define WSS_MODE_NONE 0x0000
34#define WSS_MODE_PLAY 0x0001
35#define WSS_MODE_RECORD 0x0002
36#define WSS_MODE_TIMER 0x0004
37#define WSS_MODE_OPEN (WSS_MODE_PLAY|WSS_MODE_RECORD|WSS_MODE_TIMER)
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38
39/* defines for codec.hardware */
40
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41#define WSS_HW_DETECT 0x0000 /* let CS4231 driver detect chip */
42#define WSS_HW_DETECT3 0x0001 /* allow mode 3 */
43#define WSS_HW_TYPE_MASK 0xff00 /* type mask */
44#define WSS_HW_CS4231_MASK 0x0100 /* CS4231 serie */
45#define WSS_HW_CS4231 0x0100 /* CS4231 chip */
46#define WSS_HW_CS4231A 0x0101 /* CS4231A chip */
47#define WSS_HW_AD1845 0x0102 /* AD1845 chip */
48#define WSS_HW_CS4232_MASK 0x0200 /* CS4232 serie (has control ports) */
49#define WSS_HW_CS4232 0x0200 /* CS4232 */
50#define WSS_HW_CS4232A 0x0201 /* CS4232A */
51#define WSS_HW_CS4236 0x0202 /* CS4236 */
52#define WSS_HW_CS4236B_MASK 0x0400 /* CS4236B serie (has extended control regs) */
53#define WSS_HW_CS4235 0x0400 /* CS4235 - Crystal Clear (tm) stereo enhancement */
54#define WSS_HW_CS4236B 0x0401 /* CS4236B */
55#define WSS_HW_CS4237B 0x0402 /* CS4237B - SRS 3D */
56#define WSS_HW_CS4238B 0x0403 /* CS4238B - QSOUND 3D */
57#define WSS_HW_CS4239 0x0404 /* CS4239 - Crystal Clear (tm) stereo enhancement */
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58#define WSS_HW_AD1848_MASK 0x0800 /* AD1848 serie (half duplex) */
59#define WSS_HW_AD1847 0x0801 /* AD1847 chip */
60#define WSS_HW_AD1848 0x0802 /* AD1848 chip */
61#define WSS_HW_CS4248 0x0803 /* CS4248 chip */
62#define WSS_HW_CMI8330 0x0804 /* CMI8330 chip */
63#define WSS_HW_THINKPAD 0x0805 /* Thinkpad 360/750/755 */
1da177e4 64/* compatible, but clones */
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65#define WSS_HW_INTERWAVE 0x1000 /* InterWave chip */
66#define WSS_HW_OPL3SA2 0x1101 /* OPL3-SA2 chip, similar to cs4231 */
67#define WSS_HW_OPTI93X 0x1102 /* Opti 930/931/933 */
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68
69/* defines for codec.hwshare */
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70#define WSS_HWSHARE_IRQ (1<<0)
71#define WSS_HWSHARE_DMA1 (1<<1)
72#define WSS_HWSHARE_DMA2 (1<<2)
1da177e4 73
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74/* IBM Thinkpad specific stuff */
75#define AD1848_THINKPAD_CTL_PORT1 0x15e8
76#define AD1848_THINKPAD_CTL_PORT2 0x15e9
77#define AD1848_THINKPAD_CS4248_ENABLE_BIT 0x02
78
7779f75f 79struct snd_wss {
1da177e4 80 unsigned long port; /* base i/o port */
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81 struct resource *res_port;
82 unsigned long cport; /* control base i/o port (CS4236) */
83 struct resource *res_cport;
84 int irq; /* IRQ line */
85 int dma1; /* playback DMA */
86 int dma2; /* record DMA */
1da177e4 87 unsigned short version; /* version of CODEC chip */
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88 unsigned short mode; /* see to WSS_MODE_XXXX */
89 unsigned short hardware; /* see to WSS_HW_XXXX */
1da177e4 90 unsigned short hwshare; /* shared resources */
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91 unsigned short single_dma:1, /* forced single DMA mode (GUS 16-bit */
92 /* daughter board) or dma1 == dma2 */
93 ebus_flag:1, /* SPARC: EBUS present */
94 thinkpad_flag:1; /* Thinkpad CS4248 needs extra help */
1da177e4 95
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96 struct snd_card *card;
97 struct snd_pcm *pcm;
98 struct snd_pcm_substream *playback_substream;
99 struct snd_pcm_substream *capture_substream;
100 struct snd_timer *timer;
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101
102 unsigned char image[32]; /* registers image */
103 unsigned char eimage[32]; /* extended registers image */
104 unsigned char cimage[16]; /* control registers image */
105 int mce_bit;
106 int calibrate_mute;
107 int sw_3d_bit;
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108 unsigned int p_dma_size;
109 unsigned int c_dma_size;
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110
111 spinlock_t reg_lock;
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112 struct mutex mce_mutex;
113 struct mutex open_mutex;
1da177e4 114
ba2375a4 115 int (*rate_constraint) (struct snd_pcm_runtime *runtime);
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116 void (*set_playback_format) (struct snd_wss *chip,
117 struct snd_pcm_hw_params *hw_params,
118 unsigned char pdfr);
119 void (*set_capture_format) (struct snd_wss *chip,
120 struct snd_pcm_hw_params *hw_params,
121 unsigned char cdfr);
122 void (*trigger) (struct snd_wss *chip, unsigned int what, int start);
1da177e4 123#ifdef CONFIG_PM
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124 void (*suspend) (struct snd_wss *chip);
125 void (*resume) (struct snd_wss *chip);
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126#endif
127 void *dma_private_data;
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128 int (*claim_dma) (struct snd_wss *chip,
129 void *dma_private_data, int dma);
130 int (*release_dma) (struct snd_wss *chip,
131 void *dma_private_data, int dma);
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132};
133
134/* exported functions */
135
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136void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char val);
137unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg);
138void snd_cs4236_ext_out(struct snd_wss *chip,
139 unsigned char reg, unsigned char val);
140unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg);
141void snd_wss_mce_up(struct snd_wss *chip);
142void snd_wss_mce_down(struct snd_wss *chip);
1da177e4 143
7779f75f 144void snd_wss_overrange(struct snd_wss *chip);
abf1f5aa 145
7779f75f 146irqreturn_t snd_wss_interrupt(int irq, void *dev_id);
1da177e4 147
7779f75f 148const char *snd_wss_chip_id(struct snd_wss *chip);
1da177e4 149
7779f75f 150int snd_wss_create(struct snd_card *card,
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151 unsigned long port,
152 unsigned long cport,
153 int irq, int dma1, int dma2,
154 unsigned short hardware,
155 unsigned short hwshare,
7779f75f 156 struct snd_wss **rchip);
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157int snd_wss_pcm(struct snd_wss *chip, int device);
158int snd_wss_timer(struct snd_wss *chip, int device);
7779f75f 159int snd_wss_mixer(struct snd_wss *chip);
1da177e4 160
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161const struct snd_pcm_ops *snd_wss_get_pcm_ops(int direction);
162
ba2375a4 163int snd_cs4236_create(struct snd_card *card,
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164 unsigned long port,
165 unsigned long cport,
166 int irq, int dma1, int dma2,
167 unsigned short hardware,
168 unsigned short hwshare,
7779f75f 169 struct snd_wss **rchip);
fa60c065 170int snd_cs4236_pcm(struct snd_wss *chip, int device);
7779f75f 171int snd_cs4236_mixer(struct snd_wss *chip);
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172
173/*
174 * mixer library
175 */
176
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177#define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \
178{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
179 .name = xname, \
180 .index = xindex, \
181 .info = snd_wss_info_single, \
182 .get = snd_wss_get_single, \
183 .put = snd_wss_put_single, \
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184 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
185
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186int snd_wss_info_single(struct snd_kcontrol *kcontrol,
187 struct snd_ctl_elem_info *uinfo);
188int snd_wss_get_single(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol);
190int snd_wss_put_single(struct snd_kcontrol *kcontrol,
191 struct snd_ctl_elem_value *ucontrol);
192
193#define WSS_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
194{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
195 .name = xname, \
196 .index = xindex, \
197 .info = snd_wss_info_double, \
198 .get = snd_wss_get_double, \
199 .put = snd_wss_put_double, \
200 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
201 (shift_right << 19) | (mask << 24) | (invert << 22) }
202
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203#define WSS_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
204{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
205 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
206 .name = xname, \
207 .index = xindex, \
208 .info = snd_wss_info_single, \
209 .get = snd_wss_get_single, \
210 .put = snd_wss_put_single, \
211 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
212 .tlv = { .p = (xtlv) } }
213
214#define WSS_DOUBLE_TLV(xname, xindex, left_reg, right_reg, \
215 shift_left, shift_right, mask, invert, xtlv) \
216{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
217 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
218 .name = xname, \
219 .index = xindex, \
220 .info = snd_wss_info_double, \
221 .get = snd_wss_get_double, \
222 .put = snd_wss_put_double, \
223 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
224 (shift_right << 19) | (mask << 24) | (invert << 22), \
225 .tlv = { .p = (xtlv) } }
226
227
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228int snd_wss_info_double(struct snd_kcontrol *kcontrol,
229 struct snd_ctl_elem_info *uinfo);
230int snd_wss_get_double(struct snd_kcontrol *kcontrol,
231 struct snd_ctl_elem_value *ucontrol);
232int snd_wss_put_double(struct snd_kcontrol *kcontrol,
233 struct snd_ctl_elem_value *ucontrol);
234
235#endif /* __SOUND_WSS_H */