[linux-2.6-block.git] / drivers / xen / events / events_2l.c

/*
 * Xen event channels (2-level ABI)
 *
 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
 */

#define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt

#include <linux/linkage.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>

#include <asm/sync_bitops.h>
#include <asm/xen/hypercall.h>
#include <asm/xen/hypervisor.h>

#include <xen/xen.h>
#include <xen/xen-ops.h>
#include <xen/events.h>
#include <xen/interface/xen.h>
#include <xen/interface/event_channel.h>

#include "events_internal.h"

/*
 * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
 * careful to only use bitops which allow for this (e.g
 * test_bit/find_first_bit and friends but not __ffs) and to pass
 * BITS_PER_EVTCHN_WORD as the bitmask length.
 */
#define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
/*
 * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
 * array. Primarily to avoid long lines (hence the terse name).
 */
#define BM(x) (unsigned long *)(x)
/* Find the first set bit in a evtchn mask */
#define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)

static DEFINE_PER_CPU(xen_ulong_t [EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD],
		      cpu_evtchn_mask);

static unsigned evtchn_2l_max_channels(void)
{
	return EVTCHN_2L_NR_CHANNELS;
}

static void evtchn_2l_bind_to_cpu(struct irq_info *info, unsigned cpu)
{
	clear_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, info->cpu)));
	set_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, cpu)));
}

static void evtchn_2l_clear_pending(unsigned port)
{
	struct shared_info *s = HYPERVISOR_shared_info;
	sync_clear_bit(port, BM(&s->evtchn_pending[0]));
}

static void evtchn_2l_set_pending(unsigned port)
{
	struct shared_info *s = HYPERVISOR_shared_info;
	sync_set_bit(port, BM(&s->evtchn_pending[0]));
}

static bool evtchn_2l_is_pending(unsigned port)
{
	struct shared_info *s = HYPERVISOR_shared_info;
	return sync_test_bit(port, BM(&s->evtchn_pending[0]));
}

static bool evtchn_2l_test_and_set_mask(unsigned port)
{
	struct shared_info *s = HYPERVISOR_shared_info;
	return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0]));
}

static void evtchn_2l_mask(unsigned port)
{
	struct shared_info *s = HYPERVISOR_shared_info;
	sync_set_bit(port, BM(&s->evtchn_mask[0]));
}

static void evtchn_2l_unmask(unsigned port)
{
	struct shared_info *s = HYPERVISOR_shared_info;
	unsigned int cpu = get_cpu();
	int do_hypercall = 0, evtchn_pending = 0;

	BUG_ON(!irqs_disabled());

	if (unlikely((cpu != cpu_from_evtchn(port))))
		do_hypercall = 1;
	else {
		/*
		 * Need to clear the mask before checking pending to
		 * avoid a race with an event becoming pending.
		 *
		 * EVTCHNOP_unmask will only trigger an upcall if the
		 * mask bit was set, so if a hypercall is needed
		 * remask the event.
		 */
		sync_clear_bit(port, BM(&s->evtchn_mask[0]));
		evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));

		if (unlikely(evtchn_pending && xen_hvm_domain())) {
			sync_set_bit(port, BM(&s->evtchn_mask[0]));
			do_hypercall = 1;
		}
	}

	/* Slow path (hypercall) if this is a non-local port or if this is
	 * an hvm domain and an event is pending (hvm domains don't have
	 * their own implementation of irq_enable). */
	if (do_hypercall) {
		struct evtchn_unmask unmask = { .port = port };
		(void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
	} else {
		struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);

		/*
		 * The following is basically the equivalent of
		 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
		 * the interrupt edge' if the channel is masked.
		 */
		if (evtchn_pending &&
		    !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
					   BM(&vcpu_info->evtchn_pending_sel)))
			vcpu_info->evtchn_upcall_pending = 1;
	}

	put_cpu();
}

static DEFINE_PER_CPU(unsigned int, current_word_idx);
static DEFINE_PER_CPU(unsigned int, current_bit_idx);

/*
 * Mask out the i least significant bits of w
 */
#define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))

static inline xen_ulong_t active_evtchns(unsigned int cpu,
					 struct shared_info *sh,
					 unsigned int idx)
{
	return sh->evtchn_pending[idx] &
		per_cpu(cpu_evtchn_mask, cpu)[idx] &
		~sh->evtchn_mask[idx];
}

/*
 * Search the CPU's pending events bitmasks.  For each one found, map
 * the event number to an irq, and feed it into do_IRQ() for handling.
 *
 * Xen uses a two-level bitmap to speed searching.  The first level is
 * a bitset of words which contain pending event bits.  The second
 * level is a bitset of pending events themselves.
 */
static void evtchn_2l_handle_events(unsigned cpu)
{
	int irq;
	xen_ulong_t pending_words;
	xen_ulong_t pending_bits;
	int start_word_idx, start_bit_idx;
	int word_idx, bit_idx;
	int i;
	struct shared_info *s = HYPERVISOR_shared_info;
	struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);

	/* Timer interrupt has highest priority. */
	irq = irq_from_virq(cpu, VIRQ_TIMER);
	if (irq != -1) {
		unsigned int evtchn = evtchn_from_irq(irq);
		word_idx = evtchn / BITS_PER_LONG;
		bit_idx = evtchn % BITS_PER_LONG;
		if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx))
			generic_handle_irq(irq);
	}

	/*
	 * Master flag must be cleared /before/ clearing
	 * selector flag. xchg_xen_ulong must contain an
	 * appropriate barrier.
	 */
	pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);

	start_word_idx = __this_cpu_read(current_word_idx);
	start_bit_idx = __this_cpu_read(current_bit_idx);

	word_idx = start_word_idx;

	for (i = 0; pending_words != 0; i++) {
		xen_ulong_t words;

		words = MASK_LSBS(pending_words, word_idx);

		/*
		 * If we masked out all events, wrap to beginning.
		 */
		if (words == 0) {
			word_idx = 0;
			bit_idx = 0;
			continue;
		}
		word_idx = EVTCHN_FIRST_BIT(words);

		pending_bits = active_evtchns(cpu, s, word_idx);
		bit_idx = 0; /* usually scan entire word from start */
		/*
		 * We scan the starting word in two parts.
		 *
		 * 1st time: start in the middle, scanning the
		 * upper bits.
		 *
		 * 2nd time: scan the whole word (not just the
		 * parts skipped in the first pass) -- if an
		 * event in the previously scanned bits is
		 * pending again it would just be scanned on
		 * the next loop anyway.
		 */
		if (word_idx == start_word_idx) {
			if (i == 0)
				bit_idx = start_bit_idx;
		}

		do {
			xen_ulong_t bits;
			int port;

			bits = MASK_LSBS(pending_bits, bit_idx);

			/* If we masked out all events, move on. */
			if (bits == 0)
				break;

			bit_idx = EVTCHN_FIRST_BIT(bits);

			/* Process port. */
			port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
			irq = get_evtchn_to_irq(port);

			if (irq != -1)
				generic_handle_irq(irq);

			bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;

			/* Next caller starts at last processed + 1 */
			__this_cpu_write(current_word_idx,
					 bit_idx ? word_idx :
					 (word_idx+1) % BITS_PER_EVTCHN_WORD);
			__this_cpu_write(current_bit_idx, bit_idx);
		} while (bit_idx != 0);

		/* Scan start_l1i twice; all others once. */
		if ((word_idx != start_word_idx) || (i != 0))
			pending_words &= ~(1UL << word_idx);

		word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
	}
}

irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
{
	struct shared_info *sh = HYPERVISOR_shared_info;
	int cpu = smp_processor_id();
	xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
	int i;
	unsigned long flags;
	static DEFINE_SPINLOCK(debug_lock);
	struct vcpu_info *v;

	spin_lock_irqsave(&debug_lock, flags);

	printk("\nvcpu %d\n  ", cpu);

	for_each_online_cpu(i) {
		int pending;
		v = per_cpu(xen_vcpu, i);
		pending = (get_irq_regs() && i == cpu)
			? xen_irqs_disabled(get_irq_regs())
			: v->evtchn_upcall_mask;
		printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n  ", i,
		       pending, v->evtchn_upcall_pending,
		       (int)(sizeof(v->evtchn_pending_sel)*2),
		       v->evtchn_pending_sel);
	}
	v = per_cpu(xen_vcpu, cpu);

	printk("\npending:\n   ");
	for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
		printk("%0*"PRI_xen_ulong"%s",
		       (int)sizeof(sh->evtchn_pending[0])*2,
		       sh->evtchn_pending[i],
		       i % 8 == 0 ? "\n   " : " ");
	printk("\nglobal mask:\n   ");
	for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
		printk("%0*"PRI_xen_ulong"%s",
		       (int)(sizeof(sh->evtchn_mask[0])*2),
		       sh->evtchn_mask[i],
		       i % 8 == 0 ? "\n   " : " ");

	printk("\nglobally unmasked:\n   ");
	for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
		printk("%0*"PRI_xen_ulong"%s",
		       (int)(sizeof(sh->evtchn_mask[0])*2),
		       sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
		       i % 8 == 0 ? "\n   " : " ");

	printk("\nlocal cpu%d mask:\n   ", cpu);
	for (i = (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
		printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
		       cpu_evtchn[i],
		       i % 8 == 0 ? "\n   " : " ");

	printk("\nlocally unmasked:\n   ");
	for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
		xen_ulong_t pending = sh->evtchn_pending[i]
			& ~sh->evtchn_mask[i]
			& cpu_evtchn[i];
		printk("%0*"PRI_xen_ulong"%s",
		       (int)(sizeof(sh->evtchn_mask[0])*2),
		       pending, i % 8 == 0 ? "\n   " : " ");
	}

	printk("\npending list:\n");
	for (i = 0; i < EVTCHN_2L_NR_CHANNELS; i++) {
		if (sync_test_bit(i, BM(sh->evtchn_pending))) {
			int word_idx = i / BITS_PER_EVTCHN_WORD;
			printk("  %d: event %d -> irq %d%s%s%s\n",
			       cpu_from_evtchn(i), i,
			       get_evtchn_to_irq(i),
			       sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
			       ? "" : " l2-clear",
			       !sync_test_bit(i, BM(sh->evtchn_mask))
			       ? "" : " globally-masked",
			       sync_test_bit(i, BM(cpu_evtchn))
			       ? "" : " locally-masked");
		}
	}

	spin_unlock_irqrestore(&debug_lock, flags);

	return IRQ_HANDLED;
}

static void evtchn_2l_resume(void)
{
	int i;

	for_each_online_cpu(i)
		memset(per_cpu(cpu_evtchn_mask, i), 0, sizeof(xen_ulong_t) *
				EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD);
}

static const struct evtchn_ops evtchn_ops_2l = {
	.max_channels      = evtchn_2l_max_channels,
	.nr_channels       = evtchn_2l_max_channels,
	.bind_to_cpu       = evtchn_2l_bind_to_cpu,
	.clear_pending     = evtchn_2l_clear_pending,
	.set_pending       = evtchn_2l_set_pending,
	.is_pending        = evtchn_2l_is_pending,
	.test_and_set_mask = evtchn_2l_test_and_set_mask,
	.mask              = evtchn_2l_mask,
	.unmask            = evtchn_2l_unmask,
	.handle_events     = evtchn_2l_handle_events,
	.resume	           = evtchn_2l_resume,
};

void __init xen_evtchn_2l_init(void)
{
	pr_info("Using 2-level ABI\n");
	evtchn_ops = &evtchn_ops_2l;
}
Commit	Line	Data
9a489f45 DV	1	/*
	2	* Xen event channels (2-level ABI)
	3	*
	4	* Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
	5	*/
	6
	7	#define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
	8
	9	#include <linux/linkage.h>
	10	#include <linux/interrupt.h>
	11	#include <linux/irq.h>
	12	#include <linux/module.h>
	13
	14	#include <asm/sync_bitops.h>
	15	#include <asm/xen/hypercall.h>
	16	#include <asm/xen/hypervisor.h>
	17
	18	#include <xen/xen.h>
	19	#include <xen/xen-ops.h>
	20	#include <xen/events.h>
	21	#include <xen/interface/xen.h>
	22	#include <xen/interface/event_channel.h>
	23
	24	#include "events_internal.h"
	25
	26	/*
	27	* Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
	28	* careful to only use bitops which allow for this (e.g
	29	* test_bit/find_first_bit and friends but not __ffs) and to pass
	30	* BITS_PER_EVTCHN_WORD as the bitmask length.
	31	*/
	32	#define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
	33	/*
	34	* Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
	35	* array. Primarily to avoid long lines (hence the terse name).
	36	*/
	37	#define BM(x) (unsigned long *)(x)
	38	/* Find the first set bit in a evtchn mask */
	39	#define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
	40
bf2bbe07	41	static DEFINE_PER_CPU(xen_ulong_t [EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD],
9a489f45 DV	42	cpu_evtchn_mask);
9a489f45 DV	43
d0b075ff DV	44	static unsigned evtchn_2l_max_channels(void)
d0b075ff DV	45	{
bf2bbe07	46	return EVTCHN_2L_NR_CHANNELS;
d0b075ff DV	47	}
d0b075ff DV	48
ab9a1cca	49	static void evtchn_2l_bind_to_cpu(struct irq_info *info, unsigned cpu)
9a489f45 DV	50	{
	51	clear_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, info->cpu)));
	52	set_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, cpu)));
	53	}
	54
ab9a1cca	55	static void evtchn_2l_clear_pending(unsigned port)
9a489f45 DV	56	{
	57	struct shared_info *s = HYPERVISOR_shared_info;
	58	sync_clear_bit(port, BM(&s->evtchn_pending[0]));
	59	}
	60
ab9a1cca	61	static void evtchn_2l_set_pending(unsigned port)
9a489f45 DV	62	{
	63	struct shared_info *s = HYPERVISOR_shared_info;
	64	sync_set_bit(port, BM(&s->evtchn_pending[0]));
	65	}
	66
ab9a1cca	67	static bool evtchn_2l_is_pending(unsigned port)
9a489f45 DV	68	{
	69	struct shared_info *s = HYPERVISOR_shared_info;
	70	return sync_test_bit(port, BM(&s->evtchn_pending[0]));
	71	}
	72
ab9a1cca	73	static bool evtchn_2l_test_and_set_mask(unsigned port)
9a489f45 DV	74	{
	75	struct shared_info *s = HYPERVISOR_shared_info;
	76	return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0]));
	77	}
	78
ab9a1cca	79	static void evtchn_2l_mask(unsigned port)
9a489f45 DV	80	{
	81	struct shared_info *s = HYPERVISOR_shared_info;
	82	sync_set_bit(port, BM(&s->evtchn_mask[0]));
	83	}
	84
ab9a1cca	85	static void evtchn_2l_unmask(unsigned port)
9a489f45 DV	86	{
	87	struct shared_info *s = HYPERVISOR_shared_info;
	88	unsigned int cpu = get_cpu();
	89	int do_hypercall = 0, evtchn_pending = 0;
	90
	91	BUG_ON(!irqs_disabled());
	92
	93	if (unlikely((cpu != cpu_from_evtchn(port))))
	94	do_hypercall = 1;
	95	else {
	96	/*
	97	* Need to clear the mask before checking pending to
	98	* avoid a race with an event becoming pending.
	99	*
	100	* EVTCHNOP_unmask will only trigger an upcall if the
	101	* mask bit was set, so if a hypercall is needed
	102	* remask the event.
	103	*/
	104	sync_clear_bit(port, BM(&s->evtchn_mask[0]));
	105	evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
	106
	107	if (unlikely(evtchn_pending && xen_hvm_domain())) {
	108	sync_set_bit(port, BM(&s->evtchn_mask[0]));
	109	do_hypercall = 1;
	110	}
	111	}
	112
	113	/* Slow path (hypercall) if this is a non-local port or if this is
	114	* an hvm domain and an event is pending (hvm domains don't have
	115	* their own implementation of irq_enable). */
	116	if (do_hypercall) {
	117	struct evtchn_unmask unmask = { .port = port };
	118	(void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
	119	} else {
	120	struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
	121
	122	/*
	123	* The following is basically the equivalent of
	124	* 'hw_resend_irq'. Just like a real IO-APIC we 'lose
	125	* the interrupt edge' if the channel is masked.
	126	*/
	127	if (evtchn_pending &&
	128	!sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
	129	BM(&vcpu_info->evtchn_pending_sel)))
	130	vcpu_info->evtchn_upcall_pending = 1;
	131	}
	132
	133	put_cpu();
	134	}
	135
	136	static DEFINE_PER_CPU(unsigned int, current_word_idx);
	137	static DEFINE_PER_CPU(unsigned int, current_bit_idx);
	138
	139	/*
	140	* Mask out the i least significant bits of w
	141	*/
	142	#define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
	143
	144	static inline xen_ulong_t active_evtchns(unsigned int cpu,
	145	struct shared_info *sh,
	146	unsigned int idx)
	147	{
	148	return sh->evtchn_pending[idx] &
	149	per_cpu(cpu_evtchn_mask, cpu)[idx] &
150	~sh->evtchn_mask[idx];
151	}
152
153	/*
154	* Search the CPU's pending events bitmasks. For each one found, map
155	* the event number to an irq, and feed it into do_IRQ() for handling.
156	*
157	* Xen uses a two-level bitmap to speed searching. The first level is
158	* a bitset of words which contain pending event bits. The second
159	* level is a bitset of pending events themselves.
160	*/
ab9a1cca	161	static void evtchn_2l_handle_events(unsigned cpu)
9a489f45 DV	162	{
	163	int irq;
	164	xen_ulong_t pending_words;
	165	xen_ulong_t pending_bits;
	166	int start_word_idx, start_bit_idx;
	167	int word_idx, bit_idx;
	168	int i;
9a489f45 DV	169	struct shared_info *s = HYPERVISOR_shared_info;
	170	struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
	171
	172	/* Timer interrupt has highest priority. */
	173	irq = irq_from_virq(cpu, VIRQ_TIMER);
	174	if (irq != -1) {
	175	unsigned int evtchn = evtchn_from_irq(irq);
	176	word_idx = evtchn / BITS_PER_LONG;
	177	bit_idx = evtchn % BITS_PER_LONG;
589d03e9 TG	178	if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx))
589d03e9 TG	179	generic_handle_irq(irq);
9a489f45 DV	180	}
	181
	182	/*
	183	* Master flag must be cleared /before/ clearing
	184	* selector flag. xchg_xen_ulong must contain an
	185	* appropriate barrier.
	186	*/
	187	pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
	188
	189	start_word_idx = __this_cpu_read(current_word_idx);
	190	start_bit_idx = __this_cpu_read(current_bit_idx);
	191
	192	word_idx = start_word_idx;
	193
	194	for (i = 0; pending_words != 0; i++) {
	195	xen_ulong_t words;
	196
	197	words = MASK_LSBS(pending_words, word_idx);
	198
	199	/*
	200	* If we masked out all events, wrap to beginning.
	201	*/
	202	if (words == 0) {
	203	word_idx = 0;
	204	bit_idx = 0;
	205	continue;
	206	}
	207	word_idx = EVTCHN_FIRST_BIT(words);
	208
	209	pending_bits = active_evtchns(cpu, s, word_idx);
	210	bit_idx = 0; /* usually scan entire word from start */
	211	/*
	212	* We scan the starting word in two parts.
	213	*
	214	* 1st time: start in the middle, scanning the
	215	* upper bits.
	216	*
	217	* 2nd time: scan the whole word (not just the
	218	* parts skipped in the first pass) -- if an
	219	* event in the previously scanned bits is
	220	* pending again it would just be scanned on
	221	* the next loop anyway.
	222	*/
	223	if (word_idx == start_word_idx) {
	224	if (i == 0)
	225	bit_idx = start_bit_idx;
	226	}
	227
	228	do {
	229	xen_ulong_t bits;
	230	int port;
	231
	232	bits = MASK_LSBS(pending_bits, bit_idx);
	233
	234	/* If we masked out all events, move on. */
	235	if (bits == 0)
	236	break;
	237
	238	bit_idx = EVTCHN_FIRST_BIT(bits);
	239
	240	/* Process port. */
	241	port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
d0b075ff	242	irq = get_evtchn_to_irq(port);
9a489f45	243
589d03e9 TG	244	if (irq != -1)
589d03e9 TG	245	generic_handle_irq(irq);
9a489f45 DV	246
	247	bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
	248
	249	/* Next caller starts at last processed + 1 */
	250	__this_cpu_write(current_word_idx,
	251	bit_idx ? word_idx :
	252	(word_idx+1) % BITS_PER_EVTCHN_WORD);
	253	__this_cpu_write(current_bit_idx, bit_idx);
	254	} while (bit_idx != 0);
	255
	256	/* Scan start_l1i twice; all others once. */
	257	if ((word_idx != start_word_idx) \|\| (i != 0))
	258	pending_words &= ~(1UL << word_idx);
	259
	260	word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
	261	}
	262	}
	263
	264	irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
	265	{
	266	struct shared_info *sh = HYPERVISOR_shared_info;
	267	int cpu = smp_processor_id();
	268	xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
	269	int i;
	270	unsigned long flags;
	271	static DEFINE_SPINLOCK(debug_lock);
	272	struct vcpu_info *v;
	273
	274	spin_lock_irqsave(&debug_lock, flags);
	275
	276	printk("\nvcpu %d\n ", cpu);
	277
	278	for_each_online_cpu(i) {
	279	int pending;
	280	v = per_cpu(xen_vcpu, i);
	281	pending = (get_irq_regs() && i == cpu)
	282	? xen_irqs_disabled(get_irq_regs())
	283	: v->evtchn_upcall_mask;
	284	printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i,
	285	pending, v->evtchn_upcall_pending,
	286	(int)(sizeof(v->evtchn_pending_sel)*2),
	287	v->evtchn_pending_sel);
	288	}
	289	v = per_cpu(xen_vcpu, cpu);
	290
	291	printk("\npending:\n ");
	292	for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
	293	printk("%0*"PRI_xen_ulong"%s",
	294	(int)sizeof(sh->evtchn_pending[0])*2,
	295	sh->evtchn_pending[i],
	296	i % 8 == 0 ? "\n " : " ");
	297	printk("\nglobal mask:\n ");
	298	for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
	299	printk("%0*"PRI_xen_ulong"%s",
	300	(int)(sizeof(sh->evtchn_mask[0])*2),
	301	sh->evtchn_mask[i],
	302	i % 8 == 0 ? "\n " : " ");
	303
	304	printk("\nglobally unmasked:\n ");
	305	for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
	306	printk("%0*"PRI_xen_ulong"%s",
	307	(int)(sizeof(sh->evtchn_mask[0])*2),
	308	sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
	309	i % 8 == 0 ? "\n " : " ");
310
311	printk("\nlocal cpu%d mask:\n ", cpu);
bf2bbe07	312	for (i = (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
9a489f45 DV	313	printk("%0"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])2),
	314	cpu_evtchn[i],
	315	i % 8 == 0 ? "\n " : " ");
	316
	317	printk("\nlocally unmasked:\n ");
	318	for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
	319	xen_ulong_t pending = sh->evtchn_pending[i]
	320	& ~sh->evtchn_mask[i]
	321	& cpu_evtchn[i];
	322	printk("%0*"PRI_xen_ulong"%s",
	323	(int)(sizeof(sh->evtchn_mask[0])*2),
	324	pending, i % 8 == 0 ? "\n " : " ");
	325	}
	326
	327	printk("\npending list:\n");
bf2bbe07	328	for (i = 0; i < EVTCHN_2L_NR_CHANNELS; i++) {
9a489f45 DV	329	if (sync_test_bit(i, BM(sh->evtchn_pending))) {
	330	int word_idx = i / BITS_PER_EVTCHN_WORD;
	331	printk(" %d: event %d -> irq %d%s%s%s\n",
	332	cpu_from_evtchn(i), i,
d0b075ff	333	get_evtchn_to_irq(i),
9a489f45 DV	334	sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
	335	? "" : " l2-clear",
	336	!sync_test_bit(i, BM(sh->evtchn_mask))
	337	? "" : " globally-masked",
	338	sync_test_bit(i, BM(cpu_evtchn))
	339	? "" : " locally-masked");
	340	}
	341	}
	342
	343	spin_unlock_irqrestore(&debug_lock, flags);
	344
	345	return IRQ_HANDLED;
	346	}
ab9a1cca	347
5cec9883 BO	348	static void evtchn_2l_resume(void)
	349	{
	350	int i;
	351
	352	for_each_online_cpu(i)
	353	memset(per_cpu(cpu_evtchn_mask, i), 0, sizeof(xen_ulong_t) *
	354	EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD);
	355	}
	356
ab9a1cca	357	static const struct evtchn_ops evtchn_ops_2l = {
d0b075ff DV	358	.max_channels = evtchn_2l_max_channels,
d0b075ff DV	359	.nr_channels = evtchn_2l_max_channels,
ab9a1cca DV	360	.bind_to_cpu = evtchn_2l_bind_to_cpu,
	361	.clear_pending = evtchn_2l_clear_pending,
	362	.set_pending = evtchn_2l_set_pending,
	363	.is_pending = evtchn_2l_is_pending,
	364	.test_and_set_mask = evtchn_2l_test_and_set_mask,
	365	.mask = evtchn_2l_mask,
	366	.unmask = evtchn_2l_unmask,
	367	.handle_events = evtchn_2l_handle_events,
5cec9883	368	.resume = evtchn_2l_resume,
ab9a1cca DV	369	};
	370
	371	void __init xen_evtchn_2l_init(void)
	372	{
	373	pr_info("Using 2-level ABI\n");
	374	evtchn_ops = &evtchn_ops_2l;
	375	}