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USB: UDC: net2280: Remove redundant "if" condition
[linux-2.6-block.git] / drivers / usb / gadget / udc / net2280.c
CommitLineData
5fd54ace 1// SPDX-License-Identifier: GPL-2.0+
1da177e4
LT		 2/*
3 * Driver for the PLX NET2280 USB device controller.
4 * Specs and errata are available from <http://www.plxtech.com>.
5 *
901b3d75 6 * PLX Technology Inc. (formerly NetChip Technology) supported the
1da177e4
LT		 7 * development of this driver.
8 *
9 *
10 * CODE STATUS HIGHLIGHTS
11 *
12 * This driver should work well with most "gadget" drivers, including
fa06920a 13 * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers
1da177e4
LT		 14 * as well as Gadget Zero and Gadgetfs.
15 *
90664198 16 * DMA is enabled by default.
1da177e4 17 *
adc82f77
RRD		 18 * MSI is enabled by default. The legacy IRQ is used if MSI couldn't
19 * be enabled.
20 *
1da177e4
LT		 21 * Note that almost all the errata workarounds here are only needed for
22 * rev1 chips. Rev1a silicon (0110) fixes almost all of them.
23 */
24
25/*
26 * Copyright (C) 2003 David Brownell
27 * Copyright (C) 2003-2005 PLX Technology, Inc.
adc82f77 28 * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
1da177e4 29 *
901b3d75
DB		 30 * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility
31 * with 2282 chip
950ee4c8 32 *
adc82f77
RRD		 33 * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
34 * with usb 338x chip. Based on PLX driver
1da177e4
LT		 35 */
36
1da177e4
LT		 37#include <linux/module.h>
38#include <linux/pci.h>
682d4c80 39#include <linux/dma-mapping.h>
1da177e4
LT		 40#include <linux/kernel.h>
41#include <linux/delay.h>
42#include <linux/ioport.h>
1da177e4 43#include <linux/slab.h>
1da177e4
LT		 44#include <linux/errno.h>
45#include <linux/init.h>
46#include <linux/timer.h>
47#include <linux/list.h>
48#include <linux/interrupt.h>
49#include <linux/moduleparam.h>
50#include <linux/device.h>
5f848137 51#include <linux/usb/ch9.h>
9454a57a 52#include <linux/usb/gadget.h>
b38b03b3 53#include <linux/prefetch.h>
fae3c158 54#include <linux/io.h>
1da177e4
LT		 55
56#include <asm/byteorder.h>
1da177e4 57#include <asm/irq.h>
1da177e4
LT		 58#include <asm/unaligned.h>
59
adc82f77
RRD		 60#define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller"
61#define DRIVER_VERSION "2005 Sept 27/v3.0"
1da177e4 62
1da177e4
LT		 63#define EP_DONTUSE 13 /* nonzero */
64
65#define USE_RDK_LEDS /* GPIO pins control three LEDs */
66
67
fae3c158
RRD		 68static const char driver_name[] = "net2280";
69static const char driver_desc[] = DRIVER_DESC;
1da177e4 70
adc82f77 71static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 };
fae3c158 72static const char ep0name[] = "ep0";
1da177e4 73
c23c3c3c
RB		 74#define EP_INFO(_name, _caps) \
75 { \
76 .name = _name, \
77 .caps = _caps, \
78 }
79
80static const struct {
81 const char *name;
82 const struct usb_ep_caps caps;
83} ep_info_dft[] = { /* Default endpoint configuration */
84 EP_INFO(ep0name,
85 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
86 EP_INFO("ep-a",
87 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
88 EP_INFO("ep-b",
89 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
90 EP_INFO("ep-c",
91 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
92 EP_INFO("ep-d",
93 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
94 EP_INFO("ep-e",
95 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
96 EP_INFO("ep-f",
97 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
98 EP_INFO("ep-g",
99 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
100 EP_INFO("ep-h",
101 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
102}, ep_info_adv[] = { /* Endpoints for usb3380 advance mode */
103 EP_INFO(ep0name,
104 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
105 EP_INFO("ep1in",
106 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
107 EP_INFO("ep2out",
108 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
109 EP_INFO("ep3in",
110 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
111 EP_INFO("ep4out",
112 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
113 EP_INFO("ep1out",
114 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
115 EP_INFO("ep2in",
116 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
117 EP_INFO("ep3out",
118 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
119 EP_INFO("ep4in",
120 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
a285f40d
MYK		 121};
122
c23c3c3c
RB		 123#undef EP_INFO
124
1da177e4
LT		 125/* mode 0 == ep-{a,b,c,d} 1K fifo each
126 * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
127 * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
128 */
fae3c158 129static ushort fifo_mode;
1da177e4
LT		 130
131/* "modprobe net2280 fifo_mode=1" etc */
ae8e530a 132module_param(fifo_mode, ushort, 0644);
1da177e4
LT		 133
134/* enable_suspend -- When enabled, the driver will respond to
135 * USB suspend requests by powering down the NET2280. Otherwise,
25985edc 136 * USB suspend requests will be ignored. This is acceptable for
950ee4c8 137 * self-powered devices
1da177e4 138 */
00d4db0e 139static bool enable_suspend;
1da177e4
LT		 140
141/* "modprobe net2280 enable_suspend=1" etc */
ae8e530a 142module_param(enable_suspend, bool, 0444);
1da177e4 143
1da177e4
LT		 144#define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out")
145
fae3c158 146static char *type_string(u8 bmAttributes)
1da177e4
LT		 147{
148 switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
149 case USB_ENDPOINT_XFER_BULK: return "bulk";
150 case USB_ENDPOINT_XFER_ISOC: return "iso";
151 case USB_ENDPOINT_XFER_INT: return "intr";
2b84f92b 152 }
1da177e4
LT		 153 return "control";
154}
1da177e4
LT		 155
156#include "net2280.h"
157
3e76fdcb
RRD		 158#define valid_bit cpu_to_le32(BIT(VALID_BIT))
159#define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE))
1da177e4 160
e6ac4bb0 161static void ep_clear_seqnum(struct net2280_ep *ep);
11bece5e
MYK		 162static void stop_activity(struct net2280 *dev,
163 struct usb_gadget_driver *driver);
164static void ep0_start(struct net2280 *dev);
e6ac4bb0 165
1da177e4 166/*-------------------------------------------------------------------------*/
adc82f77
RRD		 167static inline void enable_pciirqenb(struct net2280_ep *ep)
168{
169 u32 tmp = readl(&ep->dev->regs->pciirqenb0);
170
2eeb0016 171 if (ep->dev->quirks & PLX_LEGACY)
3e76fdcb 172 tmp |= BIT(ep->num);
adc82f77 173 else
3e76fdcb 174 tmp |= BIT(ep_bit[ep->num]);
adc82f77
RRD		 175 writel(tmp, &ep->dev->regs->pciirqenb0);
176
177 return;
178}
1da177e4
LT		 179
180static int
fae3c158 181net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
1da177e4
LT		 182{
183 struct net2280 *dev;
184 struct net2280_ep *ep;
c65c4f05
MYK		 185 u32 max;
186 u32 tmp = 0;
187 u32 type;
1da177e4 188 unsigned long flags;
adc82f77 189 static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
9ceafcc2 190 int ret = 0;
1da177e4 191
fae3c158 192 ep = container_of(_ep, struct net2280_ep, ep);
ae8e530a 193 if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
9ceafcc2
MYK		 194 desc->bDescriptorType != USB_DT_ENDPOINT) {
195 pr_err("%s: failed at line=%d\n", __func__, __LINE__);
1da177e4 196 return -EINVAL;
9ceafcc2 197 }
1da177e4 198 dev = ep->dev;
9ceafcc2
MYK		 199 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
200 ret = -ESHUTDOWN;
201 goto print_err;
202 }
1da177e4
LT		 203
204 /* erratum 0119 workaround ties up an endpoint number */
9ceafcc2
MYK		 205 if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) {
206 ret = -EDOM;
207 goto print_err;
208 }
1da177e4 209
5185c913 210 if (dev->quirks & PLX_PCIE) {
9ceafcc2
MYK		 211 if ((desc->bEndpointAddress & 0x0f) >= 0x0c) {
212 ret = -EDOM;
213 goto print_err;
214 }
adc82f77 215 ep->is_in = !!usb_endpoint_dir_in(desc);
9ceafcc2
MYK		 216 if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) {
217 ret = -EINVAL;
218 goto print_err;
219 }
adc82f77
RRD		 220 }
221
1da177e4 222 /* sanity check ep-e/ep-f since their fifos are small */
090bdb5c 223 max = usb_endpoint_maxp(desc);
9ceafcc2
MYK		 224 if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) {
225 ret = -ERANGE;
226 goto print_err;
227 }
1da177e4 228
fae3c158 229 spin_lock_irqsave(&dev->lock, flags);
090bdb5c 230 _ep->maxpacket = max;
1da177e4
LT		 231 ep->desc = desc;
232
233 /* ep_reset() has already been called */
234 ep->stopped = 0;
8066134f 235 ep->wedged = 0;
1da177e4
LT		 236 ep->out_overflow = 0;
237
238 /* set speed-dependent max packet; may kick in high bandwidth */
adc82f77 239 set_max_speed(ep, max);
1da177e4 240
1da177e4 241 /* set type, direction, address; reset fifo counters */
3e76fdcb 242 writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
c65c4f05 243
5185c913 244 if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
c65c4f05
MYK		 245 tmp = readl(&ep->cfg->ep_cfg);
246 /* If USB ep number doesn't match hardware ep number */
247 if ((tmp & 0xf) != usb_endpoint_num(desc)) {
248 ret = -EINVAL;
249 spin_unlock_irqrestore(&dev->lock, flags);
250 goto print_err;
251 }
252 if (ep->is_in)
253 tmp &= ~USB3380_EP_CFG_MASK_IN;
254 else
255 tmp &= ~USB3380_EP_CFG_MASK_OUT;
256 }
257 type = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
258 if (type == USB_ENDPOINT_XFER_INT) {
1da177e4 259 /* erratum 0105 workaround prevents hs NYET */
ae8e530a
RRD		 260 if (dev->chiprev == 0100 &&
261 dev->gadget.speed == USB_SPEED_HIGH &&
262 !(desc->bEndpointAddress & USB_DIR_IN))
3e76fdcb 263 writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
1da177e4 264 &ep->regs->ep_rsp);
c65c4f05 265 } else if (type == USB_ENDPOINT_XFER_BULK) {
1da177e4 266 /* catch some particularly blatant driver bugs */
adc82f77
RRD		 267 if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) ||
268 (dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
269 (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
270 spin_unlock_irqrestore(&dev->lock, flags);
9ceafcc2
MYK		 271 ret = -ERANGE;
272 goto print_err;
1da177e4
LT		 273 }
274 }
c65c4f05 275 ep->is_iso = (type == USB_ENDPOINT_XFER_ISOC);
adc82f77 276 /* Enable this endpoint */
2eeb0016 277 if (dev->quirks & PLX_LEGACY) {
c65c4f05 278 tmp |= type << ENDPOINT_TYPE;
adc82f77
RRD		 279 tmp |= desc->bEndpointAddress;
280 /* default full fifo lines */
281 tmp |= (4 << ENDPOINT_BYTE_COUNT);
3e76fdcb 282 tmp |= BIT(ENDPOINT_ENABLE);
adc82f77
RRD		 283 ep->is_in = (tmp & USB_DIR_IN) != 0;
284 } else {
285 /* In Legacy mode, only OUT endpoints are used */
286 if (dev->enhanced_mode && ep->is_in) {
c65c4f05 287 tmp |= type << IN_ENDPOINT_TYPE;
3e76fdcb 288 tmp |= BIT(IN_ENDPOINT_ENABLE);
adc82f77 289 } else {
c65c4f05 290 tmp |= type << OUT_ENDPOINT_TYPE;
3e76fdcb 291 tmp |= BIT(OUT_ENDPOINT_ENABLE);
adc82f77
RRD		 292 tmp |= (ep->is_in << ENDPOINT_DIRECTION);
293 }
294
463e104f 295 tmp |= (4 << ENDPOINT_BYTE_COUNT);
c65c4f05
MYK		 296 if (!dev->enhanced_mode)
297 tmp |= usb_endpoint_num(desc);
adc82f77
RRD		 298 tmp |= (ep->ep.maxburst << MAX_BURST_SIZE);
299 }
300
301 /* Make sure all the registers are written before ep_rsp*/
302 wmb();
1da177e4
LT		 303
304 /* for OUT transfers, block the rx fifo until a read is posted */
1da177e4 305 if (!ep->is_in)
3e76fdcb 306 writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
2eeb0016 307 else if (!(dev->quirks & PLX_2280)) {
901b3d75
DB		 308 /* Added for 2282, Don't use nak packets on an in endpoint,
309 * this was ignored on 2280
310 */
3e76fdcb
RRD		 311 writel(BIT(CLEAR_NAK_OUT_PACKETS) |
312 BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
950ee4c8 313 }
1da177e4 314
5185c913 315 if (dev->quirks & PLX_PCIE)
e6ac4bb0 316 ep_clear_seqnum(ep);
adc82f77 317 writel(tmp, &ep->cfg->ep_cfg);
1da177e4
LT		 318
319 /* enable irqs */
320 if (!ep->dma) { /* pio, per-packet */
adc82f77 321 enable_pciirqenb(ep);
1da177e4 322
3e76fdcb
RRD		 323 tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) |
324 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
2eeb0016 325 if (dev->quirks & PLX_2280)
fae3c158
RRD		 326 tmp |= readl(&ep->regs->ep_irqenb);
327 writel(tmp, &ep->regs->ep_irqenb);
1da177e4 328 } else { /* dma, per-request */
3e76fdcb 329 tmp = BIT((8 + ep->num)); /* completion */
fae3c158
RRD		 330 tmp |= readl(&dev->regs->pciirqenb1);
331 writel(tmp, &dev->regs->pciirqenb1);
1da177e4
LT		 332
333 /* for short OUT transfers, dma completions can't
334 * advance the queue; do it pio-style, by hand.
335 * NOTE erratum 0112 workaround #2
336 */
337 if ((desc->bEndpointAddress & USB_DIR_IN) == 0) {
3e76fdcb 338 tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE);
fae3c158 339 writel(tmp, &ep->regs->ep_irqenb);
1da177e4 340
adc82f77 341 enable_pciirqenb(ep);
1da177e4
LT		 342 }
343 }
344
345 tmp = desc->bEndpointAddress;
e56e69cc 346 ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n",
fae3c158
RRD		 347 _ep->name, tmp & 0x0f, DIR_STRING(tmp),
348 type_string(desc->bmAttributes),
1da177e4
LT		 349 ep->dma ? "dma" : "pio", max);
350
351 /* pci writes may still be posted */
fae3c158 352 spin_unlock_irqrestore(&dev->lock, flags);
9ceafcc2
MYK		 353 return ret;
354
355print_err:
356 dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
357 return ret;
1da177e4
LT		 358}
359
fae3c158 360static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
1da177e4
LT		 361{
362 u32 result;
363
364 do {
fae3c158 365 result = readl(ptr);
1da177e4
LT		 366 if (result == ~(u32)0) /* "device unplugged" */
367 return -ENODEV;
368 result &= mask;
369 if (result == done)
370 return 0;
fae3c158 371 udelay(1);
1da177e4
LT		 372 usec--;
373 } while (usec > 0);
374 return -ETIMEDOUT;
375}
376
901b3d75 377static const struct usb_ep_ops net2280_ep_ops;
1da177e4 378
adc82f77
RRD		 379static void ep_reset_228x(struct net2280_regs __iomem *regs,
380 struct net2280_ep *ep)
1da177e4
LT		 381{
382 u32 tmp;
383
384 ep->desc = NULL;
fae3c158 385 INIT_LIST_HEAD(&ep->queue);
1da177e4 386
e117e742 387 usb_ep_set_maxpacket_limit(&ep->ep, ~0);
1da177e4
LT		 388 ep->ep.ops = &net2280_ep_ops;
389
390 /* disable the dma, irqs, endpoint... */
391 if (ep->dma) {
fae3c158 392 writel(0, &ep->dma->dmactl);
3e76fdcb
RRD		 393 writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
394 BIT(DMA_TRANSACTION_DONE_INTERRUPT) |
395 BIT(DMA_ABORT),
396 &ep->dma->dmastat);
1da177e4 397
fae3c158 398 tmp = readl(&regs->pciirqenb0);
3e76fdcb 399 tmp &= ~BIT(ep->num);
fae3c158 400 writel(tmp, &regs->pciirqenb0);
1da177e4 401 } else {
fae3c158 402 tmp = readl(&regs->pciirqenb1);
3e76fdcb 403 tmp &= ~BIT((8 + ep->num)); /* completion */
fae3c158 404 writel(tmp, &regs->pciirqenb1);
1da177e4 405 }
fae3c158 406 writel(0, &ep->regs->ep_irqenb);
1da177e4
LT		 407
408 /* init to our chosen defaults, notably so that we NAK OUT
409 * packets until the driver queues a read (+note erratum 0112)
410 */
2eeb0016 411 if (!ep->is_in || (ep->dev->quirks & PLX_2280)) {
3e76fdcb
RRD		 412 tmp = BIT(SET_NAK_OUT_PACKETS_MODE) |
413 BIT(SET_NAK_OUT_PACKETS) |
414 BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
415 BIT(CLEAR_INTERRUPT_MODE);
950ee4c8
GL		 416 } else {
417 /* added for 2282 */
3e76fdcb
RRD		 418 tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
419 BIT(CLEAR_NAK_OUT_PACKETS) |
420 BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
421 BIT(CLEAR_INTERRUPT_MODE);
950ee4c8 422 }
1da177e4
LT		 423
424 if (ep->num != 0) {
3e76fdcb
RRD		 425 tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) |
426 BIT(CLEAR_ENDPOINT_HALT);
1da177e4 427 }
fae3c158 428 writel(tmp, &ep->regs->ep_rsp);
1da177e4
LT		 429
430 /* scrub most status bits, and flush any fifo state */
2eeb0016 431 if (ep->dev->quirks & PLX_2280)
3e76fdcb
RRD		 432 tmp = BIT(FIFO_OVERFLOW) |
433 BIT(FIFO_UNDERFLOW);
950ee4c8
GL		 434 else
435 tmp = 0;
436
3e76fdcb
RRD		 437 writel(tmp | BIT(TIMEOUT) |
438 BIT(USB_STALL_SENT) |
439 BIT(USB_IN_NAK_SENT) |
440 BIT(USB_IN_ACK_RCVD) |
441 BIT(USB_OUT_PING_NAK_SENT) |
442 BIT(USB_OUT_ACK_SENT) |
443 BIT(FIFO_FLUSH) |
444 BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
445 BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
446 BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
447 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
448 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
ae8e530a
RRD		 449 BIT(DATA_IN_TOKEN_INTERRUPT),
450 &ep->regs->ep_stat);
1da177e4
LT		 451
452 /* fifo size is handled separately */
453}
454
adc82f77
RRD		 455static void ep_reset_338x(struct net2280_regs __iomem *regs,
456 struct net2280_ep *ep)
457{
458 u32 tmp, dmastat;
459
460 ep->desc = NULL;
461 INIT_LIST_HEAD(&ep->queue);
462
463 usb_ep_set_maxpacket_limit(&ep->ep, ~0);
464 ep->ep.ops = &net2280_ep_ops;
465
466 /* disable the dma, irqs, endpoint... */
467 if (ep->dma) {
468 writel(0, &ep->dma->dmactl);
3e76fdcb
RRD		 469 writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
470 BIT(DMA_PAUSE_DONE_INTERRUPT) |
471 BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
ae8e530a
RRD		 472 BIT(DMA_TRANSACTION_DONE_INTERRUPT),
473 /* | BIT(DMA_ABORT), */
474 &ep->dma->dmastat);
adc82f77
RRD		 475
476 dmastat = readl(&ep->dma->dmastat);
477 if (dmastat == 0x5002) {
e56e69cc 478 ep_warn(ep->dev, "The dmastat return = %x!!\n",
adc82f77
RRD		 479 dmastat);
480 writel(0x5a, &ep->dma->dmastat);
481 }
482
483 tmp = readl(&regs->pciirqenb0);
3e76fdcb 484 tmp &= ~BIT(ep_bit[ep->num]);
adc82f77
RRD		 485 writel(tmp, &regs->pciirqenb0);
486 } else {
487 if (ep->num < 5) {
488 tmp = readl(&regs->pciirqenb1);
3e76fdcb 489 tmp &= ~BIT((8 + ep->num)); /* completion */
adc82f77
RRD		 490 writel(tmp, &regs->pciirqenb1);
491 }
492 }
493 writel(0, &ep->regs->ep_irqenb);
494
3e76fdcb
RRD		 495 writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
496 BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
497 BIT(FIFO_OVERFLOW) |
498 BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
499 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
500 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
501 BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat);
971fe656
MYK		 502
503 tmp = readl(&ep->cfg->ep_cfg);
504 if (ep->is_in)
505 tmp &= ~USB3380_EP_CFG_MASK_IN;
506 else
507 tmp &= ~USB3380_EP_CFG_MASK_OUT;
508 writel(tmp, &ep->cfg->ep_cfg);
adc82f77
RRD		 509}
510
fae3c158 511static void nuke(struct net2280_ep *);
1da177e4 512
fae3c158 513static int net2280_disable(struct usb_ep *_ep)
1da177e4
LT		 514{
515 struct net2280_ep *ep;
516 unsigned long flags;
517
fae3c158 518 ep = container_of(_ep, struct net2280_ep, ep);
836bcab5
GK		 519 if (!_ep || _ep->name == ep0name) {
520 pr_err("%s: Invalid ep=%p\n", __func__, _ep);
1da177e4 521 return -EINVAL;
9ceafcc2 522 }
fae3c158
RRD		 523 spin_lock_irqsave(&ep->dev->lock, flags);
524 nuke(ep);
adc82f77 525
5185c913 526 if (ep->dev->quirks & PLX_PCIE)
adc82f77
RRD		 527 ep_reset_338x(ep->dev->regs, ep);
528 else
529 ep_reset_228x(ep->dev->regs, ep);
1da177e4 530
e56e69cc 531 ep_vdbg(ep->dev, "disabled %s %s\n",
1da177e4
LT		 532 ep->dma ? "dma" : "pio", _ep->name);
533
534 /* synch memory views with the device */
adc82f77 535 (void)readl(&ep->cfg->ep_cfg);
1da177e4 536
d588ff58 537 if (!ep->dma && ep->num >= 1 && ep->num <= 4)
fae3c158 538 ep->dma = &ep->dev->dma[ep->num - 1];
1da177e4 539
fae3c158 540 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 541 return 0;
542}
543
544/*-------------------------------------------------------------------------*/
545
fae3c158
RRD		 546static struct usb_request
547*net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
1da177e4
LT		 548{
549 struct net2280_ep *ep;
550 struct net2280_request *req;
551
9ceafcc2
MYK		 552 if (!_ep) {
553 pr_err("%s: Invalid ep\n", __func__);
1da177e4 554 return NULL;
9ceafcc2 555 }
fae3c158 556 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4 557
7039f422 558 req = kzalloc(sizeof(*req), gfp_flags);
1da177e4
LT		 559 if (!req)
560 return NULL;
561
fae3c158 562 INIT_LIST_HEAD(&req->queue);
1da177e4
LT		 563
564 /* this dma descriptor may be swapped with the previous dummy */
565 if (ep->dma) {
566 struct net2280_dma *td;
567
fa9ed6f6 568 td = dma_pool_alloc(ep->dev->requests, gfp_flags,
1da177e4
LT		 569 &req->td_dma);
570 if (!td) {
fae3c158 571 kfree(req);
1da177e4
LT		 572 return NULL;
573 }
574 td->dmacount = 0; /* not VALID */
1da177e4
LT		 575 td->dmadesc = td->dmaaddr;
576 req->td = td;
577 }
578 return &req->req;
579}
580
fae3c158 581static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req)
1da177e4
LT		 582{
583 struct net2280_ep *ep;
584 struct net2280_request *req;
585
fae3c158 586 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2 587 if (!_ep || !_req) {
a00c9791 588 dev_err(&ep->dev->pdev->dev, "%s: Invalid ep=%p or req=%p\n",
9ceafcc2 589 __func__, _ep, _req);
1da177e4 590 return;
9ceafcc2 591 }
1da177e4 592
fae3c158
RRD		 593 req = container_of(_req, struct net2280_request, req);
594 WARN_ON(!list_empty(&req->queue));
1da177e4 595 if (req->td)
fa9ed6f6 596 dma_pool_free(ep->dev->requests, req->td, req->td_dma);
fae3c158 597 kfree(req);
1da177e4
LT		 598}
599
600/*-------------------------------------------------------------------------*/
601
1da177e4
LT		 602/* load a packet into the fifo we use for usb IN transfers.
603 * works for all endpoints.
604 *
605 * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo
606 * at a time, but this code is simpler because it knows it only writes
607 * one packet. ep-a..ep-d should use dma instead.
608 */
fae3c158 609static void write_fifo(struct net2280_ep *ep, struct usb_request *req)
1da177e4
LT		 610{
611 struct net2280_ep_regs __iomem *regs = ep->regs;
612 u8 *buf;
613 u32 tmp;
614 unsigned count, total;
615
616 /* INVARIANT: fifo is currently empty. (testable) */
617
618 if (req) {
619 buf = req->buf + req->actual;
fae3c158 620 prefetch(buf);
1da177e4
LT		 621 total = req->length - req->actual;
622 } else {
623 total = 0;
624 buf = NULL;
625 }
626
627 /* write just one packet at a time */
628 count = ep->ep.maxpacket;
629 if (count > total) /* min() cannot be used on a bitfield */
630 count = total;
631
e56e69cc 632 ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n",
1da177e4
LT		 633 ep->ep.name, count,
634 (count != ep->ep.maxpacket) ? " (short)" : "",
635 req);
636 while (count >= 4) {
637 /* NOTE be careful if you try to align these. fifo lines
638 * should normally be full (4 bytes) and successive partial
639 * lines are ok only in certain cases.
640 */
fae3c158
RRD		 641 tmp = get_unaligned((u32 *)buf);
642 cpu_to_le32s(&tmp);
643 writel(tmp, &regs->ep_data);
1da177e4
LT		 644 buf += 4;
645 count -= 4;
646 }
647
648 /* last fifo entry is "short" unless we wrote a full packet.
649 * also explicitly validate last word in (periodic) transfers
650 * when maxpacket is not a multiple of 4 bytes.
651 */
652 if (count || total < ep->ep.maxpacket) {
fae3c158
RRD		 653 tmp = count ? get_unaligned((u32 *)buf) : count;
654 cpu_to_le32s(&tmp);
655 set_fifo_bytecount(ep, count & 0x03);
656 writel(tmp, &regs->ep_data);
1da177e4
LT		 657 }
658
659 /* pci writes may still be posted */
660}
661
662/* work around erratum 0106: PCI and USB race over the OUT fifo.
663 * caller guarantees chiprev 0100, out endpoint is NAKing, and
664 * there's no real data in the fifo.
665 *
666 * NOTE: also used in cases where that erratum doesn't apply:
667 * where the host wrote "too much" data to us.
668 */
fae3c158 669static void out_flush(struct net2280_ep *ep)
1da177e4
LT		 670{
671 u32 __iomem *statp;
672 u32 tmp;
673
1da177e4 674 statp = &ep->regs->ep_stat;
d82f3db2
RRD		 675
676 tmp = readl(statp);
677 if (tmp & BIT(NAK_OUT_PACKETS)) {
678 ep_dbg(ep->dev, "%s %s %08x !NAK\n",
679 ep->ep.name, __func__, tmp);
680 writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
681 }
682
3e76fdcb 683 writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
ae8e530a
RRD		 684 BIT(DATA_PACKET_RECEIVED_INTERRUPT),
685 statp);
3e76fdcb 686 writel(BIT(FIFO_FLUSH), statp);
fae3c158
RRD		 687 /* Make sure that stap is written */
688 mb();
689 tmp = readl(statp);
ae8e530a 690 if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) &&
1da177e4 691 /* high speed did bulk NYET; fifo isn't filling */
ae8e530a 692 ep->dev->gadget.speed == USB_SPEED_FULL) {
1da177e4
LT		 693 unsigned usec;
694
695 usec = 50; /* 64 byte bulk/interrupt */
3e76fdcb
RRD		 696 handshake(statp, BIT(USB_OUT_PING_NAK_SENT),
697 BIT(USB_OUT_PING_NAK_SENT), usec);
1da177e4
LT		 698 /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */
699 }
700}
701
702/* unload packet(s) from the fifo we use for usb OUT transfers.
703 * returns true iff the request completed, because of short packet
704 * or the request buffer having filled with full packets.
705 *
706 * for ep-a..ep-d this will read multiple packets out when they
707 * have been accepted.
708 */
fae3c158 709static int read_fifo(struct net2280_ep *ep, struct net2280_request *req)
1da177e4
LT		 710{
711 struct net2280_ep_regs __iomem *regs = ep->regs;
712 u8 *buf = req->req.buf + req->req.actual;
713 unsigned count, tmp, is_short;
714 unsigned cleanup = 0, prevent = 0;
715
716 /* erratum 0106 ... packets coming in during fifo reads might
717 * be incompletely rejected. not all cases have workarounds.
718 */
ae8e530a
RRD		 719 if (ep->dev->chiprev == 0x0100 &&
720 ep->dev->gadget.speed == USB_SPEED_FULL) {
fae3c158
RRD		 721 udelay(1);
722 tmp = readl(&ep->regs->ep_stat);
3e76fdcb 723 if ((tmp & BIT(NAK_OUT_PACKETS)))
1da177e4 724 cleanup = 1;
3e76fdcb 725 else if ((tmp & BIT(FIFO_FULL))) {
fae3c158 726 start_out_naking(ep);
1da177e4
LT		 727 prevent = 1;
728 }
729 /* else: hope we don't see the problem */
730 }
731
732 /* never overflow the rx buffer. the fifo reads packets until
733 * it sees a short one; we might not be ready for them all.
734 */
fae3c158
RRD		 735 prefetchw(buf);
736 count = readl(&regs->ep_avail);
737 if (unlikely(count == 0)) {
738 udelay(1);
739 tmp = readl(&ep->regs->ep_stat);
740 count = readl(&regs->ep_avail);
1da177e4 741 /* handled that data already? */
3e76fdcb 742 if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0)
1da177e4
LT		 743 return 0;
744 }
745
746 tmp = req->req.length - req->req.actual;
747 if (count > tmp) {
748 /* as with DMA, data overflow gets flushed */
749 if ((tmp % ep->ep.maxpacket) != 0) {
e56e69cc 750 ep_err(ep->dev,
1da177e4
LT		 751 "%s out fifo %d bytes, expected %d\n",
752 ep->ep.name, count, tmp);
753 req->req.status = -EOVERFLOW;
754 cleanup = 1;
755 /* NAK_OUT_PACKETS will be set, so flushing is safe;
756 * the next read will start with the next packet
757 */
758 } /* else it's a ZLP, no worries */
759 count = tmp;
760 }
761 req->req.actual += count;
762
763 is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0);
764
e56e69cc 765 ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n",
1da177e4
LT		 766 ep->ep.name, count, is_short ? " (short)" : "",
767 cleanup ? " flush" : "", prevent ? " nak" : "",
768 req, req->req.actual, req->req.length);
769
770 while (count >= 4) {
fae3c158
RRD		 771 tmp = readl(&regs->ep_data);
772 cpu_to_le32s(&tmp);
773 put_unaligned(tmp, (u32 *)buf);
1da177e4
LT		 774 buf += 4;
775 count -= 4;
776 }
777 if (count) {
fae3c158 778 tmp = readl(&regs->ep_data);
1da177e4
LT		 779 /* LE conversion is implicit here: */
780 do {
781 *buf++ = (u8) tmp;
782 tmp >>= 8;
783 } while (--count);
784 }
785 if (cleanup)
fae3c158 786 out_flush(ep);
1da177e4 787 if (prevent) {
3e76fdcb 788 writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
fae3c158 789 (void) readl(&ep->regs->ep_rsp);
1da177e4
LT		 790 }
791
ae8e530a
RRD		 792 return is_short || ((req->req.actual == req->req.length) &&
793 !req->req.zero);
1da177e4
LT		 794}
795
796/* fill out dma descriptor to match a given request */
fae3c158
RRD		 797static void fill_dma_desc(struct net2280_ep *ep,
798 struct net2280_request *req, int valid)
1da177e4
LT		 799{
800 struct net2280_dma *td = req->td;
801 u32 dmacount = req->req.length;
802
803 /* don't let DMA continue after a short OUT packet,
804 * so overruns can't affect the next transfer.
805 * in case of overruns on max-size packets, we can't
806 * stop the fifo from filling but we can flush it.
807 */
808 if (ep->is_in)
3e76fdcb 809 dmacount |= BIT(DMA_DIRECTION);
ae8e530a 810 if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) ||
2eeb0016 811 !(ep->dev->quirks & PLX_2280))
3e76fdcb 812 dmacount |= BIT(END_OF_CHAIN);
1da177e4
LT		 813
814 req->valid = valid;
815 if (valid)
3e76fdcb 816 dmacount |= BIT(VALID_BIT);
90664198 817 dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE);
1da177e4
LT		 818
819 /* td->dmadesc = previously set by caller */
820 td->dmaaddr = cpu_to_le32 (req->req.dma);
821
822 /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */
fae3c158 823 wmb();
da2bbdcc 824 td->dmacount = cpu_to_le32(dmacount);
1da177e4
LT		 825}
826
827static const u32 dmactl_default =
3e76fdcb
RRD		 828 BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
829 BIT(DMA_CLEAR_COUNT_ENABLE) |
1da177e4 830 /* erratum 0116 workaround part 1 (use POLLING) */
3e76fdcb
RRD		 831 (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) |
832 BIT(DMA_VALID_BIT_POLLING_ENABLE) |
833 BIT(DMA_VALID_BIT_ENABLE) |
834 BIT(DMA_SCATTER_GATHER_ENABLE) |
1da177e4 835 /* erratum 0116 workaround part 2 (no AUTOSTART) */
3e76fdcb 836 BIT(DMA_ENABLE);
1da177e4 837
fae3c158 838static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma)
1da177e4 839{
3e76fdcb 840 handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50);
1da177e4
LT		 841}
842
fae3c158 843static inline void stop_dma(struct net2280_dma_regs __iomem *dma)
1da177e4 844{
3e76fdcb 845 writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
fae3c158 846 spin_stop_dma(dma);
1da177e4
LT		 847}
848
fae3c158 849static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma)
1da177e4
LT		 850{
851 struct net2280_dma_regs __iomem *dma = ep->dma;
3e76fdcb 852 unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION);
1da177e4 853
2eeb0016 854 if (!(ep->dev->quirks & PLX_2280))
3e76fdcb 855 tmp |= BIT(END_OF_CHAIN);
950ee4c8 856
fae3c158
RRD		 857 writel(tmp, &dma->dmacount);
858 writel(readl(&dma->dmastat), &dma->dmastat);
1da177e4 859
fae3c158 860 writel(td_dma, &dma->dmadesc);
5185c913 861 if (ep->dev->quirks & PLX_PCIE)
3e76fdcb 862 dmactl |= BIT(DMA_REQUEST_OUTSTANDING);
fae3c158 863 writel(dmactl, &dma->dmactl);
1da177e4
LT		 864
865 /* erratum 0116 workaround part 3: pci arbiter away from net2280 */
fae3c158 866 (void) readl(&ep->dev->pci->pcimstctl);
1da177e4 867
3e76fdcb 868 writel(BIT(DMA_START), &dma->dmastat);
1da177e4
LT		 869}
870
fae3c158 871static void start_dma(struct net2280_ep *ep, struct net2280_request *req)
1da177e4
LT		 872{
873 u32 tmp;
874 struct net2280_dma_regs __iomem *dma = ep->dma;
875
876 /* FIXME can't use DMA for ZLPs */
877
878 /* on this path we "know" there's no dma active (yet) */
3e76fdcb 879 WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
fae3c158 880 writel(0, &ep->dma->dmactl);
1da177e4
LT		 881
882 /* previous OUT packet might have been short */
fae3c158
RRD		 883 if (!ep->is_in && (readl(&ep->regs->ep_stat) &
884 BIT(NAK_OUT_PACKETS))) {
3e76fdcb 885 writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
1da177e4
LT		 886 &ep->regs->ep_stat);
887
fae3c158 888 tmp = readl(&ep->regs->ep_avail);
1da177e4 889 if (tmp) {
fae3c158 890 writel(readl(&dma->dmastat), &dma->dmastat);
1da177e4
LT		 891
892 /* transfer all/some fifo data */
fae3c158
RRD		 893 writel(req->req.dma, &dma->dmaaddr);
894 tmp = min(tmp, req->req.length);
1da177e4
LT		 895
896 /* dma irq, faking scatterlist status */
fae3c158 897 req->td->dmacount = cpu_to_le32(req->req.length - tmp);
ae8e530a
RRD		 898 writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
899 &dma->dmacount);
1da177e4
LT		 900 req->td->dmadesc = 0;
901 req->valid = 1;
902
3e76fdcb
RRD		 903 writel(BIT(DMA_ENABLE), &dma->dmactl);
904 writel(BIT(DMA_START), &dma->dmastat);
1da177e4
LT		 905 return;
906 }
9d6a54c1 907 stop_out_naking(ep);
1da177e4
LT		 908 }
909
910 tmp = dmactl_default;
911
912 /* force packet boundaries between dma requests, but prevent the
913 * controller from automagically writing a last "short" packet
914 * (zero length) unless the driver explicitly said to do that.
915 */
916 if (ep->is_in) {
fae3c158
RRD		 917 if (likely((req->req.length % ep->ep.maxpacket) ||
918 req->req.zero)){
3e76fdcb 919 tmp |= BIT(DMA_FIFO_VALIDATE);
1da177e4
LT		 920 ep->in_fifo_validate = 1;
921 } else
922 ep->in_fifo_validate = 0;
923 }
924
925 /* init req->td, pointing to the current dummy */
926 req->td->dmadesc = cpu_to_le32 (ep->td_dma);
fae3c158 927 fill_dma_desc(ep, req, 1);
1da177e4 928
90664198 929 req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN));
1da177e4 930
fae3c158 931 start_queue(ep, tmp, req->td_dma);
1da177e4
LT		 932}
933
934static inline void
fae3c158 935queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid)
1da177e4
LT		 936{
937 struct net2280_dma *end;
938 dma_addr_t tmp;
939
940 /* swap new dummy for old, link; fill and maybe activate */
941 end = ep->dummy;
942 ep->dummy = req->td;
943 req->td = end;
944
945 tmp = ep->td_dma;
946 ep->td_dma = req->td_dma;
947 req->td_dma = tmp;
948
949 end->dmadesc = cpu_to_le32 (ep->td_dma);
950
fae3c158 951 fill_dma_desc(ep, req, valid);
1da177e4
LT		 952}
953
954static void
fae3c158 955done(struct net2280_ep *ep, struct net2280_request *req, int status)
1da177e4
LT		 956{
957 struct net2280 *dev;
958 unsigned stopped = ep->stopped;
959
fae3c158 960 list_del_init(&req->queue);
1da177e4
LT		 961
962 if (req->req.status == -EINPROGRESS)
963 req->req.status = status;
964 else
965 status = req->req.status;
966
967 dev = ep->dev;
ae4d7933
FB		 968 if (ep->dma)
969 usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
1da177e4
LT		 970
971 if (status && status != -ESHUTDOWN)
e56e69cc 972 ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n",
1da177e4
LT		 973 ep->ep.name, &req->req, status,
974 req->req.actual, req->req.length);
975
976 /* don't modify queue heads during completion callback */
977 ep->stopped = 1;
fae3c158 978 spin_unlock(&dev->lock);
304f7e5e 979 usb_gadget_giveback_request(&ep->ep, &req->req);
fae3c158 980 spin_lock(&dev->lock);
1da177e4
LT		 981 ep->stopped = stopped;
982}
983
984/*-------------------------------------------------------------------------*/
985
986static int
fae3c158 987net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
1da177e4
LT		 988{
989 struct net2280_request *req;
990 struct net2280_ep *ep;
991 struct net2280 *dev;
992 unsigned long flags;
9ceafcc2 993 int ret = 0;
1da177e4
LT		 994
995 /* we always require a cpu-view buffer, so that we can
996 * always use pio (as fallback or whatever).
997 */
fae3c158 998 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 999 if (!_ep || (!ep->desc && ep->num != 0)) {
1000 pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
1da177e4 1001 return -EINVAL;
9ceafcc2
MYK		 1002 }
1003 req = container_of(_req, struct net2280_request, req);
1004 if (!_req || !_req->complete || !_req->buf ||
1005 !list_empty(&req->queue)) {
1006 ret = -EINVAL;
1007 goto print_err;
1008 }
1009 if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) {
1010 ret = -EDOM;
1011 goto print_err;
1012 }
1da177e4 1013 dev = ep->dev;
9ceafcc2
MYK		 1014 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
1015 ret = -ESHUTDOWN;
1016 goto print_err;
1017 }
1da177e4
LT		 1018
1019 /* FIXME implement PIO fallback for ZLPs with DMA */
9ceafcc2
MYK		 1020 if (ep->dma && _req->length == 0) {
1021 ret = -EOPNOTSUPP;
1022 goto print_err;
1023 }
1da177e4
LT		 1024
1025 /* set up dma mapping in case the caller didn't */
ae4d7933 1026 if (ep->dma) {
ae4d7933
FB		 1027 ret = usb_gadget_map_request(&dev->gadget, _req,
1028 ep->is_in);
1029 if (ret)
9ceafcc2 1030 goto print_err;
1da177e4
LT		 1031 }
1032
e56e69cc 1033 ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
1da177e4 1034 _ep->name, _req, _req->length, _req->buf);
1da177e4 1035
fae3c158 1036 spin_lock_irqsave(&dev->lock, flags);
1da177e4
LT		 1037
1038 _req->status = -EINPROGRESS;
1039 _req->actual = 0;
1040
1041 /* kickstart this i/o queue? */
485f44d0 1042 if (list_empty(&ep->queue) && !ep->stopped &&
5185c913 1043 !((dev->quirks & PLX_PCIE) && ep->dma &&
485f44d0
RRD		 1044 (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) {
1045
1da177e4 1046 /* use DMA if the endpoint supports it, else pio */
485f44d0 1047 if (ep->dma)
fae3c158 1048 start_dma(ep, req);
1da177e4
LT		 1049 else {
1050 /* maybe there's no control data, just status ack */
1051 if (ep->num == 0 && _req->length == 0) {
fae3c158
RRD		 1052 allow_status(ep);
1053 done(ep, req, 0);
e56e69cc 1054 ep_vdbg(dev, "%s status ack\n", ep->ep.name);
1da177e4
LT		 1055 goto done;
1056 }
1057
1058 /* PIO ... stuff the fifo, or unblock it. */
1059 if (ep->is_in)
fae3c158 1060 write_fifo(ep, _req);
6574abe6 1061 else {
1da177e4
LT		 1062 u32 s;
1063
1064 /* OUT FIFO might have packet(s) buffered */
fae3c158 1065 s = readl(&ep->regs->ep_stat);
3e76fdcb 1066 if ((s & BIT(FIFO_EMPTY)) == 0) {
1da177e4
LT		 1067 /* note: _req->short_not_ok is
1068 * ignored here since PIO _always_
1069 * stops queue advance here, and
1070 * _req->status doesn't change for
1071 * short reads (only _req->actual)
1072 */
fae3c158
RRD		 1073 if (read_fifo(ep, req) &&
1074 ep->num == 0) {
1075 done(ep, req, 0);
1076 allow_status(ep);
1da177e4
LT		 1077 /* don't queue it */
1078 req = NULL;
fae3c158
RRD		 1079 } else if (read_fifo(ep, req) &&
1080 ep->num != 0) {
1081 done(ep, req, 0);
1082 req = NULL;
1da177e4 1083 } else
fae3c158 1084 s = readl(&ep->regs->ep_stat);
1da177e4
LT		 1085 }
1086
1087 /* don't NAK, let the fifo fill */
3e76fdcb
RRD		 1088 if (req && (s & BIT(NAK_OUT_PACKETS)))
1089 writel(BIT(CLEAR_NAK_OUT_PACKETS),
1da177e4
LT		 1090 &ep->regs->ep_rsp);
1091 }
1092 }
1093
1094 } else if (ep->dma) {
1095 int valid = 1;
1096
1097 if (ep->is_in) {
1098 int expect;
1099
1100 /* preventing magic zlps is per-engine state, not
1101 * per-transfer; irq logic must recover hiccups.
1102 */
fae3c158
RRD		 1103 expect = likely(req->req.zero ||
1104 (req->req.length % ep->ep.maxpacket));
1da177e4
LT		 1105 if (expect != ep->in_fifo_validate)
1106 valid = 0;
1107 }
fae3c158 1108 queue_dma(ep, req, valid);
1da177e4
LT		 1109
1110 } /* else the irq handler advances the queue. */
1111
1f26e28d 1112 ep->responded = 1;
1da177e4 1113 if (req)
fae3c158 1114 list_add_tail(&req->queue, &ep->queue);
1da177e4 1115done:
fae3c158 1116 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1117
1118 /* pci writes may still be posted */
9ceafcc2
MYK		 1119 return ret;
1120
1121print_err:
1122 dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
1123 return ret;
1da177e4
LT		 1124}
1125
1126static inline void
fae3c158
RRD		 1127dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount,
1128 int status)
1da177e4
LT		 1129{
1130 req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount);
fae3c158 1131 done(ep, req, status);
1da177e4
LT		 1132}
1133
1de2ebfb 1134static int scan_dma_completions(struct net2280_ep *ep)
1da177e4 1135{
1de2ebfb
JK		 1136 int num_completed = 0;
1137
1da177e4
LT		 1138 /* only look at descriptors that were "naturally" retired,
1139 * so fifo and list head state won't matter
1140 */
fae3c158 1141 while (!list_empty(&ep->queue)) {
1da177e4 1142 struct net2280_request *req;
ef5e2fa9 1143 u32 req_dma_count;
1da177e4 1144
fae3c158 1145 req = list_entry(ep->queue.next,
1da177e4
LT		 1146 struct net2280_request, queue);
1147 if (!req->valid)
1148 break;
fae3c158 1149 rmb();
ef5e2fa9
RM		 1150 req_dma_count = le32_to_cpup(&req->td->dmacount);
1151 if ((req_dma_count & BIT(VALID_BIT)) != 0)
1da177e4
LT		 1152 break;
1153
1154 /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short"
1155 * cases where DMA must be aborted; this code handles
1156 * all non-abort DMA completions.
1157 */
fae3c158 1158 if (unlikely(req->td->dmadesc == 0)) {
1da177e4 1159 /* paranoia */
ef5e2fa9
RM		 1160 u32 const ep_dmacount = readl(&ep->dma->dmacount);
1161
1162 if (ep_dmacount & DMA_BYTE_COUNT_MASK)
1da177e4
LT		 1163 break;
1164 /* single transfer mode */
ef5e2fa9 1165 dma_done(ep, req, req_dma_count, 0);
1de2ebfb 1166 num_completed++;
1da177e4 1167 break;
ae8e530a 1168 } else if (!ep->is_in &&
43780aaa 1169 (req->req.length % ep->ep.maxpacket) &&
5185c913 1170 !(ep->dev->quirks & PLX_PCIE)) {
1da177e4 1171
ef5e2fa9 1172 u32 const ep_stat = readl(&ep->regs->ep_stat);
1da177e4
LT		 1173 /* AVOID TROUBLE HERE by not issuing short reads from
1174 * your gadget driver. That helps avoids errata 0121,
1175 * 0122, and 0124; not all cases trigger the warning.
1176 */
ef5e2fa9 1177 if ((ep_stat & BIT(NAK_OUT_PACKETS)) == 0) {
e56e69cc 1178 ep_warn(ep->dev, "%s lost packet sync!\n",
1da177e4
LT		 1179 ep->ep.name);
1180 req->req.status = -EOVERFLOW;
fae3c158 1181 } else {
ef5e2fa9
RM		 1182 u32 const ep_avail = readl(&ep->regs->ep_avail);
1183 if (ep_avail) {
fae3c158
RRD		 1184 /* fifo gets flushed later */
1185 ep->out_overflow = 1;
e56e69cc 1186 ep_dbg(ep->dev,
fae3c158 1187 "%s dma, discard %d len %d\n",
ef5e2fa9 1188 ep->ep.name, ep_avail,
1da177e4 1189 req->req.length);
fae3c158
RRD		 1190 req->req.status = -EOVERFLOW;
1191 }
1da177e4
LT		 1192 }
1193 }
ef5e2fa9 1194 dma_done(ep, req, req_dma_count, 0);
1de2ebfb 1195 num_completed++;
1da177e4 1196 }
1de2ebfb
JK		 1197
1198 return num_completed;
1da177e4
LT		 1199}
1200
fae3c158 1201static void restart_dma(struct net2280_ep *ep)
1da177e4
LT		 1202{
1203 struct net2280_request *req;
1da177e4
LT		 1204
1205 if (ep->stopped)
1206 return;
fae3c158 1207 req = list_entry(ep->queue.next, struct net2280_request, queue);
1da177e4 1208
90664198 1209 start_dma(ep, req);
1da177e4
LT		 1210}
1211
e721c457 1212static void abort_dma(struct net2280_ep *ep)
1da177e4
LT		 1213{
1214 /* abort the current transfer */
fae3c158 1215 if (likely(!list_empty(&ep->queue))) {
1da177e4 1216 /* FIXME work around errata 0121, 0122, 0124 */
3e76fdcb 1217 writel(BIT(DMA_ABORT), &ep->dma->dmastat);
fae3c158 1218 spin_stop_dma(ep->dma);
1da177e4 1219 } else
fae3c158
RRD		 1220 stop_dma(ep->dma);
1221 scan_dma_completions(ep);
1da177e4
LT		 1222}
1223
1224/* dequeue ALL requests */
fae3c158 1225static void nuke(struct net2280_ep *ep)
1da177e4
LT		 1226{
1227 struct net2280_request *req;
1228
1229 /* called with spinlock held */
1230 ep->stopped = 1;
1231 if (ep->dma)
fae3c158
RRD		 1232 abort_dma(ep);
1233 while (!list_empty(&ep->queue)) {
1234 req = list_entry(ep->queue.next,
1da177e4
LT		 1235 struct net2280_request,
1236 queue);
fae3c158 1237 done(ep, req, -ESHUTDOWN);
1da177e4
LT		 1238 }
1239}
1240
1241/* dequeue JUST ONE request */
fae3c158 1242static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1da177e4
LT		 1243{
1244 struct net2280_ep *ep;
1245 struct net2280_request *req;
1246 unsigned long flags;
1247 u32 dmactl;
1248 int stopped;
1249
fae3c158 1250 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 1251 if (!_ep || (!ep->desc && ep->num != 0) || !_req) {
1252 pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n",
1253 __func__, _ep, _req);
1da177e4 1254 return -EINVAL;
9ceafcc2 1255 }
1da177e4 1256
fae3c158 1257 spin_lock_irqsave(&ep->dev->lock, flags);
1da177e4
LT		 1258 stopped = ep->stopped;
1259
1260 /* quiesce dma while we patch the queue */
1261 dmactl = 0;
1262 ep->stopped = 1;
1263 if (ep->dma) {
fae3c158 1264 dmactl = readl(&ep->dma->dmactl);
1da177e4 1265 /* WARNING erratum 0127 may kick in ... */
fae3c158
RRD		 1266 stop_dma(ep->dma);
1267 scan_dma_completions(ep);
1da177e4
LT		 1268 }
1269
1270 /* make sure it's still queued on this endpoint */
fae3c158 1271 list_for_each_entry(req, &ep->queue, queue) {
1da177e4
LT		 1272 if (&req->req == _req)
1273 break;
1274 }
1275 if (&req->req != _req) {
f1d3fba1 1276 ep->stopped = stopped;
fae3c158 1277 spin_unlock_irqrestore(&ep->dev->lock, flags);
f1d3fba1 1278 ep_dbg(ep->dev, "%s: Request mismatch\n", __func__);
1da177e4
LT		 1279 return -EINVAL;
1280 }
1281
1282 /* queue head may be partially complete. */
1283 if (ep->queue.next == &req->queue) {
1284 if (ep->dma) {
e56e69cc 1285 ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name);
1da177e4 1286 _req->status = -ECONNRESET;
fae3c158
RRD		 1287 abort_dma(ep);
1288 if (likely(ep->queue.next == &req->queue)) {
1289 /* NOTE: misreports single-transfer mode*/
1da177e4 1290 req->td->dmacount = 0; /* invalidate */
fae3c158
RRD		 1291 dma_done(ep, req,
1292 readl(&ep->dma->dmacount),
1da177e4
LT		 1293 -ECONNRESET);
1294 }
1295 } else {
e56e69cc 1296 ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name);
fae3c158 1297 done(ep, req, -ECONNRESET);
1da177e4
LT		 1298 }
1299 req = NULL;
1da177e4
LT		 1300 }
1301
1302 if (req)
fae3c158 1303 done(ep, req, -ECONNRESET);
1da177e4
LT		 1304 ep->stopped = stopped;
1305
1306 if (ep->dma) {
1307 /* turn off dma on inactive queues */
fae3c158
RRD		 1308 if (list_empty(&ep->queue))
1309 stop_dma(ep->dma);
1da177e4
LT		 1310 else if (!ep->stopped) {
1311 /* resume current request, or start new one */
1312 if (req)
fae3c158 1313 writel(dmactl, &ep->dma->dmactl);
1da177e4 1314 else
fae3c158 1315 start_dma(ep, list_entry(ep->queue.next,
1da177e4
LT		 1316 struct net2280_request, queue));
1317 }
1318 }
1319
fae3c158 1320 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 1321 return 0;
1322}
1323
1324/*-------------------------------------------------------------------------*/
1325
fae3c158 1326static int net2280_fifo_status(struct usb_ep *_ep);
1da177e4
LT		 1327
1328static int
8066134f 1329net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
1da177e4
LT		 1330{
1331 struct net2280_ep *ep;
1332 unsigned long flags;
1333 int retval = 0;
1334
fae3c158 1335 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 1336 if (!_ep || (!ep->desc && ep->num != 0)) {
1337 pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
1da177e4 1338 return -EINVAL;
9ceafcc2
MYK		 1339 }
1340 if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
1341 retval = -ESHUTDOWN;
1342 goto print_err;
1343 }
1da177e4 1344 if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
9ceafcc2
MYK		 1345 == USB_ENDPOINT_XFER_ISOC) {
1346 retval = -EINVAL;
1347 goto print_err;
1348 }
1da177e4 1349
fae3c158 1350 spin_lock_irqsave(&ep->dev->lock, flags);
9ceafcc2 1351 if (!list_empty(&ep->queue)) {
1da177e4 1352 retval = -EAGAIN;
9ceafcc2
MYK		 1353 goto print_unlock;
1354 } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) {
1da177e4 1355 retval = -EAGAIN;
9ceafcc2
MYK		 1356 goto print_unlock;
1357 } else {
e56e69cc 1358 ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
8066134f
AS		 1359 value ? "set" : "clear",
1360 wedged ? "wedge" : "halt");
1da177e4
LT		 1361 /* set/clear, then synch memory views with the device */
1362 if (value) {
1363 if (ep->num == 0)
1364 ep->dev->protocol_stall = 1;
1365 else
fae3c158 1366 set_halt(ep);
8066134f
AS		 1367 if (wedged)
1368 ep->wedged = 1;
1369 } else {
fae3c158 1370 clear_halt(ep);
5185c913 1371 if (ep->dev->quirks & PLX_PCIE &&
adc82f77
RRD		 1372 !list_empty(&ep->queue) && ep->td_dma)
1373 restart_dma(ep);
8066134f
AS		 1374 ep->wedged = 0;
1375 }
fae3c158 1376 (void) readl(&ep->regs->ep_rsp);
1da177e4 1377 }
fae3c158 1378 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 1379
1380 return retval;
9ceafcc2
MYK		 1381
1382print_unlock:
1383 spin_unlock_irqrestore(&ep->dev->lock, flags);
1384print_err:
1385 dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval);
1386 return retval;
1da177e4
LT		 1387}
1388
fae3c158 1389static int net2280_set_halt(struct usb_ep *_ep, int value)
8066134f
AS		 1390{
1391 return net2280_set_halt_and_wedge(_ep, value, 0);
1392}
1393
fae3c158 1394static int net2280_set_wedge(struct usb_ep *_ep)
8066134f 1395{
9ceafcc2
MYK		 1396 if (!_ep || _ep->name == ep0name) {
1397 pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep);
8066134f 1398 return -EINVAL;
9ceafcc2 1399 }
8066134f
AS		 1400 return net2280_set_halt_and_wedge(_ep, 1, 1);
1401}
1402
fae3c158 1403static int net2280_fifo_status(struct usb_ep *_ep)
1da177e4
LT		 1404{
1405 struct net2280_ep *ep;
1406 u32 avail;
1407
fae3c158 1408 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 1409 if (!_ep || (!ep->desc && ep->num != 0)) {
1410 pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
1da177e4 1411 return -ENODEV;
9ceafcc2
MYK		 1412 }
1413 if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
1414 dev_err(&ep->dev->pdev->dev,
1415 "%s: Invalid driver=%p or speed=%d\n",
1416 __func__, ep->dev->driver, ep->dev->gadget.speed);
1da177e4 1417 return -ESHUTDOWN;
9ceafcc2 1418 }
1da177e4 1419
3e76fdcb 1420 avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
9ceafcc2
MYK		 1421 if (avail > ep->fifo_size) {
1422 dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__);
1da177e4 1423 return -EOVERFLOW;
9ceafcc2 1424 }
1da177e4
LT		 1425 if (ep->is_in)
1426 avail = ep->fifo_size - avail;
1427 return avail;
1428}
1429
fae3c158 1430static void net2280_fifo_flush(struct usb_ep *_ep)
1da177e4
LT		 1431{
1432 struct net2280_ep *ep;
1433
fae3c158 1434 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 1435 if (!_ep || (!ep->desc && ep->num != 0)) {
1436 pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
1da177e4 1437 return;
9ceafcc2
MYK		 1438 }
1439 if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
1440 dev_err(&ep->dev->pdev->dev,
1441 "%s: Invalid driver=%p or speed=%d\n",
1442 __func__, ep->dev->driver, ep->dev->gadget.speed);
1da177e4 1443 return;
9ceafcc2 1444 }
1da177e4 1445
3e76fdcb 1446 writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
fae3c158 1447 (void) readl(&ep->regs->ep_rsp);
1da177e4
LT		 1448}
1449
901b3d75 1450static const struct usb_ep_ops net2280_ep_ops = {
1da177e4
LT		 1451 .enable = net2280_enable,
1452 .disable = net2280_disable,
1453
1454 .alloc_request = net2280_alloc_request,
1455 .free_request = net2280_free_request,
1456
1da177e4
LT		 1457 .queue = net2280_queue,
1458 .dequeue = net2280_dequeue,
1459
1460 .set_halt = net2280_set_halt,
8066134f 1461 .set_wedge = net2280_set_wedge,
1da177e4
LT		 1462 .fifo_status = net2280_fifo_status,
1463 .fifo_flush = net2280_fifo_flush,
1464};
1465
1466/*-------------------------------------------------------------------------*/
1467
fae3c158 1468static int net2280_get_frame(struct usb_gadget *_gadget)
1da177e4
LT		 1469{
1470 struct net2280 *dev;
1471 unsigned long flags;
1472 u16 retval;
1473
1474 if (!_gadget)
1475 return -ENODEV;
fae3c158
RRD		 1476 dev = container_of(_gadget, struct net2280, gadget);
1477 spin_lock_irqsave(&dev->lock, flags);
1478 retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff;
1479 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1480 return retval;
1481}
1482
fae3c158 1483static int net2280_wakeup(struct usb_gadget *_gadget)
1da177e4
LT		 1484{
1485 struct net2280 *dev;
1486 u32 tmp;
1487 unsigned long flags;
1488
1489 if (!_gadget)
1490 return 0;
fae3c158 1491 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 1492
fae3c158
RRD		 1493 spin_lock_irqsave(&dev->lock, flags);
1494 tmp = readl(&dev->usb->usbctl);
3e76fdcb
RRD		 1495 if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE))
1496 writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
fae3c158 1497 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1498
1499 /* pci writes may still be posted */
1500 return 0;
1501}
1502
fae3c158 1503static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value)
1da177e4
LT		 1504{
1505 struct net2280 *dev;
1506 u32 tmp;
1507 unsigned long flags;
1508
1509 if (!_gadget)
1510 return 0;
fae3c158 1511 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 1512
fae3c158
RRD		 1513 spin_lock_irqsave(&dev->lock, flags);
1514 tmp = readl(&dev->usb->usbctl);
adc82f77 1515 if (value) {
3e76fdcb 1516 tmp |= BIT(SELF_POWERED_STATUS);
c8678d9f 1517 _gadget->is_selfpowered = 1;
adc82f77 1518 } else {
3e76fdcb 1519 tmp &= ~BIT(SELF_POWERED_STATUS);
c8678d9f 1520 _gadget->is_selfpowered = 0;
adc82f77 1521 }
fae3c158
RRD		 1522 writel(tmp, &dev->usb->usbctl);
1523 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1524
1525 return 0;
1526}
1527
1528static int net2280_pullup(struct usb_gadget *_gadget, int is_on)
1529{
1530 struct net2280 *dev;
1531 u32 tmp;
1532 unsigned long flags;
1533
1534 if (!_gadget)
1535 return -ENODEV;
fae3c158 1536 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 1537
fae3c158
RRD		 1538 spin_lock_irqsave(&dev->lock, flags);
1539 tmp = readl(&dev->usb->usbctl);
1da177e4 1540 dev->softconnect = (is_on != 0);
11bece5e
MYK		 1541 if (is_on) {
1542 ep0_start(dev);
1543 writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
1544 } else {
1545 writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
dec3c23c 1546 stop_activity(dev, NULL);
11bece5e
MYK		 1547 }
1548
fae3c158 1549 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1550
1551 return 0;
1552}
1553
3e8b2318
RB		 1554static struct usb_ep *net2280_match_ep(struct usb_gadget *_gadget,
1555 struct usb_endpoint_descriptor *desc,
1556 struct usb_ss_ep_comp_descriptor *ep_comp)
1557{
1558 char name[8];
1559 struct usb_ep *ep;
1560
1561 if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT) {
1562 /* ep-e, ep-f are PIO with only 64 byte fifos */
1563 ep = gadget_find_ep_by_name(_gadget, "ep-e");
1564 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1565 return ep;
1566 ep = gadget_find_ep_by_name(_gadget, "ep-f");
1567 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1568 return ep;
1569 }
1570
17f6ed62
JK		 1571 /* USB3380: Only first four endpoints have DMA channels. Allocate
1572 * slower interrupt endpoints from PIO hw endpoints, to allow bulk/isoc
1573 * endpoints use DMA hw endpoints.
1574 */
1575 if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
1576 usb_endpoint_dir_in(desc)) {
1577 ep = gadget_find_ep_by_name(_gadget, "ep2in");
1578 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1579 return ep;
1580 ep = gadget_find_ep_by_name(_gadget, "ep4in");
1581 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1582 return ep;
1583 } else if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
1584 !usb_endpoint_dir_in(desc)) {
1585 ep = gadget_find_ep_by_name(_gadget, "ep1out");
1586 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1587 return ep;
1588 ep = gadget_find_ep_by_name(_gadget, "ep3out");
1589 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1590 return ep;
1591 } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
1592 usb_endpoint_dir_in(desc)) {
1593 ep = gadget_find_ep_by_name(_gadget, "ep1in");
1594 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1595 return ep;
1596 ep = gadget_find_ep_by_name(_gadget, "ep3in");
1597 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1598 return ep;
1599 } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
1600 !usb_endpoint_dir_in(desc)) {
1601 ep = gadget_find_ep_by_name(_gadget, "ep2out");
1602 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1603 return ep;
1604 ep = gadget_find_ep_by_name(_gadget, "ep4out");
1605 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1606 return ep;
1607 }
1608
3e8b2318
RB		 1609 /* USB3380: use same address for usb and hardware endpoints */
1610 snprintf(name, sizeof(name), "ep%d%s", usb_endpoint_num(desc),
1611 usb_endpoint_dir_in(desc) ? "in" : "out");
1612 ep = gadget_find_ep_by_name(_gadget, name);
1613 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1614 return ep;
1615
1616 return NULL;
1617}
1618
4cf5e00b
FB		 1619static int net2280_start(struct usb_gadget *_gadget,
1620 struct usb_gadget_driver *driver);
22835b80 1621static int net2280_stop(struct usb_gadget *_gadget);
0f91349b 1622
1da177e4
LT		 1623static const struct usb_gadget_ops net2280_ops = {
1624 .get_frame = net2280_get_frame,
1625 .wakeup = net2280_wakeup,
1626 .set_selfpowered = net2280_set_selfpowered,
1627 .pullup = net2280_pullup,
4cf5e00b
FB		 1628 .udc_start = net2280_start,
1629 .udc_stop = net2280_stop,
3e8b2318 1630 .match_ep = net2280_match_ep,
1da177e4
LT		 1631};
1632
1633/*-------------------------------------------------------------------------*/
1634
b99b406c 1635#ifdef CONFIG_USB_GADGET_DEBUG_FILES
1da177e4
LT		 1636
1637/* FIXME move these into procfs, and use seq_file.
1638 * Sysfs _still_ doesn't behave for arbitrarily sized files,
1639 * and also doesn't help products using this with 2.4 kernels.
1640 */
1641
1642/* "function" sysfs attribute */
ce26bd23
GKH		 1643static ssize_t function_show(struct device *_dev, struct device_attribute *attr,
1644 char *buf)
1da177e4 1645{
fae3c158 1646 struct net2280 *dev = dev_get_drvdata(_dev);
1da177e4 1647
fae3c158
RRD		 1648 if (!dev->driver || !dev->driver->function ||
1649 strlen(dev->driver->function) > PAGE_SIZE)
1da177e4 1650 return 0;
fae3c158 1651 return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
1da177e4 1652}
ce26bd23 1653static DEVICE_ATTR_RO(function);
1da177e4 1654
ce26bd23
GKH		 1655static ssize_t registers_show(struct device *_dev,
1656 struct device_attribute *attr, char *buf)
1da177e4
LT		 1657{
1658 struct net2280 *dev;
1659 char *next;
1660 unsigned size, t;
1661 unsigned long flags;
1662 int i;
1663 u32 t1, t2;
30e69598 1664 const char *s;
1da177e4 1665
fae3c158 1666 dev = dev_get_drvdata(_dev);
1da177e4
LT		 1667 next = buf;
1668 size = PAGE_SIZE;
fae3c158 1669 spin_lock_irqsave(&dev->lock, flags);
1da177e4
LT		 1670
1671 if (dev->driver)
1672 s = dev->driver->driver.name;
1673 else
1674 s = "(none)";
1675
1676 /* Main Control Registers */
fae3c158 1677 t = scnprintf(next, size, "%s version " DRIVER_VERSION
d588ff58 1678 ", chiprev %04x\n\n"
1da177e4
LT		 1679 "devinit %03x fifoctl %08x gadget '%s'\n"
1680 "pci irqenb0 %02x irqenb1 %08x "
1681 "irqstat0 %04x irqstat1 %08x\n",
1682 driver_name, dev->chiprev,
fae3c158
RRD		 1683 readl(&dev->regs->devinit),
1684 readl(&dev->regs->fifoctl),
1da177e4 1685 s,
fae3c158
RRD		 1686 readl(&dev->regs->pciirqenb0),
1687 readl(&dev->regs->pciirqenb1),
1688 readl(&dev->regs->irqstat0),
1689 readl(&dev->regs->irqstat1));
1da177e4
LT		 1690 size -= t;
1691 next += t;
1692
1693 /* USB Control Registers */
fae3c158
RRD		 1694 t1 = readl(&dev->usb->usbctl);
1695 t2 = readl(&dev->usb->usbstat);
3e76fdcb
RRD		 1696 if (t1 & BIT(VBUS_PIN)) {
1697 if (t2 & BIT(HIGH_SPEED))
1da177e4
LT		 1698 s = "high speed";
1699 else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1700 s = "powered";
1701 else
1702 s = "full speed";
1703 /* full speed bit (6) not working?? */
1704 } else
1705 s = "not attached";
fae3c158 1706 t = scnprintf(next, size,
1da177e4
LT		 1707 "stdrsp %08x usbctl %08x usbstat %08x "
1708 "addr 0x%02x (%s)\n",
fae3c158
RRD		 1709 readl(&dev->usb->stdrsp), t1, t2,
1710 readl(&dev->usb->ouraddr), s);
1da177e4
LT		 1711 size -= t;
1712 next += t;
1713
1714 /* PCI Master Control Registers */
1715
1716 /* DMA Control Registers */
1717
1718 /* Configurable EP Control Registers */
adc82f77 1719 for (i = 0; i < dev->n_ep; i++) {
1da177e4
LT		 1720 struct net2280_ep *ep;
1721
fae3c158 1722 ep = &dev->ep[i];
1da177e4
LT		 1723 if (i && !ep->desc)
1724 continue;
1725
adc82f77 1726 t1 = readl(&ep->cfg->ep_cfg);
fae3c158
RRD		 1727 t2 = readl(&ep->regs->ep_rsp) & 0xff;
1728 t = scnprintf(next, size,
1da177e4
LT		 1729 "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s"
1730 "irqenb %02x\n",
1731 ep->ep.name, t1, t2,
3e76fdcb 1732 (t2 & BIT(CLEAR_NAK_OUT_PACKETS))
1da177e4 1733 ? "NAK " : "",
3e76fdcb 1734 (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE))
1da177e4 1735 ? "hide " : "",
3e76fdcb 1736 (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR))
1da177e4 1737 ? "CRC " : "",
3e76fdcb 1738 (t2 & BIT(CLEAR_INTERRUPT_MODE))
1da177e4 1739 ? "interrupt " : "",
3e76fdcb 1740 (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE))
1da177e4 1741 ? "status " : "",
3e76fdcb 1742 (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE))
1da177e4 1743 ? "NAKmode " : "",
3e76fdcb 1744 (t2 & BIT(CLEAR_ENDPOINT_TOGGLE))
1da177e4 1745 ? "DATA1 " : "DATA0 ",
3e76fdcb 1746 (t2 & BIT(CLEAR_ENDPOINT_HALT))
1da177e4 1747 ? "HALT " : "",
fae3c158 1748 readl(&ep->regs->ep_irqenb));
1da177e4
LT		 1749 size -= t;
1750 next += t;
1751
fae3c158 1752 t = scnprintf(next, size,
1da177e4
LT		 1753 "\tstat %08x avail %04x "
1754 "(ep%d%s-%s)%s\n",
fae3c158
RRD		 1755 readl(&ep->regs->ep_stat),
1756 readl(&ep->regs->ep_avail),
1757 t1 & 0x0f, DIR_STRING(t1),
1758 type_string(t1 >> 8),
1da177e4
LT		 1759 ep->stopped ? "*" : "");
1760 size -= t;
1761 next += t;
1762
1763 if (!ep->dma)
1764 continue;
1765
fae3c158 1766 t = scnprintf(next, size,
1da177e4
LT		 1767 " dma\tctl %08x stat %08x count %08x\n"
1768 "\taddr %08x desc %08x\n",
fae3c158
RRD		 1769 readl(&ep->dma->dmactl),
1770 readl(&ep->dma->dmastat),
1771 readl(&ep->dma->dmacount),
1772 readl(&ep->dma->dmaaddr),
1773 readl(&ep->dma->dmadesc));
1da177e4
LT		 1774 size -= t;
1775 next += t;
1776
1777 }
1778
fae3c158 1779 /* Indexed Registers (none yet) */
1da177e4
LT		 1780
1781 /* Statistics */
fae3c158 1782 t = scnprintf(next, size, "\nirqs: ");
1da177e4
LT		 1783 size -= t;
1784 next += t;
adc82f77 1785 for (i = 0; i < dev->n_ep; i++) {
1da177e4
LT		 1786 struct net2280_ep *ep;
1787
fae3c158 1788 ep = &dev->ep[i];
1da177e4
LT		 1789 if (i && !ep->irqs)
1790 continue;
fae3c158 1791 t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs);
1da177e4
LT		 1792 size -= t;
1793 next += t;
1794
1795 }
fae3c158 1796 t = scnprintf(next, size, "\n");
1da177e4
LT		 1797 size -= t;
1798 next += t;
1799
fae3c158 1800 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1801
1802 return PAGE_SIZE - size;
1803}
ce26bd23 1804static DEVICE_ATTR_RO(registers);
1da177e4 1805
ce26bd23
GKH		 1806static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
1807 char *buf)
1da177e4
LT		 1808{
1809 struct net2280 *dev;
1810 char *next;
1811 unsigned size;
1812 unsigned long flags;
1813 int i;
1814
fae3c158 1815 dev = dev_get_drvdata(_dev);
1da177e4
LT		 1816 next = buf;
1817 size = PAGE_SIZE;
fae3c158 1818 spin_lock_irqsave(&dev->lock, flags);
1da177e4 1819
adc82f77 1820 for (i = 0; i < dev->n_ep; i++) {
fae3c158 1821 struct net2280_ep *ep = &dev->ep[i];
1da177e4
LT		 1822 struct net2280_request *req;
1823 int t;
1824
1825 if (i != 0) {
1826 const struct usb_endpoint_descriptor *d;
1827
1828 d = ep->desc;
1829 if (!d)
1830 continue;
1831 t = d->bEndpointAddress;
fae3c158 1832 t = scnprintf(next, size,
1da177e4
LT		 1833 "\n%s (ep%d%s-%s) max %04x %s fifo %d\n",
1834 ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
1835 (t & USB_DIR_IN) ? "in" : "out",
a27f37a1 1836 type_string(d->bmAttributes),
090bdb5c 1837 usb_endpoint_maxp(d),
1da177e4
LT		 1838 ep->dma ? "dma" : "pio", ep->fifo_size
1839 );
1840 } else /* ep0 should only have one transfer queued */
fae3c158 1841 t = scnprintf(next, size, "ep0 max 64 pio %s\n",
1da177e4
LT		 1842 ep->is_in ? "in" : "out");
1843 if (t <= 0 || t > size)
1844 goto done;
1845 size -= t;
1846 next += t;
1847
fae3c158
RRD		 1848 if (list_empty(&ep->queue)) {
1849 t = scnprintf(next, size, "\t(nothing queued)\n");
1da177e4
LT		 1850 if (t <= 0 || t > size)
1851 goto done;
1852 size -= t;
1853 next += t;
1854 continue;
1855 }
fae3c158
RRD		 1856 list_for_each_entry(req, &ep->queue, queue) {
1857 if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
1858 t = scnprintf(next, size,
1da177e4
LT		 1859 "\treq %p len %d/%d "
1860 "buf %p (dmacount %08x)\n",
1861 &req->req, req->req.actual,
1862 req->req.length, req->req.buf,
fae3c158 1863 readl(&ep->dma->dmacount));
1da177e4 1864 else
fae3c158 1865 t = scnprintf(next, size,
1da177e4
LT		 1866 "\treq %p len %d/%d buf %p\n",
1867 &req->req, req->req.actual,
1868 req->req.length, req->req.buf);
1869 if (t <= 0 || t > size)
1870 goto done;
1871 size -= t;
1872 next += t;
1873
1874 if (ep->dma) {
1875 struct net2280_dma *td;
1876
1877 td = req->td;
fae3c158 1878 t = scnprintf(next, size, "\t td %08x "
1da177e4
LT		 1879 " count %08x buf %08x desc %08x\n",
1880 (u32) req->td_dma,
fae3c158
RRD		 1881 le32_to_cpu(td->dmacount),
1882 le32_to_cpu(td->dmaaddr),
1883 le32_to_cpu(td->dmadesc));
1da177e4
LT		 1884 if (t <= 0 || t > size)
1885 goto done;
1886 size -= t;
1887 next += t;
1888 }
1889 }
1890 }
1891
1892done:
fae3c158 1893 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1894 return PAGE_SIZE - size;
1895}
ce26bd23 1896static DEVICE_ATTR_RO(queues);
1da177e4
LT		 1897
1898
1899#else
1900
fae3c158
RRD		 1901#define device_create_file(a, b) (0)
1902#define device_remove_file(a, b) do { } while (0)
1da177e4
LT		 1903
1904#endif
1905
1906/*-------------------------------------------------------------------------*/
1907
1908/* another driver-specific mode might be a request type doing dma
1909 * to/from another device fifo instead of to/from memory.
1910 */
1911
fae3c158 1912static void set_fifo_mode(struct net2280 *dev, int mode)
1da177e4
LT		 1913{
1914 /* keeping high bits preserves BAR2 */
fae3c158 1915 writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
1da177e4
LT		 1916
1917 /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */
fae3c158
RRD		 1918 INIT_LIST_HEAD(&dev->gadget.ep_list);
1919 list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
1920 list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
1da177e4
LT		 1921 switch (mode) {
1922 case 0:
fae3c158
RRD		 1923 list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
1924 list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list);
1925 dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
1da177e4
LT		 1926 break;
1927 case 1:
fae3c158 1928 dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048;
1da177e4
LT		 1929 break;
1930 case 2:
fae3c158
RRD		 1931 list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
1932 dev->ep[1].fifo_size = 2048;
1933 dev->ep[2].fifo_size = 1024;
1da177e4
LT		 1934 break;
1935 }
1936 /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */
fae3c158
RRD		 1937 list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list);
1938 list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list);
1da177e4
LT		 1939}
1940
adc82f77
RRD		 1941static void defect7374_disable_data_eps(struct net2280 *dev)
1942{
1943 /*
1944 * For Defect 7374, disable data EPs (and more):
1945 * - This phase undoes the earlier phase of the Defect 7374 workaround,
1946 * returing ep regs back to normal.
1947 */
1948 struct net2280_ep *ep;
1949 int i;
1950 unsigned char ep_sel;
1951 u32 tmp_reg;
1952
1953 for (i = 1; i < 5; i++) {
1954 ep = &dev->ep[i];
81e9d14a 1955 writel(i, &ep->cfg->ep_cfg);
adc82f77
RRD		 1956 }
1957
1958 /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */
1959 for (i = 0; i < 6; i++)
1960 writel(0, &dev->dep[i].dep_cfg);
1961
1962 for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
1963 /* Select an endpoint for subsequent operations: */
1964 tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
1965 writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
1966
1967 if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) ||
1968 ep_sel == 18 || ep_sel == 20)
1969 continue;
1970
1971 /* Change settings on some selected endpoints */
1972 tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
3e76fdcb 1973 tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR);
adc82f77
RRD		 1974 writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
1975 tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
3e76fdcb 1976 tmp_reg |= BIT(EP_INITIALIZED);
adc82f77
RRD		 1977 writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
1978 }
1979}
1980
1981static void defect7374_enable_data_eps_zero(struct net2280 *dev)
1982{
1983 u32 tmp = 0, tmp_reg;
5517525e 1984 u32 scratch;
adc82f77
RRD		 1985 int i;
1986 unsigned char ep_sel;
1987
1988 scratch = get_idx_reg(dev->regs, SCRATCH);
5517525e
RRD		 1989
1990 WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD))
1991 == DEFECT7374_FSM_SS_CONTROL_READ);
1992
adc82f77
RRD		 1993 scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
1994
5517525e
RRD		 1995 ep_warn(dev, "Operate Defect 7374 workaround soft this time");
1996 ep_warn(dev, "It will operate on cold-reboot and SS connect");
adc82f77 1997
5517525e
RRD		 1998 /*GPEPs:*/
1999 tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
2000 (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
2001 ((dev->enhanced_mode) ?
25d40ee8
MYK		 2002 BIT(OUT_ENDPOINT_ENABLE) | BIT(IN_ENDPOINT_ENABLE) :
2003 BIT(ENDPOINT_ENABLE)));
adc82f77 2004
5517525e
RRD		 2005 for (i = 1; i < 5; i++)
2006 writel(tmp, &dev->ep[i].cfg->ep_cfg);
adc82f77 2007
5517525e
RRD		 2008 /* CSRIN, PCIIN, STATIN, RCIN*/
2009 tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
2010 writel(tmp, &dev->dep[1].dep_cfg);
2011 writel(tmp, &dev->dep[3].dep_cfg);
2012 writel(tmp, &dev->dep[4].dep_cfg);
2013 writel(tmp, &dev->dep[5].dep_cfg);
adc82f77 2014
5517525e
RRD		 2015 /*Implemented for development and debug.
2016 * Can be refined/tuned later.*/
2017 for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
2018 /* Select an endpoint for subsequent operations: */
2019 tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
2020 writel(((tmp_reg & ~0x1f) | ep_sel),
2021 &dev->plregs->pl_ep_ctrl);
2022
2023 if (ep_sel == 1) {
2024 tmp =
2025 (readl(&dev->plregs->pl_ep_ctrl) |
2026 BIT(CLEAR_ACK_ERROR_CODE) | 0);
2027 writel(tmp, &dev->plregs->pl_ep_ctrl);
2028 continue;
adc82f77
RRD		 2029 }
2030
5517525e
RRD		 2031 if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
2032 ep_sel == 18 || ep_sel == 20)
2033 continue;
2034
2035 tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
2036 BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
2037 writel(tmp, &dev->plregs->pl_ep_cfg_4);
2038
2039 tmp = readl(&dev->plregs->pl_ep_ctrl) &
2040 ~BIT(EP_INITIALIZED);
2041 writel(tmp, &dev->plregs->pl_ep_ctrl);
adc82f77 2042
adc82f77 2043 }
5517525e
RRD		 2044
2045 /* Set FSM to focus on the first Control Read:
2046 * - Tip: Connection speed is known upon the first
2047 * setup request.*/
2048 scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
2049 set_idx_reg(dev->regs, SCRATCH, scratch);
2050
adc82f77
RRD		 2051}
2052
1da177e4
LT		 2053/* keeping it simple:
2054 * - one bus driver, initted first;
2055 * - one function driver, initted second
2056 *
2057 * most of the work to support multiple net2280 controllers would
2058 * be to associate this gadget driver (yes?) with all of them, or
2059 * perhaps to bind specific drivers to specific devices.
2060 */
2061
adc82f77 2062static void usb_reset_228x(struct net2280 *dev)
1da177e4
LT		 2063{
2064 u32 tmp;
2065
2066 dev->gadget.speed = USB_SPEED_UNKNOWN;
fae3c158 2067 (void) readl(&dev->usb->usbctl);
1da177e4 2068
fae3c158 2069 net2280_led_init(dev);
1da177e4
LT		 2070
2071 /* disable automatic responses, and irqs */
fae3c158
RRD		 2072 writel(0, &dev->usb->stdrsp);
2073 writel(0, &dev->regs->pciirqenb0);
2074 writel(0, &dev->regs->pciirqenb1);
1da177e4
LT		 2075
2076 /* clear old dma and irq state */
2077 for (tmp = 0; tmp < 4; tmp++) {
adc82f77 2078 struct net2280_ep *ep = &dev->ep[tmp + 1];
1da177e4 2079 if (ep->dma)
adc82f77 2080 abort_dma(ep);
1da177e4 2081 }
adc82f77 2082
fae3c158 2083 writel(~0, &dev->regs->irqstat0),
3e76fdcb 2084 writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
1da177e4
LT		 2085
2086 /* reset, and enable pci */
3e76fdcb
RRD		 2087 tmp = readl(&dev->regs->devinit) |
2088 BIT(PCI_ENABLE) |
2089 BIT(FIFO_SOFT_RESET) |
2090 BIT(USB_SOFT_RESET) |
2091 BIT(M8051_RESET);
fae3c158 2092 writel(tmp, &dev->regs->devinit);
1da177e4
LT		 2093
2094 /* standard fifo and endpoint allocations */
fae3c158 2095 set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0);
1da177e4
LT		 2096}
2097
adc82f77
RRD		 2098static void usb_reset_338x(struct net2280 *dev)
2099{
2100 u32 tmp;
adc82f77
RRD		 2101
2102 dev->gadget.speed = USB_SPEED_UNKNOWN;
2103 (void)readl(&dev->usb->usbctl);
2104
2105 net2280_led_init(dev);
2106
5517525e 2107 if (dev->bug7734_patched) {
adc82f77
RRD		 2108 /* disable automatic responses, and irqs */
2109 writel(0, &dev->usb->stdrsp);
2110 writel(0, &dev->regs->pciirqenb0);
2111 writel(0, &dev->regs->pciirqenb1);
2112 }
2113
2114 /* clear old dma and irq state */
2115 for (tmp = 0; tmp < 4; tmp++) {
2116 struct net2280_ep *ep = &dev->ep[tmp + 1];
3fc0a7c3 2117 struct net2280_dma_regs __iomem *dma;
adc82f77 2118
3fc0a7c3 2119 if (ep->dma) {
adc82f77 2120 abort_dma(ep);
3fc0a7c3
MYK		 2121 } else {
2122 dma = &dev->dma[tmp];
2123 writel(BIT(DMA_ABORT), &dma->dmastat);
2124 writel(0, &dma->dmactl);
2125 }
adc82f77
RRD		 2126 }
2127
2128 writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
2129
5517525e 2130 if (dev->bug7734_patched) {
adc82f77
RRD		 2131 /* reset, and enable pci */
2132 tmp = readl(&dev->regs->devinit) |
3e76fdcb
RRD		 2133 BIT(PCI_ENABLE) |
2134 BIT(FIFO_SOFT_RESET) |
2135 BIT(USB_SOFT_RESET) |
2136 BIT(M8051_RESET);
adc82f77
RRD		 2137
2138 writel(tmp, &dev->regs->devinit);
2139 }
2140
2141 /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */
2142 INIT_LIST_HEAD(&dev->gadget.ep_list);
2143
2144 for (tmp = 1; tmp < dev->n_ep; tmp++)
2145 list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list);
2146
2147}
2148
2149static void usb_reset(struct net2280 *dev)
2150{
2eeb0016 2151 if (dev->quirks & PLX_LEGACY)
adc82f77
RRD		 2152 return usb_reset_228x(dev);
2153 return usb_reset_338x(dev);
2154}
2155
2156static void usb_reinit_228x(struct net2280 *dev)
1da177e4
LT		 2157{
2158 u32 tmp;
1da177e4
LT		 2159
2160 /* basic endpoint init */
2161 for (tmp = 0; tmp < 7; tmp++) {
fae3c158 2162 struct net2280_ep *ep = &dev->ep[tmp];
1da177e4 2163
c23c3c3c
RB		 2164 ep->ep.name = ep_info_dft[tmp].name;
2165 ep->ep.caps = ep_info_dft[tmp].caps;
1da177e4
LT		 2166 ep->dev = dev;
2167 ep->num = tmp;
2168
2169 if (tmp > 0 && tmp <= 4) {
2170 ep->fifo_size = 1024;
d588ff58 2171 ep->dma = &dev->dma[tmp - 1];
1da177e4
LT		 2172 } else
2173 ep->fifo_size = 64;
fae3c158 2174 ep->regs = &dev->epregs[tmp];
adc82f77
RRD		 2175 ep->cfg = &dev->epregs[tmp];
2176 ep_reset_228x(dev->regs, ep);
1da177e4 2177 }
fae3c158
RRD		 2178 usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
2179 usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64);
2180 usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64);
1da177e4 2181
fae3c158
RRD		 2182 dev->gadget.ep0 = &dev->ep[0].ep;
2183 dev->ep[0].stopped = 0;
2184 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1da177e4
LT		 2185
2186 /* we want to prevent lowlevel/insecure access from the USB host,
2187 * but erratum 0119 means this enable bit is ignored
2188 */
2189 for (tmp = 0; tmp < 5; tmp++)
fae3c158 2190 writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
1da177e4
LT		 2191}
2192
adc82f77
RRD		 2193static void usb_reinit_338x(struct net2280 *dev)
2194{
adc82f77
RRD		 2195 int i;
2196 u32 tmp, val;
adc82f77
RRD		 2197 static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
2198 static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
2199 0x00, 0xC0, 0x00, 0xC0 };
2200
adc82f77
RRD		 2201 /* basic endpoint init */
2202 for (i = 0; i < dev->n_ep; i++) {
2203 struct net2280_ep *ep = &dev->ep[i];
2204
c23c3c3c
RB		 2205 ep->ep.name = dev->enhanced_mode ? ep_info_adv[i].name :
2206 ep_info_dft[i].name;
2207 ep->ep.caps = dev->enhanced_mode ? ep_info_adv[i].caps :
2208 ep_info_dft[i].caps;
adc82f77
RRD		 2209 ep->dev = dev;
2210 ep->num = i;
2211
d588ff58 2212 if (i > 0 && i <= 4)
adc82f77
RRD		 2213 ep->dma = &dev->dma[i - 1];
2214
2215 if (dev->enhanced_mode) {
2216 ep->cfg = &dev->epregs[ne[i]];
c65c4f05
MYK		 2217 /*
2218 * Set USB endpoint number, hardware allows same number
2219 * in both directions.
2220 */
2221 if (i > 0 && i < 5)
2222 writel(ne[i], &ep->cfg->ep_cfg);
adc82f77 2223 ep->regs = (struct net2280_ep_regs __iomem *)
c43e97b2 2224 (((void __iomem *)&dev->epregs[ne[i]]) +
adc82f77 2225 ep_reg_addr[i]);
adc82f77
RRD		 2226 } else {
2227 ep->cfg = &dev->epregs[i];
2228 ep->regs = &dev->epregs[i];
adc82f77
RRD		 2229 }
2230
2231 ep->fifo_size = (i != 0) ? 2048 : 512;
2232
2233 ep_reset_338x(dev->regs, ep);
2234 }
2235 usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512);
2236
2237 dev->gadget.ep0 = &dev->ep[0].ep;
2238 dev->ep[0].stopped = 0;
2239
2240 /* Link layer set up */
5517525e 2241 if (dev->bug7734_patched) {
adc82f77 2242 tmp = readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2243 ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
adc82f77
RRD		 2244 writel(tmp, &dev->usb_ext->usbctl2);
2245 }
2246
2247 /* Hardware Defect and Workaround */
2248 val = readl(&dev->ll_lfps_regs->ll_lfps_5);
2249 val &= ~(0xf << TIMER_LFPS_6US);
2250 val |= 0x5 << TIMER_LFPS_6US;
2251 writel(val, &dev->ll_lfps_regs->ll_lfps_5);
2252
2253 val = readl(&dev->ll_lfps_regs->ll_lfps_6);
2254 val &= ~(0xffff << TIMER_LFPS_80US);
2255 val |= 0x0100 << TIMER_LFPS_80US;
2256 writel(val, &dev->ll_lfps_regs->ll_lfps_6);
2257
2258 /*
2259 * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB
2260 * Hot Reset Exit Handshake may Fail in Specific Case using
2261 * Default Register Settings. Workaround for Enumeration test.
2262 */
2263 val = readl(&dev->ll_tsn_regs->ll_tsn_counters_2);
2264 val &= ~(0x1f << HOT_TX_NORESET_TS2);
2265 val |= 0x10 << HOT_TX_NORESET_TS2;
2266 writel(val, &dev->ll_tsn_regs->ll_tsn_counters_2);
2267
2268 val = readl(&dev->ll_tsn_regs->ll_tsn_counters_3);
2269 val &= ~(0x1f << HOT_RX_RESET_TS2);
2270 val |= 0x3 << HOT_RX_RESET_TS2;
2271 writel(val, &dev->ll_tsn_regs->ll_tsn_counters_3);
2272
2273 /*
2274 * Set Recovery Idle to Recover bit:
2275 * - On SS connections, setting Recovery Idle to Recover Fmw improves
2276 * link robustness with various hosts and hubs.
2277 * - It is safe to set for all connection speeds; all chip revisions.
2278 * - R-M-W to leave other bits undisturbed.
2279 * - Reference PLX TT-7372
1ff767bf 2280 */
adc82f77 2281 val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit);
3e76fdcb 2282 val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW);
adc82f77
RRD		 2283 writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit);
2284
2285 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
2286
2287 /* disable dedicated endpoints */
2288 writel(0x0D, &dev->dep[0].dep_cfg);
2289 writel(0x0D, &dev->dep[1].dep_cfg);
2290 writel(0x0E, &dev->dep[2].dep_cfg);
2291 writel(0x0E, &dev->dep[3].dep_cfg);
2292 writel(0x0F, &dev->dep[4].dep_cfg);
2293 writel(0x0C, &dev->dep[5].dep_cfg);
2294}
2295
2296static void usb_reinit(struct net2280 *dev)
2297{
2eeb0016 2298 if (dev->quirks & PLX_LEGACY)
adc82f77
RRD		 2299 return usb_reinit_228x(dev);
2300 return usb_reinit_338x(dev);
2301}
2302
2303static void ep0_start_228x(struct net2280 *dev)
1da177e4 2304{
3e76fdcb
RRD		 2305 writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
2306 BIT(CLEAR_NAK_OUT_PACKETS) |
ae8e530a
RRD		 2307 BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
2308 &dev->epregs[0].ep_rsp);
1da177e4
LT		 2309
2310 /*
2311 * hardware optionally handles a bunch of standard requests
2312 * that the API hides from drivers anyway. have it do so.
2313 * endpoint status/features are handled in software, to
2314 * help pass tests for some dubious behavior.
2315 */
3e76fdcb
RRD		 2316 writel(BIT(SET_TEST_MODE) |
2317 BIT(SET_ADDRESS) |
2318 BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) |
2319 BIT(GET_DEVICE_STATUS) |
ae8e530a
RRD		 2320 BIT(GET_INTERFACE_STATUS),
2321 &dev->usb->stdrsp);
3e76fdcb
RRD		 2322 writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
2323 BIT(SELF_POWERED_USB_DEVICE) |
2324 BIT(REMOTE_WAKEUP_SUPPORT) |
2325 (dev->softconnect << USB_DETECT_ENABLE) |
2326 BIT(SELF_POWERED_STATUS),
2327 &dev->usb->usbctl);
1da177e4
LT		 2328
2329 /* enable irqs so we can see ep0 and general operation */
3e76fdcb
RRD		 2330 writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
2331 BIT(ENDPOINT_0_INTERRUPT_ENABLE),
2332 &dev->regs->pciirqenb0);
2333 writel(BIT(PCI_INTERRUPT_ENABLE) |
2334 BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) |
2335 BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) |
2336 BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) |
2337 BIT(VBUS_INTERRUPT_ENABLE) |
2338 BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
2339 BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE),
2340 &dev->regs->pciirqenb1);
1da177e4
LT		 2341
2342 /* don't leave any writes posted */
fae3c158 2343 (void) readl(&dev->usb->usbctl);
1da177e4
LT		 2344}
2345
adc82f77
RRD		 2346static void ep0_start_338x(struct net2280 *dev)
2347{
adc82f77 2348
5517525e 2349 if (dev->bug7734_patched)
3e76fdcb
RRD		 2350 writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
2351 BIT(SET_EP_HIDE_STATUS_PHASE),
adc82f77
RRD		 2352 &dev->epregs[0].ep_rsp);
2353
2354 /*
2355 * hardware optionally handles a bunch of standard requests
2356 * that the API hides from drivers anyway. have it do so.
2357 * endpoint status/features are handled in software, to
2358 * help pass tests for some dubious behavior.
2359 */
3e76fdcb
RRD		 2360 writel(BIT(SET_ISOCHRONOUS_DELAY) |
2361 BIT(SET_SEL) |
2362 BIT(SET_TEST_MODE) |
2363 BIT(SET_ADDRESS) |
2364 BIT(GET_INTERFACE_STATUS) |
2365 BIT(GET_DEVICE_STATUS),
adc82f77
RRD		 2366 &dev->usb->stdrsp);
2367 dev->wakeup_enable = 1;
3e76fdcb 2368 writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
adc82f77 2369 (dev->softconnect << USB_DETECT_ENABLE) |
3e76fdcb 2370 BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
adc82f77
RRD		 2371 &dev->usb->usbctl);
2372
2373 /* enable irqs so we can see ep0 and general operation */
3e76fdcb 2374 writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
ae8e530a
RRD		 2375 BIT(ENDPOINT_0_INTERRUPT_ENABLE),
2376 &dev->regs->pciirqenb0);
3e76fdcb
RRD		 2377 writel(BIT(PCI_INTERRUPT_ENABLE) |
2378 BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
2379 BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) |
2380 BIT(VBUS_INTERRUPT_ENABLE),
adc82f77
RRD		 2381 &dev->regs->pciirqenb1);
2382
2383 /* don't leave any writes posted */
2384 (void)readl(&dev->usb->usbctl);
2385}
2386
2387static void ep0_start(struct net2280 *dev)
2388{
2eeb0016 2389 if (dev->quirks & PLX_LEGACY)
adc82f77
RRD		 2390 return ep0_start_228x(dev);
2391 return ep0_start_338x(dev);
2392}
2393
1da177e4
LT		 2394/* when a driver is successfully registered, it will receive
2395 * control requests including set_configuration(), which enables
2396 * non-control requests. then usb traffic follows until a
2397 * disconnect is reported. then a host may connect again, or
2398 * the driver might get unbound.
2399 */
4cf5e00b
FB		 2400static int net2280_start(struct usb_gadget *_gadget,
2401 struct usb_gadget_driver *driver)
1da177e4 2402{
4cf5e00b 2403 struct net2280 *dev;
1da177e4
LT		 2404 int retval;
2405 unsigned i;
2406
2407 /* insist on high speed support from the driver, since
2408 * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
2409 * "must not be used in normal operation"
2410 */
ae8e530a
RRD		 2411 if (!driver || driver->max_speed < USB_SPEED_HIGH ||
2412 !driver->setup)
1da177e4 2413 return -EINVAL;
4cf5e00b 2414
fae3c158 2415 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 2416
adc82f77 2417 for (i = 0; i < dev->n_ep; i++)
fae3c158 2418 dev->ep[i].irqs = 0;
1da177e4
LT		 2419
2420 /* hook up the driver ... */
1da177e4
LT		 2421 driver->driver.bus = NULL;
2422 dev->driver = driver;
1da177e4 2423
fae3c158
RRD		 2424 retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
2425 if (retval)
2426 goto err_unbind;
2427 retval = device_create_file(&dev->pdev->dev, &dev_attr_queues);
2428 if (retval)
2429 goto err_func;
1da177e4 2430
7a74c481 2431 /* enable host detection and ep0; and we're ready
1da177e4
LT		 2432 * for set_configuration as well as eventual disconnect.
2433 */
fae3c158 2434 net2280_led_active(dev, 1);
adc82f77 2435
5185c913 2436 if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
adc82f77
RRD		 2437 defect7374_enable_data_eps_zero(dev);
2438
fae3c158 2439 ep0_start(dev);
1da177e4 2440
1da177e4
LT		 2441 /* pci writes may still be posted */
2442 return 0;
b3899dac
JG		 2443
2444err_func:
fae3c158 2445 device_remove_file(&dev->pdev->dev, &dev_attr_function);
b3899dac 2446err_unbind:
b3899dac
JG		 2447 dev->driver = NULL;
2448 return retval;
1da177e4 2449}
1da177e4 2450
fae3c158 2451static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver)
1da177e4
LT		 2452{
2453 int i;
2454
2455 /* don't disconnect if it's not connected */
2456 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
2457 driver = NULL;
2458
2459 /* stop hardware; prevent new request submissions;
2460 * and kill any outstanding requests.
2461 */
fae3c158 2462 usb_reset(dev);
adc82f77 2463 for (i = 0; i < dev->n_ep; i++)
fae3c158 2464 nuke(&dev->ep[i]);
1da177e4 2465
699412d9 2466 /* report disconnect; the driver is already quiesced */
dec3c23c
AS		 2467 if (driver) {
2468 spin_unlock(&dev->lock);
699412d9 2469 driver->disconnect(&dev->gadget);
dec3c23c
AS		 2470 spin_lock(&dev->lock);
2471 }
699412d9 2472
fae3c158 2473 usb_reinit(dev);
1da177e4
LT		 2474}
2475
22835b80 2476static int net2280_stop(struct usb_gadget *_gadget)
1da177e4 2477{
4cf5e00b 2478 struct net2280 *dev;
1da177e4
LT		 2479 unsigned long flags;
2480
fae3c158 2481 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 2482
fae3c158 2483 spin_lock_irqsave(&dev->lock, flags);
bfd0ed57 2484 stop_activity(dev, NULL);
fae3c158 2485 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4 2486
fae3c158 2487 net2280_led_active(dev, 0);
2f076077 2488
fae3c158
RRD		 2489 device_remove_file(&dev->pdev->dev, &dev_attr_function);
2490 device_remove_file(&dev->pdev->dev, &dev_attr_queues);
1da177e4 2491
bfd0ed57 2492 dev->driver = NULL;
84237bfb 2493
1da177e4
LT		 2494 return 0;
2495}
1da177e4
LT		 2496
2497/*-------------------------------------------------------------------------*/
2498
2499/* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq.
2500 * also works for dma-capable endpoints, in pio mode or just
2501 * to manually advance the queue after short OUT transfers.
2502 */
fae3c158 2503static void handle_ep_small(struct net2280_ep *ep)
1da177e4
LT		 2504{
2505 struct net2280_request *req;
2506 u32 t;
2507 /* 0 error, 1 mid-data, 2 done */
2508 int mode = 1;
2509
fae3c158
RRD		 2510 if (!list_empty(&ep->queue))
2511 req = list_entry(ep->queue.next,
1da177e4
LT		 2512 struct net2280_request, queue);
2513 else
2514 req = NULL;
2515
2516 /* ack all, and handle what we care about */
fae3c158 2517 t = readl(&ep->regs->ep_stat);
1da177e4 2518 ep->irqs++;
cb442ee1 2519
e56e69cc 2520 ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n",
fc12c68b 2521 ep->ep.name, t, req ? &req->req : NULL);
cb442ee1 2522
2eeb0016 2523 if (!ep->is_in || (ep->dev->quirks & PLX_2280))
3e76fdcb 2524 writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
950ee4c8
GL		 2525 else
2526 /* Added for 2282 */
fae3c158 2527 writel(t, &ep->regs->ep_stat);
1da177e4
LT		 2528
2529 /* for ep0, monitor token irqs to catch data stage length errors
2530 * and to synchronize on status.
2531 *
2532 * also, to defer reporting of protocol stalls ... here's where
2533 * data or status first appears, handling stalls here should never
2534 * cause trouble on the host side..
2535 *
2536 * control requests could be slightly faster without token synch for
2537 * status, but status can jam up that way.
2538 */
fae3c158 2539 if (unlikely(ep->num == 0)) {
1da177e4
LT		 2540 if (ep->is_in) {
2541 /* status; stop NAKing */
3e76fdcb 2542 if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) {
1da177e4
LT		 2543 if (ep->dev->protocol_stall) {
2544 ep->stopped = 1;
fae3c158 2545 set_halt(ep);
1da177e4
LT		 2546 }
2547 if (!req)
fae3c158 2548 allow_status(ep);
1da177e4
LT		 2549 mode = 2;
2550 /* reply to extra IN data tokens with a zlp */
3e76fdcb 2551 } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
1da177e4
LT		 2552 if (ep->dev->protocol_stall) {
2553 ep->stopped = 1;
fae3c158 2554 set_halt(ep);
1da177e4 2555 mode = 2;
1f26e28d
AS		 2556 } else if (ep->responded &&
2557 !req && !ep->stopped)
fae3c158 2558 write_fifo(ep, NULL);
1da177e4
LT		 2559 }
2560 } else {
2561 /* status; stop NAKing */
3e76fdcb 2562 if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
1da177e4
LT		 2563 if (ep->dev->protocol_stall) {
2564 ep->stopped = 1;
fae3c158 2565 set_halt(ep);
1da177e4
LT		 2566 }
2567 mode = 2;
2568 /* an extra OUT token is an error */
ae8e530a
RRD		 2569 } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) &&
2570 req &&
2571 req->req.actual == req->req.length) ||
2572 (ep->responded && !req)) {
1da177e4 2573 ep->dev->protocol_stall = 1;
fae3c158 2574 set_halt(ep);
1da177e4
LT		 2575 ep->stopped = 1;
2576 if (req)
fae3c158 2577 done(ep, req, -EOVERFLOW);
1da177e4
LT		 2578 req = NULL;
2579 }
2580 }
2581 }
2582
fae3c158 2583 if (unlikely(!req))
1da177e4
LT		 2584 return;
2585
2586 /* manual DMA queue advance after short OUT */
fae3c158 2587 if (likely(ep->dma)) {
3e76fdcb 2588 if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
1de2ebfb 2589 struct net2280_request *stuck_req = NULL;
1da177e4 2590 int stopped = ep->stopped;
1de2ebfb
JK		 2591 int num_completed;
2592 int stuck = 0;
2593 u32 count;
1da177e4
LT		 2594
2595 /* TRANSFERRED works around OUT_DONE erratum 0112.
2596 * we expect (N <= maxpacket) bytes; host wrote M.
2597 * iff (M < N) we won't ever see a DMA interrupt.
2598 */
2599 ep->stopped = 1;
fae3c158 2600 for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
1da177e4
LT		 2601
2602 /* any preceding dma transfers must finish.
2603 * dma handles (M >= N), may empty the queue
2604 */
1de2ebfb 2605 num_completed = scan_dma_completions(ep);
ae8e530a
RRD		 2606 if (unlikely(list_empty(&ep->queue) ||
2607 ep->out_overflow)) {
1da177e4
LT		 2608 req = NULL;
2609 break;
2610 }
fae3c158 2611 req = list_entry(ep->queue.next,
1da177e4
LT		 2612 struct net2280_request, queue);
2613
2614 /* here either (M < N), a "real" short rx;
2615 * or (M == N) and the queue didn't empty
2616 */
3e76fdcb 2617 if (likely(t & BIT(FIFO_EMPTY))) {
fae3c158 2618 count = readl(&ep->dma->dmacount);
1da177e4 2619 count &= DMA_BYTE_COUNT_MASK;
fae3c158 2620 if (readl(&ep->dma->dmadesc)
1da177e4
LT		 2621 != req->td_dma)
2622 req = NULL;
2623 break;
2624 }
1de2ebfb
JK		 2625
2626 /* Escape loop if no dma transfers completed
2627 * after few retries.
2628 */
2629 if (num_completed == 0) {
2630 if (stuck_req == req &&
2631 readl(&ep->dma->dmadesc) !=
2632 req->td_dma && stuck++ > 5) {
2633 count = readl(
2634 &ep->dma->dmacount);
2635 count &= DMA_BYTE_COUNT_MASK;
2636 req = NULL;
2637 ep_dbg(ep->dev, "%s escape stuck %d, count %u\n",
2638 ep->ep.name, stuck,
2639 count);
2640 break;
2641 } else if (stuck_req != req) {
2642 stuck_req = req;
2643 stuck = 0;
2644 }
2645 } else {
2646 stuck_req = NULL;
2647 stuck = 0;
2648 }
2649
1da177e4
LT		 2650 udelay(1);
2651 }
2652
2653 /* stop DMA, leave ep NAKing */
3e76fdcb 2654 writel(BIT(DMA_ABORT), &ep->dma->dmastat);
fae3c158 2655 spin_stop_dma(ep->dma);
1da177e4 2656
fae3c158 2657 if (likely(req)) {
1da177e4 2658 req->td->dmacount = 0;
fae3c158
RRD		 2659 t = readl(&ep->regs->ep_avail);
2660 dma_done(ep, req, count,
901b3d75
DB		 2661 (ep->out_overflow || t)
2662 ? -EOVERFLOW : 0);
1da177e4
LT		 2663 }
2664
2665 /* also flush to prevent erratum 0106 trouble */
ae8e530a
RRD		 2666 if (unlikely(ep->out_overflow ||
2667 (ep->dev->chiprev == 0x0100 &&
2668 ep->dev->gadget.speed
2669 == USB_SPEED_FULL))) {
fae3c158 2670 out_flush(ep);
1da177e4
LT		 2671 ep->out_overflow = 0;
2672 }
2673
2674 /* (re)start dma if needed, stop NAKing */
2675 ep->stopped = stopped;
fae3c158
RRD		 2676 if (!list_empty(&ep->queue))
2677 restart_dma(ep);
1da177e4 2678 } else
e56e69cc 2679 ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n",
1da177e4
LT		 2680 ep->ep.name, t);
2681 return;
2682
2683 /* data packet(s) received (in the fifo, OUT) */
3e76fdcb 2684 } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) {
fae3c158 2685 if (read_fifo(ep, req) && ep->num != 0)
1da177e4
LT		 2686 mode = 2;
2687
2688 /* data packet(s) transmitted (IN) */
3e76fdcb 2689 } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) {
1da177e4
LT		 2690 unsigned len;
2691
2692 len = req->req.length - req->req.actual;
2693 if (len > ep->ep.maxpacket)
2694 len = ep->ep.maxpacket;
2695 req->req.actual += len;
2696
2697 /* if we wrote it all, we're usually done */
fae3c158
RRD		 2698 /* send zlps until the status stage */
2699 if ((req->req.actual == req->req.length) &&
2700 (!req->req.zero || len != ep->ep.maxpacket) && ep->num)
1da177e4 2701 mode = 2;
1da177e4
LT		 2702
2703 /* there was nothing to do ... */
2704 } else if (mode == 1)
2705 return;
2706
2707 /* done */
2708 if (mode == 2) {
2709 /* stream endpoints often resubmit/unlink in completion */
fae3c158 2710 done(ep, req, 0);
1da177e4
LT		 2711
2712 /* maybe advance queue to next request */
2713 if (ep->num == 0) {
2714 /* NOTE: net2280 could let gadget driver start the
2715 * status stage later. since not all controllers let
2716 * them control that, the api doesn't (yet) allow it.
2717 */
2718 if (!ep->stopped)
fae3c158 2719 allow_status(ep);
1da177e4
LT		 2720 req = NULL;
2721 } else {
fae3c158
RRD		 2722 if (!list_empty(&ep->queue) && !ep->stopped)
2723 req = list_entry(ep->queue.next,
1da177e4
LT		 2724 struct net2280_request, queue);
2725 else
2726 req = NULL;
2727 if (req && !ep->is_in)
fae3c158 2728 stop_out_naking(ep);
1da177e4
LT		 2729 }
2730 }
2731
2732 /* is there a buffer for the next packet?
2733 * for best streaming performance, make sure there is one.
2734 */
2735 if (req && !ep->stopped) {
2736
2737 /* load IN fifo with next packet (may be zlp) */
3e76fdcb 2738 if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT))
fae3c158 2739 write_fifo(ep, &req->req);
1da177e4
LT		 2740 }
2741}
2742
fae3c158 2743static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex)
1da177e4
LT		 2744{
2745 struct net2280_ep *ep;
2746
2747 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
fae3c158
RRD		 2748 return &dev->ep[0];
2749 list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1da177e4
LT		 2750 u8 bEndpointAddress;
2751
2752 if (!ep->desc)
2753 continue;
2754 bEndpointAddress = ep->desc->bEndpointAddress;
2755 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
2756 continue;
2757 if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
2758 return ep;
2759 }
2760 return NULL;
2761}
2762
adc82f77
RRD		 2763static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
2764{
2765 u32 scratch, fsmvalue;
2766 u32 ack_wait_timeout, state;
2767
2768 /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */
2769 scratch = get_idx_reg(dev->regs, SCRATCH);
2770 fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
2771 scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
2772
2773 if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) &&
2774 (r.bRequestType & USB_DIR_IN)))
2775 return;
2776
2777 /* This is the first Control Read for this connection: */
3e76fdcb 2778 if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
adc82f77
RRD		 2779 /*
2780 * Connection is NOT SS:
2781 * - Connection must be FS or HS.
2782 * - This FSM state should allow workaround software to
2783 * run after the next USB connection.
2784 */
2785 scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
5517525e 2786 dev->bug7734_patched = 1;
adc82f77
RRD		 2787 goto restore_data_eps;
2788 }
2789
2790 /* Connection is SS: */
2791 for (ack_wait_timeout = 0;
2792 ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS;
2793 ack_wait_timeout++) {
2794
2795 state = readl(&dev->plregs->pl_ep_status_1)
2796 & (0xff << STATE);
2797 if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
2798 (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
2799 scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
5517525e 2800 dev->bug7734_patched = 1;
adc82f77
RRD		 2801 break;
2802 }
2803
2804 /*
2805 * We have not yet received host's Data Phase ACK
2806 * - Wait and try again.
2807 */
2808 udelay(DEFECT_7374_PROCESSOR_WAIT_TIME);
2809
2810 continue;
2811 }
2812
2813
2814 if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) {
e56e69cc 2815 ep_err(dev, "FAIL: Defect 7374 workaround waited but failed "
adc82f77 2816 "to detect SS host's data phase ACK.");
e56e69cc 2817 ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16"
adc82f77
RRD		 2818 "got 0x%2.2x.\n", state >> STATE);
2819 } else {
e56e69cc 2820 ep_warn(dev, "INFO: Defect 7374 workaround waited about\n"
adc82f77
RRD		 2821 "%duSec for Control Read Data Phase ACK\n",
2822 DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout);
2823 }
2824
2825restore_data_eps:
2826 /*
2827 * Restore data EPs to their pre-workaround settings (disabled,
2828 * initialized, and other details).
2829 */
2830 defect7374_disable_data_eps(dev);
2831
2832 set_idx_reg(dev->regs, SCRATCH, scratch);
2833
2834 return;
2835}
2836
e0cbb046 2837static void ep_clear_seqnum(struct net2280_ep *ep)
adc82f77
RRD		 2838{
2839 struct net2280 *dev = ep->dev;
2840 u32 val;
2841 static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 };
2842
e0cbb046
RRD		 2843 val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f;
2844 val |= ep_pl[ep->num];
2845 writel(val, &dev->plregs->pl_ep_ctrl);
2846 val |= BIT(SEQUENCE_NUMBER_RESET);
2847 writel(val, &dev->plregs->pl_ep_ctrl);
adc82f77 2848
e0cbb046 2849 return;
adc82f77
RRD		 2850}
2851
adc82f77
RRD		 2852static void handle_stat0_irqs_superspeed(struct net2280 *dev,
2853 struct net2280_ep *ep, struct usb_ctrlrequest r)
2854{
2855 int tmp = 0;
2856
2857#define w_value le16_to_cpu(r.wValue)
2858#define w_index le16_to_cpu(r.wIndex)
2859#define w_length le16_to_cpu(r.wLength)
2860
2861 switch (r.bRequest) {
2862 struct net2280_ep *e;
2863 u16 status;
2864
2865 case USB_REQ_SET_CONFIGURATION:
2866 dev->addressed_state = !w_value;
2867 goto usb3_delegate;
2868
2869 case USB_REQ_GET_STATUS:
2870 switch (r.bRequestType) {
2871 case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
2872 status = dev->wakeup_enable ? 0x02 : 0x00;
c8678d9f 2873 if (dev->gadget.is_selfpowered)
3e76fdcb 2874 status |= BIT(0);
adc82f77
RRD		 2875 status |= (dev->u1_enable << 2 | dev->u2_enable << 3 |
2876 dev->ltm_enable << 4);
2877 writel(0, &dev->epregs[0].ep_irqenb);
2878 set_fifo_bytecount(ep, sizeof(status));
2879 writel((__force u32) status, &dev->epregs[0].ep_data);
2880 allow_status_338x(ep);
2881 break;
2882
2883 case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
2884 e = get_ep_by_addr(dev, w_index);
2885 if (!e)
2886 goto do_stall3;
2887 status = readl(&e->regs->ep_rsp) &
3e76fdcb 2888 BIT(CLEAR_ENDPOINT_HALT);
adc82f77
RRD		 2889 writel(0, &dev->epregs[0].ep_irqenb);
2890 set_fifo_bytecount(ep, sizeof(status));
2891 writel((__force u32) status, &dev->epregs[0].ep_data);
2892 allow_status_338x(ep);
2893 break;
2894
2895 default:
2896 goto usb3_delegate;
2897 }
2898 break;
2899
2900 case USB_REQ_CLEAR_FEATURE:
2901 switch (r.bRequestType) {
2902 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
2903 if (!dev->addressed_state) {
2904 switch (w_value) {
2905 case USB_DEVICE_U1_ENABLE:
2906 dev->u1_enable = 0;
2907 writel(readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2908 ~BIT(U1_ENABLE),
adc82f77
RRD		 2909 &dev->usb_ext->usbctl2);
2910 allow_status_338x(ep);
2911 goto next_endpoints3;
2912
2913 case USB_DEVICE_U2_ENABLE:
2914 dev->u2_enable = 0;
2915 writel(readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2916 ~BIT(U2_ENABLE),
adc82f77
RRD		 2917 &dev->usb_ext->usbctl2);
2918 allow_status_338x(ep);
2919 goto next_endpoints3;
2920
2921 case USB_DEVICE_LTM_ENABLE:
2922 dev->ltm_enable = 0;
2923 writel(readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2924 ~BIT(LTM_ENABLE),
adc82f77
RRD		 2925 &dev->usb_ext->usbctl2);
2926 allow_status_338x(ep);
2927 goto next_endpoints3;
2928
2929 default:
2930 break;
2931 }
2932 }
2933 if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
2934 dev->wakeup_enable = 0;
2935 writel(readl(&dev->usb->usbctl) &
3e76fdcb 2936 ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
adc82f77
RRD		 2937 &dev->usb->usbctl);
2938 allow_status_338x(ep);
2939 break;
2940 }
2941 goto usb3_delegate;
2942
2943 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
2944 e = get_ep_by_addr(dev, w_index);
2945 if (!e)
2946 goto do_stall3;
2947 if (w_value != USB_ENDPOINT_HALT)
2948 goto do_stall3;
e56e69cc 2949 ep_vdbg(dev, "%s clear halt\n", e->ep.name);
e0cbb046
RRD		 2950 /*
2951 * Workaround for SS SeqNum not cleared via
2952 * Endpoint Halt (Clear) bit. select endpoint
2953 */
2954 ep_clear_seqnum(e);
2955 clear_halt(e);
adc82f77
RRD		 2956 if (!list_empty(&e->queue) && e->td_dma)
2957 restart_dma(e);
2958 allow_status(ep);
2959 ep->stopped = 1;
2960 break;
2961
2962 default:
2963 goto usb3_delegate;
2964 }
2965 break;
2966 case USB_REQ_SET_FEATURE:
2967 switch (r.bRequestType) {
2968 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
2969 if (!dev->addressed_state) {
2970 switch (w_value) {
2971 case USB_DEVICE_U1_ENABLE:
2972 dev->u1_enable = 1;
2973 writel(readl(&dev->usb_ext->usbctl2) |
3e76fdcb 2974 BIT(U1_ENABLE),
adc82f77
RRD		 2975 &dev->usb_ext->usbctl2);
2976 allow_status_338x(ep);
2977 goto next_endpoints3;
2978
2979 case USB_DEVICE_U2_ENABLE:
2980 dev->u2_enable = 1;
2981 writel(readl(&dev->usb_ext->usbctl2) |
3e76fdcb 2982 BIT(U2_ENABLE),
adc82f77
RRD		 2983 &dev->usb_ext->usbctl2);
2984 allow_status_338x(ep);
2985 goto next_endpoints3;
2986
2987 case USB_DEVICE_LTM_ENABLE:
2988 dev->ltm_enable = 1;
2989 writel(readl(&dev->usb_ext->usbctl2) |
3e76fdcb 2990 BIT(LTM_ENABLE),
adc82f77
RRD		 2991 &dev->usb_ext->usbctl2);
2992 allow_status_338x(ep);
2993 goto next_endpoints3;
2994 default:
2995 break;
2996 }
2997 }
2998
2999 if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
3000 dev->wakeup_enable = 1;
3001 writel(readl(&dev->usb->usbctl) |
3e76fdcb 3002 BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
adc82f77
RRD		 3003 &dev->usb->usbctl);
3004 allow_status_338x(ep);
3005 break;
3006 }
3007 goto usb3_delegate;
3008
3009 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
3010 e = get_ep_by_addr(dev, w_index);
3011 if (!e || (w_value != USB_ENDPOINT_HALT))
3012 goto do_stall3;
cf8b1cde
RRD		 3013 ep->stopped = 1;
3014 if (ep->num == 0)
3015 ep->dev->protocol_stall = 1;
3016 else {
3017 if (ep->dma)
e721c457 3018 abort_dma(ep);
e0cbb046 3019 set_halt(ep);
cf8b1cde 3020 }
adc82f77
RRD		 3021 allow_status_338x(ep);
3022 break;
3023
3024 default:
3025 goto usb3_delegate;
3026 }
3027
3028 break;
3029 default:
3030
3031usb3_delegate:
e56e69cc 3032 ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n",
adc82f77
RRD		 3033 r.bRequestType, r.bRequest,
3034 w_value, w_index, w_length,
3035 readl(&ep->cfg->ep_cfg));
3036
3037 ep->responded = 0;
3038 spin_unlock(&dev->lock);
3039 tmp = dev->driver->setup(&dev->gadget, &r);
3040 spin_lock(&dev->lock);
3041 }
3042do_stall3:
3043 if (tmp < 0) {
e56e69cc 3044 ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
adc82f77
RRD		 3045 r.bRequestType, r.bRequest, tmp);
3046 dev->protocol_stall = 1;
3047 /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */
e0cbb046 3048 set_halt(ep);
adc82f77
RRD		 3049 }
3050
3051next_endpoints3:
3052
3053#undef w_value
3054#undef w_index
3055#undef w_length
3056
3057 return;
3058}
3059
a09e23f5
MYK		 3060static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0)
3061{
3062 u32 index;
3063 u32 bit;
3064
3065 for (index = 0; index < ARRAY_SIZE(ep_bit); index++) {
3066 bit = BIT(ep_bit[index]);
3067
3068 if (!stat0)
3069 break;
3070
3071 if (!(stat0 & bit))
3072 continue;
3073
3074 stat0 &= ~bit;
3075
3076 handle_ep_small(&dev->ep[index]);
3077 }
3078}
3079
fae3c158 3080static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
1da177e4
LT		 3081{
3082 struct net2280_ep *ep;
3083 u32 num, scratch;
3084
3085 /* most of these don't need individual acks */
3e76fdcb 3086 stat &= ~BIT(INTA_ASSERTED);
1da177e4
LT		 3087 if (!stat)
3088 return;
e56e69cc 3089 /* ep_dbg(dev, "irqstat0 %04x\n", stat); */
1da177e4
LT		 3090
3091 /* starting a control request? */
3e76fdcb 3092 if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) {
1da177e4 3093 union {
fae3c158 3094 u32 raw[2];
1da177e4
LT		 3095 struct usb_ctrlrequest r;
3096 } u;
950ee4c8 3097 int tmp;
1da177e4
LT		 3098 struct net2280_request *req;
3099
3100 if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
adc82f77 3101 u32 val = readl(&dev->usb->usbstat);
3e76fdcb 3102 if (val & BIT(SUPER_SPEED)) {
adc82f77
RRD		 3103 dev->gadget.speed = USB_SPEED_SUPER;
3104 usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
3105 EP0_SS_MAX_PACKET_SIZE);
3e76fdcb 3106 } else if (val & BIT(HIGH_SPEED)) {
1da177e4 3107 dev->gadget.speed = USB_SPEED_HIGH;
adc82f77
RRD		 3108 usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
3109 EP0_HS_MAX_PACKET_SIZE);
3110 } else {
1da177e4 3111 dev->gadget.speed = USB_SPEED_FULL;
adc82f77
RRD		 3112 usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
3113 EP0_HS_MAX_PACKET_SIZE);
3114 }
fae3c158 3115 net2280_led_speed(dev, dev->gadget.speed);
e56e69cc 3116 ep_dbg(dev, "%s\n",
fae3c158 3117 usb_speed_string(dev->gadget.speed));
1da177e4
LT		 3118 }
3119
fae3c158 3120 ep = &dev->ep[0];
1da177e4
LT		 3121 ep->irqs++;
3122
3123 /* make sure any leftover request state is cleared */
3e76fdcb 3124 stat &= ~BIT(ENDPOINT_0_INTERRUPT);
fae3c158
RRD		 3125 while (!list_empty(&ep->queue)) {
3126 req = list_entry(ep->queue.next,
1da177e4 3127 struct net2280_request, queue);
fae3c158 3128 done(ep, req, (req->req.actual == req->req.length)
1da177e4
LT		 3129 ? 0 : -EPROTO);
3130 }
3131 ep->stopped = 0;
3132 dev->protocol_stall = 0;
5185c913 3133 if (!(dev->quirks & PLX_PCIE)) {
2eeb0016 3134 if (ep->dev->quirks & PLX_2280)
3e76fdcb
RRD		 3135 tmp = BIT(FIFO_OVERFLOW) |
3136 BIT(FIFO_UNDERFLOW);
adc82f77
RRD		 3137 else
3138 tmp = 0;
3139
3e76fdcb
RRD		 3140 writel(tmp | BIT(TIMEOUT) |
3141 BIT(USB_STALL_SENT) |
3142 BIT(USB_IN_NAK_SENT) |
3143 BIT(USB_IN_ACK_RCVD) |
3144 BIT(USB_OUT_PING_NAK_SENT) |
3145 BIT(USB_OUT_ACK_SENT) |
3146 BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
3147 BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
3148 BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
3149 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
3150 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
ae8e530a
RRD		 3151 BIT(DATA_IN_TOKEN_INTERRUPT),
3152 &ep->regs->ep_stat);
adc82f77
RRD		 3153 }
3154 u.raw[0] = readl(&dev->usb->setup0123);
3155 u.raw[1] = readl(&dev->usb->setup4567);
901b3d75 3156
fae3c158
RRD		 3157 cpu_to_le32s(&u.raw[0]);
3158 cpu_to_le32s(&u.raw[1]);
1da177e4 3159
5185c913 3160 if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
adc82f77
RRD		 3161 defect7374_workaround(dev, u.r);
3162
950ee4c8
GL		 3163 tmp = 0;
3164
01ee7d70
DB		 3165#define w_value le16_to_cpu(u.r.wValue)
3166#define w_index le16_to_cpu(u.r.wIndex)
3167#define w_length le16_to_cpu(u.r.wLength)
1da177e4
LT		 3168
3169 /* ack the irq */
3e76fdcb
RRD		 3170 writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
3171 stat ^= BIT(SETUP_PACKET_INTERRUPT);
1da177e4
LT		 3172
3173 /* watch control traffic at the token level, and force
3174 * synchronization before letting the status stage happen.
3175 * FIXME ignore tokens we'll NAK, until driver responds.
3176 * that'll mean a lot less irqs for some drivers.
3177 */
3178 ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
3179 if (ep->is_in) {
3e76fdcb
RRD		 3180 scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
3181 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
3182 BIT(DATA_IN_TOKEN_INTERRUPT);
fae3c158 3183 stop_out_naking(ep);
1da177e4 3184 } else
3e76fdcb
RRD		 3185 scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
3186 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
3187 BIT(DATA_IN_TOKEN_INTERRUPT);
fae3c158 3188 writel(scratch, &dev->epregs[0].ep_irqenb);
1da177e4
LT		 3189
3190 /* we made the hardware handle most lowlevel requests;
3191 * everything else goes uplevel to the gadget code.
3192 */
1f26e28d 3193 ep->responded = 1;
adc82f77
RRD		 3194
3195 if (dev->gadget.speed == USB_SPEED_SUPER) {
3196 handle_stat0_irqs_superspeed(dev, ep, u.r);
3197 goto next_endpoints;
3198 }
3199
1da177e4
LT		 3200 switch (u.r.bRequest) {
3201 case USB_REQ_GET_STATUS: {
3202 struct net2280_ep *e;
320f3459 3203 __le32 status;
1da177e4
LT		 3204
3205 /* hw handles device and interface status */
3206 if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
3207 goto delegate;
fae3c158
RRD		 3208 e = get_ep_by_addr(dev, w_index);
3209 if (!e || w_length > 2)
1da177e4
LT		 3210 goto do_stall;
3211
3e76fdcb 3212 if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
fae3c158 3213 status = cpu_to_le32(1);
1da177e4 3214 else
fae3c158 3215 status = cpu_to_le32(0);
1da177e4
LT		 3216
3217 /* don't bother with a request object! */
fae3c158
RRD		 3218 writel(0, &dev->epregs[0].ep_irqenb);
3219 set_fifo_bytecount(ep, w_length);
3220 writel((__force u32)status, &dev->epregs[0].ep_data);
3221 allow_status(ep);
e56e69cc 3222 ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status);
1da177e4
LT		 3223 goto next_endpoints;
3224 }
3225 break;
3226 case USB_REQ_CLEAR_FEATURE: {
3227 struct net2280_ep *e;
3228
3229 /* hw handles device features */
3230 if (u.r.bRequestType != USB_RECIP_ENDPOINT)
3231 goto delegate;
ae8e530a 3232 if (w_value != USB_ENDPOINT_HALT || w_length != 0)
1da177e4 3233 goto do_stall;
fae3c158
RRD		 3234 e = get_ep_by_addr(dev, w_index);
3235 if (!e)
1da177e4 3236 goto do_stall;
8066134f 3237 if (e->wedged) {
e56e69cc 3238 ep_vdbg(dev, "%s wedged, halt not cleared\n",
8066134f
AS		 3239 ep->ep.name);
3240 } else {
e56e69cc 3241 ep_vdbg(dev, "%s clear halt\n", e->ep.name);
8066134f 3242 clear_halt(e);
5185c913 3243 if ((ep->dev->quirks & PLX_PCIE) &&
adc82f77
RRD		 3244 !list_empty(&e->queue) && e->td_dma)
3245 restart_dma(e);
8066134f 3246 }
fae3c158 3247 allow_status(ep);
1da177e4
LT		 3248 goto next_endpoints;
3249 }
3250 break;
3251 case USB_REQ_SET_FEATURE: {
3252 struct net2280_ep *e;
3253
3254 /* hw handles device features */
3255 if (u.r.bRequestType != USB_RECIP_ENDPOINT)
3256 goto delegate;
ae8e530a 3257 if (w_value != USB_ENDPOINT_HALT || w_length != 0)
1da177e4 3258 goto do_stall;
fae3c158
RRD		 3259 e = get_ep_by_addr(dev, w_index);
3260 if (!e)
1da177e4 3261 goto do_stall;
8066134f
AS		 3262 if (e->ep.name == ep0name)
3263 goto do_stall;
fae3c158 3264 set_halt(e);
5185c913 3265 if ((dev->quirks & PLX_PCIE) && e->dma)
adc82f77 3266 abort_dma(e);
fae3c158 3267 allow_status(ep);
e56e69cc 3268 ep_vdbg(dev, "%s set halt\n", ep->ep.name);
1da177e4
LT		 3269 goto next_endpoints;
3270 }
3271 break;
3272 default:
3273delegate:
e56e69cc 3274 ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x "
1da177e4
LT		 3275 "ep_cfg %08x\n",
3276 u.r.bRequestType, u.r.bRequest,
320f3459 3277 w_value, w_index, w_length,
adc82f77 3278 readl(&ep->cfg->ep_cfg));
1f26e28d 3279 ep->responded = 0;
fae3c158
RRD		 3280 spin_unlock(&dev->lock);
3281 tmp = dev->driver->setup(&dev->gadget, &u.r);
3282 spin_lock(&dev->lock);
1da177e4
LT		 3283 }
3284
3285 /* stall ep0 on error */
3286 if (tmp < 0) {
3287do_stall:
e56e69cc 3288 ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
1da177e4
LT		 3289 u.r.bRequestType, u.r.bRequest, tmp);
3290 dev->protocol_stall = 1;
3291 }
3292
3293 /* some in/out token irq should follow; maybe stall then.
3294 * driver must queue a request (even zlp) or halt ep0
3295 * before the host times out.
3296 */
3297 }
3298
320f3459
DB		 3299#undef w_value
3300#undef w_index
3301#undef w_length
3302
1da177e4 3303next_endpoints:
5185c913 3304 if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
a09e23f5
MYK		 3305 u32 mask = (BIT(ENDPOINT_0_INTERRUPT) |
3306 USB3380_IRQSTAT0_EP_INTR_MASK_IN |
3307 USB3380_IRQSTAT0_EP_INTR_MASK_OUT);
3308
3309 if (stat & mask) {
3310 usb338x_handle_ep_intr(dev, stat & mask);
3311 stat &= ~mask;
3312 }
3313 } else {
3314 /* endpoint data irq ? */
3315 scratch = stat & 0x7f;
3316 stat &= ~0x7f;
3317 for (num = 0; scratch; num++) {
3318 u32 t;
3319
3320 /* do this endpoint's FIFO and queue need tending? */
3321 t = BIT(num);
3322 if ((scratch & t) == 0)
3323 continue;
3324 scratch ^= t;
1da177e4 3325
a09e23f5
MYK		 3326 ep = &dev->ep[num];
3327 handle_ep_small(ep);
3328 }
1da177e4
LT		 3329 }
3330
3331 if (stat)
e56e69cc 3332 ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
1da177e4
LT		 3333}
3334
3e76fdcb
RRD		 3335#define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \
3336 BIT(DMA_C_INTERRUPT) | \
3337 BIT(DMA_B_INTERRUPT) | \
3338 BIT(DMA_A_INTERRUPT))
1da177e4 3339#define PCI_ERROR_INTERRUPTS ( \
3e76fdcb
RRD		 3340 BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \
3341 BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \
3342 BIT(PCI_RETRY_ABORT_INTERRUPT))
1da177e4 3343
fae3c158 3344static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
dec3c23c
AS		 3345__releases(dev->lock)
3346__acquires(dev->lock)
1da177e4
LT		 3347{
3348 struct net2280_ep *ep;
3349 u32 tmp, num, mask, scratch;
3350
3351 /* after disconnect there's nothing else to do! */
3e76fdcb
RRD		 3352 tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT);
3353 mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED);
1da177e4
LT		 3354
3355 /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set.
fb914ebf 3356 * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and
901b3d75 3357 * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT
1da177e4
LT		 3358 * only indicates a change in the reset state).
3359 */
3360 if (stat & tmp) {
b611e424
AS		 3361 bool reset = false;
3362 bool disconnect = false;
3363
3364 /*
3365 * Ignore disconnects and resets if the speed hasn't been set.
3366 * VBUS can bounce and there's always an initial reset.
3367 */
fae3c158 3368 writel(tmp, &dev->regs->irqstat1);
b611e424
AS		 3369 if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
3370 if ((stat & BIT(VBUS_INTERRUPT)) &&
3371 (readl(&dev->usb->usbctl) &
3372 BIT(VBUS_PIN)) == 0) {
3373 disconnect = true;
3374 ep_dbg(dev, "disconnect %s\n",
3375 dev->driver->driver.name);
3376 } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) &&
3377 (readl(&dev->usb->usbstat) & mask)
3378 == 0) {
3379 reset = true;
3380 ep_dbg(dev, "reset %s\n",
3381 dev->driver->driver.name);
3382 }
3383
3384 if (disconnect || reset) {
3385 stop_activity(dev, dev->driver);
3386 ep0_start(dev);
dec3c23c 3387 spin_unlock(&dev->lock);
b611e424
AS		 3388 if (reset)
3389 usb_gadget_udc_reset
3390 (&dev->gadget, dev->driver);
3391 else
3392 (dev->driver->disconnect)
3393 (&dev->gadget);
dec3c23c 3394 spin_lock(&dev->lock);
b611e424
AS		 3395 return;
3396 }
1da177e4
LT		 3397 }
3398 stat &= ~tmp;
3399
3400 /* vBUS can bounce ... one of many reasons to ignore the
3401 * notion of hotplug events on bus connect/disconnect!
3402 */
3403 if (!stat)
3404 return;
3405 }
3406
3407 /* NOTE: chip stays in PCI D0 state for now, but it could
3408 * enter D1 to save more power
3409 */
3e76fdcb 3410 tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
1da177e4 3411 if (stat & tmp) {
fae3c158 3412 writel(tmp, &dev->regs->irqstat1);
dec3c23c 3413 spin_unlock(&dev->lock);
3e76fdcb 3414 if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
1da177e4 3415 if (dev->driver->suspend)
fae3c158 3416 dev->driver->suspend(&dev->gadget);
1da177e4 3417 if (!enable_suspend)
3e76fdcb 3418 stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT);
1da177e4
LT		 3419 } else {
3420 if (dev->driver->resume)
fae3c158 3421 dev->driver->resume(&dev->gadget);
1da177e4
LT		 3422 /* at high speed, note erratum 0133 */
3423 }
dec3c23c 3424 spin_lock(&dev->lock);
1da177e4
LT		 3425 stat &= ~tmp;
3426 }
3427
3428 /* clear any other status/irqs */
3429 if (stat)
fae3c158 3430 writel(stat, &dev->regs->irqstat1);
1da177e4
LT		 3431
3432 /* some status we can just ignore */
2eeb0016 3433 if (dev->quirks & PLX_2280)
3e76fdcb
RRD		 3434 stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
3435 BIT(SUSPEND_REQUEST_INTERRUPT) |
3436 BIT(RESUME_INTERRUPT) |
3437 BIT(SOF_INTERRUPT));
950ee4c8 3438 else
3e76fdcb
RRD		 3439 stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
3440 BIT(RESUME_INTERRUPT) |
3441 BIT(SOF_DOWN_INTERRUPT) |
3442 BIT(SOF_INTERRUPT));
950ee4c8 3443
1da177e4
LT		 3444 if (!stat)
3445 return;
e56e69cc 3446 /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/
1da177e4
LT		 3447
3448 /* DMA status, for ep-{a,b,c,d} */
3449 scratch = stat & DMA_INTERRUPTS;
3450 stat &= ~DMA_INTERRUPTS;
3451 scratch >>= 9;
3452 for (num = 0; scratch; num++) {
3453 struct net2280_dma_regs __iomem *dma;
3454
3e76fdcb 3455 tmp = BIT(num);
1da177e4
LT		 3456 if ((tmp & scratch) == 0)
3457 continue;
3458 scratch ^= tmp;
3459
fae3c158 3460 ep = &dev->ep[num + 1];
1da177e4
LT		 3461 dma = ep->dma;
3462
3463 if (!dma)
3464 continue;
3465
3466 /* clear ep's dma status */
fae3c158
RRD		 3467 tmp = readl(&dma->dmastat);
3468 writel(tmp, &dma->dmastat);
1da177e4 3469
adc82f77 3470 /* dma sync*/
5185c913 3471 if (dev->quirks & PLX_PCIE) {
adc82f77
RRD		 3472 u32 r_dmacount = readl(&dma->dmacount);
3473 if (!ep->is_in && (r_dmacount & 0x00FFFFFF) &&
3e76fdcb 3474 (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT)))
adc82f77
RRD		 3475 continue;
3476 }
3477
90664198
RRD		 3478 if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) {
3479 ep_dbg(ep->dev, "%s no xact done? %08x\n",
3480 ep->ep.name, tmp);
3481 continue;
1da177e4 3482 }
90664198 3483 stop_dma(ep->dma);
1da177e4
LT		 3484
3485 /* OUT transfers terminate when the data from the
3486 * host is in our memory. Process whatever's done.
3487 * On this path, we know transfer's last packet wasn't
3488 * less than req->length. NAK_OUT_PACKETS may be set,
3489 * or the FIFO may already be holding new packets.
3490 *
3491 * IN transfers can linger in the FIFO for a very
3492 * long time ... we ignore that for now, accounting
3493 * precisely (like PIO does) needs per-packet irqs
3494 */
fae3c158 3495 scan_dma_completions(ep);
1da177e4
LT		 3496
3497 /* disable dma on inactive queues; else maybe restart */
90664198 3498 if (!list_empty(&ep->queue)) {
fae3c158 3499 tmp = readl(&dma->dmactl);
90664198 3500 restart_dma(ep);
1da177e4
LT		 3501 }
3502 ep->irqs++;
3503 }
3504
3505 /* NOTE: there are other PCI errors we might usefully notice.
3506 * if they appear very often, here's where to try recovering.
3507 */
3508 if (stat & PCI_ERROR_INTERRUPTS) {
e56e69cc 3509 ep_err(dev, "pci dma error; stat %08x\n", stat);
1da177e4
LT		 3510 stat &= ~PCI_ERROR_INTERRUPTS;
3511 /* these are fatal errors, but "maybe" they won't
3512 * happen again ...
3513 */
fae3c158
RRD		 3514 stop_activity(dev, dev->driver);
3515 ep0_start(dev);
1da177e4
LT		 3516 stat = 0;
3517 }
3518
3519 if (stat)
e56e69cc 3520 ep_dbg(dev, "unhandled irqstat1 %08x\n", stat);
1da177e4
LT		 3521}
3522
fae3c158 3523static irqreturn_t net2280_irq(int irq, void *_dev)
1da177e4
LT		 3524{
3525 struct net2280 *dev = _dev;
3526
658ad5e0 3527 /* shared interrupt, not ours */
2eeb0016 3528 if ((dev->quirks & PLX_LEGACY) &&
3e76fdcb 3529 (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
658ad5e0
AS		 3530 return IRQ_NONE;
3531
fae3c158 3532 spin_lock(&dev->lock);
1da177e4
LT		 3533
3534 /* handle disconnect, dma, and more */
fae3c158 3535 handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
1da177e4
LT		 3536
3537 /* control requests and PIO */
fae3c158 3538 handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
1da177e4 3539
5185c913 3540 if (dev->quirks & PLX_PCIE) {
adc82f77
RRD		 3541 /* re-enable interrupt to trigger any possible new interrupt */
3542 u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
3543 writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
3544 writel(pciirqenb1, &dev->regs->pciirqenb1);
3545 }
3546
fae3c158 3547 spin_unlock(&dev->lock);
1da177e4
LT		 3548
3549 return IRQ_HANDLED;
3550}
3551
3552/*-------------------------------------------------------------------------*/
3553
fae3c158 3554static void gadget_release(struct device *_dev)
1da177e4 3555{
fae3c158 3556 struct net2280 *dev = dev_get_drvdata(_dev);
1da177e4 3557
fae3c158 3558 kfree(dev);
1da177e4
LT		 3559}
3560
3561/* tear down the binding between this driver and the pci device */
3562
fae3c158 3563static void net2280_remove(struct pci_dev *pdev)
1da177e4 3564{
fae3c158 3565 struct net2280 *dev = pci_get_drvdata(pdev);
1da177e4 3566
0f91349b
SAS		 3567 usb_del_gadget_udc(&dev->gadget);
3568
6bea476c 3569 BUG_ON(dev->driver);
1da177e4
LT		 3570
3571 /* then clean up the resources we allocated during probe() */
1da177e4
LT		 3572 if (dev->requests) {
3573 int i;
3574 for (i = 1; i < 5; i++) {
fae3c158 3575 if (!dev->ep[i].dummy)
1da177e4 3576 continue;
fa9ed6f6 3577 dma_pool_free(dev->requests, dev->ep[i].dummy,
fae3c158 3578 dev->ep[i].td_dma);
1da177e4 3579 }
fa9ed6f6 3580 dma_pool_destroy(dev->requests);
1da177e4
LT		 3581 }
3582 if (dev->got_irq)
fae3c158 3583 free_irq(pdev->irq, dev);
5185c913 3584 if (dev->quirks & PLX_PCIE)
adc82f77 3585 pci_disable_msi(pdev);
53e720f3
GS		 3586 if (dev->regs) {
3587 net2280_led_shutdown(dev);
fae3c158 3588 iounmap(dev->regs);
53e720f3 3589 }
1da177e4 3590 if (dev->region)
fae3c158
RRD		 3591 release_mem_region(pci_resource_start(pdev, 0),
3592 pci_resource_len(pdev, 0));
1da177e4 3593 if (dev->enabled)
fae3c158
RRD		 3594 pci_disable_device(pdev);
3595 device_remove_file(&pdev->dev, &dev_attr_registers);
1da177e4 3596
e56e69cc 3597 ep_info(dev, "unbind\n");
1da177e4
LT		 3598}
3599
3600/* wrap this driver around the specified device, but
3601 * don't respond over USB until a gadget driver binds to us.
3602 */
3603
fae3c158 3604static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4
LT		 3605{
3606 struct net2280 *dev;
3607 unsigned long resource, len;
3608 void __iomem *base = NULL;
3609 int retval, i;
1da177e4 3610
1da177e4 3611 /* alloc, and start init */
fae3c158
RRD		 3612 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
3613 if (dev == NULL) {
1da177e4
LT		 3614 retval = -ENOMEM;
3615 goto done;
3616 }
3617
fae3c158
RRD		 3618 pci_set_drvdata(pdev, dev);
3619 spin_lock_init(&dev->lock);
2eeb0016 3620 dev->quirks = id->driver_data;
1da177e4
LT		 3621 dev->pdev = pdev;
3622 dev->gadget.ops = &net2280_ops;
2eeb0016 3623 dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ?
adc82f77 3624 USB_SPEED_SUPER : USB_SPEED_HIGH;
1da177e4
LT		 3625
3626 /* the "gadget" abstracts/virtualizes the controller */
1da177e4
LT		 3627 dev->gadget.name = driver_name;
3628
3629 /* now all the pci goodies ... */
fae3c158
RRD		 3630 if (pci_enable_device(pdev) < 0) {
3631 retval = -ENODEV;
1da177e4
LT		 3632 goto done;
3633 }
3634 dev->enabled = 1;
3635
3636 /* BAR 0 holds all the registers
3637 * BAR 1 is 8051 memory; unused here (note erratum 0103)
3638 * BAR 2 is fifo memory; unused here
3639 */
fae3c158
RRD		 3640 resource = pci_resource_start(pdev, 0);
3641 len = pci_resource_len(pdev, 0);
3642 if (!request_mem_region(resource, len, driver_name)) {
e56e69cc 3643 ep_dbg(dev, "controller already in use\n");
1da177e4
LT		 3644 retval = -EBUSY;
3645 goto done;
3646 }
3647 dev->region = 1;
3648
901b3d75
DB		 3649 /* FIXME provide firmware download interface to put
3650 * 8051 code into the chip, e.g. to turn on PCI PM.
3651 */
3652
fae3c158 3653 base = ioremap_nocache(resource, len);
1da177e4 3654 if (base == NULL) {
e56e69cc 3655 ep_dbg(dev, "can't map memory\n");
1da177e4
LT		 3656 retval = -EFAULT;
3657 goto done;
3658 }
3659 dev->regs = (struct net2280_regs __iomem *) base;
3660 dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080);
3661 dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100);
3662 dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180);
3663 dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200);
3664 dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300);
3665
5185c913 3666 if (dev->quirks & PLX_PCIE) {
adc82f77
RRD		 3667 u32 fsmvalue;
3668 u32 usbstat;
3669 dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
3670 (base + 0x00b4);
adc82f77
RRD		 3671 dev->llregs = (struct usb338x_ll_regs __iomem *)
3672 (base + 0x0700);
3673 dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *)
3674 (base + 0x0748);
3675 dev->ll_tsn_regs = (struct usb338x_ll_tsn_regs __iomem *)
3676 (base + 0x077c);
3677 dev->ll_chicken_reg = (struct usb338x_ll_chi_regs __iomem *)
3678 (base + 0x079c);
3679 dev->plregs = (struct usb338x_pl_regs __iomem *)
3680 (base + 0x0800);
3681 usbstat = readl(&dev->usb->usbstat);
fae3c158 3682 dev->enhanced_mode = !!(usbstat & BIT(11));
adc82f77
RRD		 3683 dev->n_ep = (dev->enhanced_mode) ? 9 : 5;
3684 /* put into initial config, link up all endpoints */
3685 fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
3686 (0xf << DEFECT7374_FSM_FIELD);
3687 /* See if firmware needs to set up for workaround: */
5517525e
RRD		 3688 if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
3689 dev->bug7734_patched = 1;
adc82f77 3690 writel(0, &dev->usb->usbctl);
5517525e
RRD		 3691 } else
3692 dev->bug7734_patched = 0;
3693 } else {
adc82f77
RRD		 3694 dev->enhanced_mode = 0;
3695 dev->n_ep = 7;
3696 /* put into initial config, link up all endpoints */
3697 writel(0, &dev->usb->usbctl);
3698 }
3699
fae3c158
RRD		 3700 usb_reset(dev);
3701 usb_reinit(dev);
1da177e4
LT		 3702
3703 /* irq setup after old hardware is cleaned up */
3704 if (!pdev->irq) {
e56e69cc 3705 ep_err(dev, "No IRQ. Check PCI setup!\n");
1da177e4
LT		 3706 retval = -ENODEV;
3707 goto done;
3708 }
c6387a48 3709
5185c913 3710 if (dev->quirks & PLX_PCIE)
adc82f77 3711 if (pci_enable_msi(pdev))
e56e69cc 3712 ep_err(dev, "Failed to enable MSI mode\n");
adc82f77 3713
fae3c158
RRD		 3714 if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED,
3715 driver_name, dev)) {
e56e69cc 3716 ep_err(dev, "request interrupt %d failed\n", pdev->irq);
1da177e4
LT		 3717 retval = -EBUSY;
3718 goto done;
3719 }
3720 dev->got_irq = 1;
3721
3722 /* DMA setup */
3723 /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */
fa9ed6f6 3724 dev->requests = dma_pool_create("requests", &pdev->dev,
fae3c158 3725 sizeof(struct net2280_dma),
1da177e4
LT		 3726 0 /* no alignment requirements */,
3727 0 /* or page-crossing issues */);
3728 if (!dev->requests) {
e56e69cc 3729 ep_dbg(dev, "can't get request pool\n");
1da177e4
LT		 3730 retval = -ENOMEM;
3731 goto done;
3732 }
3733 for (i = 1; i < 5; i++) {
3734 struct net2280_dma *td;
3735
fa9ed6f6 3736 td = dma_pool_alloc(dev->requests, GFP_KERNEL,
fae3c158 3737 &dev->ep[i].td_dma);
1da177e4 3738 if (!td) {
e56e69cc 3739 ep_dbg(dev, "can't get dummy %d\n", i);
1da177e4
LT		 3740 retval = -ENOMEM;
3741 goto done;
3742 }
3743 td->dmacount = 0; /* not VALID */
1da177e4 3744 td->dmadesc = td->dmaaddr;
fae3c158 3745 dev->ep[i].dummy = td;
1da177e4
LT		 3746 }
3747
3748 /* enable lower-overhead pci memory bursts during DMA */
2eeb0016 3749 if (dev->quirks & PLX_LEGACY)
3e76fdcb
RRD		 3750 writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
3751 /*
3752 * 256 write retries may not be enough...
3753 BIT(PCI_RETRY_ABORT_ENABLE) |
3754 */
3755 BIT(DMA_READ_MULTIPLE_ENABLE) |
3756 BIT(DMA_READ_LINE_ENABLE),
3757 &dev->pci->pcimstctl);
1da177e4 3758 /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
fae3c158
RRD		 3759 pci_set_master(pdev);
3760 pci_try_set_mwi(pdev);
1da177e4
LT		 3761
3762 /* ... also flushes any posted pci writes */
fae3c158 3763 dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff;
1da177e4
LT		 3764
3765 /* done */
e56e69cc
RRD		 3766 ep_info(dev, "%s\n", driver_desc);
3767 ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n",
c6387a48 3768 pdev->irq, base, dev->chiprev);
d588ff58 3769 ep_info(dev, "version: " DRIVER_VERSION "; %s\n",
adc82f77 3770 dev->enhanced_mode ? "enhanced mode" : "legacy mode");
fae3c158
RRD		 3771 retval = device_create_file(&pdev->dev, &dev_attr_registers);
3772 if (retval)
3773 goto done;
1da177e4 3774
2901df68
FB		 3775 retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
3776 gadget_release);
0f91349b
SAS		 3777 if (retval)
3778 goto done;
1da177e4
LT		 3779 return 0;
3780
3781done:
3782 if (dev)
fae3c158 3783 net2280_remove(pdev);
1da177e4
LT		 3784 return retval;
3785}
3786
2d61bde7
AS		 3787/* make sure the board is quiescent; otherwise it will continue
3788 * generating IRQs across the upcoming reboot.
3789 */
3790
fae3c158 3791static void net2280_shutdown(struct pci_dev *pdev)
2d61bde7 3792{
fae3c158 3793 struct net2280 *dev = pci_get_drvdata(pdev);
2d61bde7
AS		 3794
3795 /* disable IRQs */
fae3c158
RRD		 3796 writel(0, &dev->regs->pciirqenb0);
3797 writel(0, &dev->regs->pciirqenb1);
2d61bde7
AS		 3798
3799 /* disable the pullup so the host will think we're gone */
fae3c158 3800 writel(0, &dev->usb->usbctl);
2f076077 3801
2d61bde7
AS		 3802}
3803
1da177e4
LT		 3804
3805/*-------------------------------------------------------------------------*/
3806
fae3c158 3807static const struct pci_device_id pci_ids[] = { {
7b78f48a 3808 .class = PCI_CLASS_SERIAL_USB_DEVICE,
901b3d75 3809 .class_mask = ~0,
c2db8a8a 3810 .vendor = PCI_VENDOR_ID_PLX_LEGACY,
1da177e4
LT		 3811 .device = 0x2280,
3812 .subvendor = PCI_ANY_ID,
3813 .subdevice = PCI_ANY_ID,
2eeb0016 3814 .driver_data = PLX_LEGACY | PLX_2280,
ae8e530a 3815 }, {
7b78f48a 3816 .class = PCI_CLASS_SERIAL_USB_DEVICE,
901b3d75 3817 .class_mask = ~0,
c2db8a8a 3818 .vendor = PCI_VENDOR_ID_PLX_LEGACY,
950ee4c8
GL		 3819 .device = 0x2282,
3820 .subvendor = PCI_ANY_ID,
3821 .subdevice = PCI_ANY_ID,
2eeb0016 3822 .driver_data = PLX_LEGACY,
ae8e530a 3823 },
adc82f77 3824 {
7b78f48a 3825 .class = PCI_CLASS_SERIAL_USB_DEVICE,
ae8e530a
RRD		 3826 .class_mask = ~0,
3827 .vendor = PCI_VENDOR_ID_PLX,
5185c913
TH		 3828 .device = 0x2380,
3829 .subvendor = PCI_ANY_ID,
3830 .subdevice = PCI_ANY_ID,
3831 .driver_data = PLX_PCIE,
3832 },
3833 {
3834 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3835 .class_mask = ~0,
3836 .vendor = PCI_VENDOR_ID_PLX,
ae8e530a
RRD		 3837 .device = 0x3380,
3838 .subvendor = PCI_ANY_ID,
3839 .subdevice = PCI_ANY_ID,
5185c913 3840 .driver_data = PLX_PCIE | PLX_SUPERSPEED,
adc82f77
RRD		 3841 },
3842 {
7b78f48a 3843 .class = PCI_CLASS_SERIAL_USB_DEVICE,
ae8e530a
RRD		 3844 .class_mask = ~0,
3845 .vendor = PCI_VENDOR_ID_PLX,
3846 .device = 0x3382,
3847 .subvendor = PCI_ANY_ID,
3848 .subdevice = PCI_ANY_ID,
5185c913 3849 .driver_data = PLX_PCIE | PLX_SUPERSPEED,
adc82f77
RRD		 3850 },
3851{ /* end: all zeroes */ }
1da177e4 3852};
fae3c158 3853MODULE_DEVICE_TABLE(pci, pci_ids);
1da177e4
LT		 3854
3855/* pci driver glue; this is a "new style" PCI driver module */
3856static struct pci_driver net2280_pci_driver = {
3857 .name = (char *) driver_name,
3858 .id_table = pci_ids,
3859
3860 .probe = net2280_probe,
3861 .remove = net2280_remove,
2d61bde7 3862 .shutdown = net2280_shutdown,
1da177e4
LT		 3863
3864 /* FIXME add power management support */
3865};
3866
9a028e46
RRD		 3867module_pci_driver(net2280_pci_driver);
3868
fae3c158
RRD		 3869MODULE_DESCRIPTION(DRIVER_DESC);
3870MODULE_AUTHOR("David Brownell");
3871MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)