[linux-2.6-block.git] / drivers / tty / serial / of_serial.c

/*
 *  Serial Port driver for Open Firmware platform devices
 *
 *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */
#include <linux/console.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/serial_core.h>
#include <linux/serial_reg.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/nwpserial.h>
#include <linux/clk.h>

#include "8250/8250.h"

struct of_serial_info {
	struct clk *clk;
	int type;
	int line;
};

#ifdef CONFIG_ARCH_TEGRA
void tegra_serial_handle_break(struct uart_port *p)
{
	unsigned int status, tmout = 10000;

	do {
		status = p->serial_in(p, UART_LSR);
		if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
			status = p->serial_in(p, UART_RX);
		else
			break;
		if (--tmout == 0)
			break;
		udelay(1);
	} while (1);
}
#else
static inline void tegra_serial_handle_break(struct uart_port *port)
{
}
#endif

/*
 * Fill a struct uart_port for a given device node
 */
static int of_platform_serial_setup(struct platform_device *ofdev,
			int type, struct uart_port *port,
			struct of_serial_info *info)
{
	struct resource resource;
	struct device_node *np = ofdev->dev.of_node;
	u32 clk, spd, prop;
	int ret;

	memset(port, 0, sizeof *port);
	if (of_property_read_u32(np, "clock-frequency", &clk)) {

		/* Get clk rate through clk driver if present */
		info->clk = clk_get(&ofdev->dev, NULL);
		if (IS_ERR(info->clk)) {
			dev_warn(&ofdev->dev,
				"clk or clock-frequency not defined\n");
			return PTR_ERR(info->clk);
		}

		clk_prepare_enable(info->clk);
		clk = clk_get_rate(info->clk);
	}
	/* If current-speed was set, then try not to change it. */
	if (of_property_read_u32(np, "current-speed", &spd) == 0)
		port->custom_divisor = clk / (16 * spd);

	ret = of_address_to_resource(np, 0, &resource);
	if (ret) {
		dev_warn(&ofdev->dev, "invalid address\n");
		goto out;
	}

	spin_lock_init(&port->lock);
	port->mapbase = resource.start;
	port->mapsize = resource_size(&resource);

	/* Check for shifted address mapping */
	if (of_property_read_u32(np, "reg-offset", &prop) == 0)
		port->mapbase += prop;

	/* Check for registers offset within the devices address range */
	if (of_property_read_u32(np, "reg-shift", &prop) == 0)
		port->regshift = prop;

	/* Check for fifo size */
	if (of_property_read_u32(np, "fifo-size", &prop) == 0)
		port->fifosize = prop;

	/* Check for a fixed line number */
	ret = of_alias_get_id(np, "serial");
	if (ret >= 0)
		port->line = ret;

	port->irq = irq_of_parse_and_map(np, 0);
	port->iotype = UPIO_MEM;
	if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
		switch (prop) {
		case 1:
			port->iotype = UPIO_MEM;
			break;
		case 4:
			port->iotype = of_device_is_big_endian(np) ?
				       UPIO_MEM32BE : UPIO_MEM32;
			break;
		default:
			dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
				 prop);
			ret = -EINVAL;
			goto out;
		}
	}

	port->type = type;
	port->uartclk = clk;
	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
		| UPF_FIXED_PORT | UPF_FIXED_TYPE;

	if (of_find_property(np, "no-loopback-test", NULL))
		port->flags |= UPF_SKIP_TEST;

	port->dev = &ofdev->dev;

	switch (type) {
	case PORT_TEGRA:
		port->handle_break = tegra_serial_handle_break;
		break;

	case PORT_RT2880:
		port->iotype = UPIO_AU;
		break;
	}

	return 0;
out:
	if (info->clk)
		clk_disable_unprepare(info->clk);
	return ret;
}

/*
 * Try to register a serial port
 */
static const struct of_device_id of_platform_serial_table[];
static int of_platform_serial_probe(struct platform_device *ofdev)
{
	const struct of_device_id *match;
	struct of_serial_info *info;
	struct uart_port port;
	int port_type;
	int ret;

	match = of_match_device(of_platform_serial_table, &ofdev->dev);
	if (!match)
		return -EINVAL;

	if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
		return -EBUSY;

	info = kzalloc(sizeof(*info), GFP_KERNEL);
	if (info == NULL)
		return -ENOMEM;

	port_type = (unsigned long)match->data;
	ret = of_platform_serial_setup(ofdev, port_type, &port, info);
	if (ret)
		goto out;

	switch (port_type) {
#ifdef CONFIG_SERIAL_8250
	case PORT_8250 ... PORT_MAX_8250:
	{
		struct uart_8250_port port8250;
		memset(&port8250, 0, sizeof(port8250));
		port.type = port_type;
		port8250.port = port;

		if (port.fifosize)
			port8250.capabilities = UART_CAP_FIFO;

		if (of_property_read_bool(ofdev->dev.of_node,
					  "auto-flow-control"))
			port8250.capabilities |= UART_CAP_AFE;

		ret = serial8250_register_8250_port(&port8250);
		break;
	}
#endif
#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	case PORT_NWPSERIAL:
		ret = nwpserial_register_port(&port);
		break;
#endif
	default:
		/* need to add code for these */
	case PORT_UNKNOWN:
		dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
		ret = -ENODEV;
		break;
	}
	if (ret < 0)
		goto out;

	info->type = port_type;
	info->line = ret;
	platform_set_drvdata(ofdev, info);
	return 0;
out:
	kfree(info);
	irq_dispose_mapping(port.irq);
	return ret;
}

/*
 * Release a line
 */
static int of_platform_serial_remove(struct platform_device *ofdev)
{
	struct of_serial_info *info = platform_get_drvdata(ofdev);
	switch (info->type) {
#ifdef CONFIG_SERIAL_8250
	case PORT_8250 ... PORT_MAX_8250:
		serial8250_unregister_port(info->line);
		break;
#endif
#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	case PORT_NWPSERIAL:
		nwpserial_unregister_port(info->line);
		break;
#endif
	default:
		/* need to add code for these */
		break;
	}

	if (info->clk)
		clk_disable_unprepare(info->clk);
	kfree(info);
	return 0;
}

#ifdef CONFIG_PM_SLEEP
#ifdef CONFIG_SERIAL_8250
static void of_serial_suspend_8250(struct of_serial_info *info)
{
	struct uart_8250_port *port8250 = serial8250_get_port(info->line);
	struct uart_port *port = &port8250->port;

	serial8250_suspend_port(info->line);
	if (info->clk && (!uart_console(port) || console_suspend_enabled))
		clk_disable_unprepare(info->clk);
}

static void of_serial_resume_8250(struct of_serial_info *info)
{
	struct uart_8250_port *port8250 = serial8250_get_port(info->line);
	struct uart_port *port = &port8250->port;

	if (info->clk && (!uart_console(port) || console_suspend_enabled))
		clk_prepare_enable(info->clk);

	serial8250_resume_port(info->line);
}
#else
static inline void of_serial_suspend_8250(struct of_serial_info *info)
{
}

static inline void of_serial_resume_8250(struct of_serial_info *info)
{
}
#endif

static int of_serial_suspend(struct device *dev)
{
	struct of_serial_info *info = dev_get_drvdata(dev);

	switch (info->type) {
	case PORT_8250 ... PORT_MAX_8250:
		of_serial_suspend_8250(info);
		break;
	default:
		break;
	}

	return 0;
}

static int of_serial_resume(struct device *dev)
{
	struct of_serial_info *info = dev_get_drvdata(dev);

	switch (info->type) {
	case PORT_8250 ... PORT_MAX_8250:
		of_serial_resume_8250(info);
		break;
	default:
		break;
	}

	return 0;
}
#endif
static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);

/*
 * A few common types, add more as needed.
 */
static const struct of_device_id of_platform_serial_table[] = {
	{ .compatible = "ns8250",   .data = (void *)PORT_8250, },
	{ .compatible = "ns16450",  .data = (void *)PORT_16450, },
	{ .compatible = "ns16550a", .data = (void *)PORT_16550A, },
	{ .compatible = "ns16550",  .data = (void *)PORT_16550, },
	{ .compatible = "ns16750",  .data = (void *)PORT_16750, },
	{ .compatible = "ns16850",  .data = (void *)PORT_16850, },
	{ .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
	{ .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
	{ .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
	{ .compatible = "altr,16550-FIFO32",
		.data = (void *)PORT_ALTR_16550_F32, },
	{ .compatible = "altr,16550-FIFO64",
		.data = (void *)PORT_ALTR_16550_F64, },
	{ .compatible = "altr,16550-FIFO128",
		.data = (void *)PORT_ALTR_16550_F128, },
	{ .compatible = "mrvl,mmp-uart",
		.data = (void *)PORT_XSCALE, },
	{ .compatible = "mrvl,pxa-uart",
		.data = (void *)PORT_XSCALE, },
#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	{ .compatible = "ibm,qpace-nwp-serial",
		.data = (void *)PORT_NWPSERIAL, },
#endif
	{ /* end of list */ },
};

static struct platform_driver of_platform_serial_driver = {
	.driver = {
		.name = "of_serial",
		.of_match_table = of_platform_serial_table,
	},
	.probe = of_platform_serial_probe,
	.remove = of_platform_serial_remove,
};

module_platform_driver(of_platform_serial_driver);

MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
Commit	Line	Data
8d38a5b2 AB	1	/*
	2	* Serial Port driver for Open Firmware platform devices
	3	*
	4	* Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*
	11	*/
8ad3b135	12	#include <linux/console.h>
8d38a5b2	13	#include <linux/module.h>
5a0e3ad6	14	#include <linux/slab.h>
bf03f65b	15	#include <linux/delay.h>
8d38a5b2	16	#include <linux/serial_core.h>
bf03f65b	17	#include <linux/serial_reg.h>
f1ca09b2	18	#include <linux/of_address.h>
73930a85	19	#include <linux/of_irq.h>
c401b044	20	#include <linux/of_platform.h>
5886188d	21	#include <linux/nwpserial.h>
0bbeb3c3	22	#include <linux/clk.h>
8d38a5b2	23
b0b8c84c HK	24	#include "8250/8250.h"
b0b8c84c HK	25
e34b9c94	26	struct of_serial_info {
0bbeb3c3	27	struct clk *clk;
e34b9c94 IK	28	int type;
	29	int line;
	30	};
	31
bf03f65b DW	32	#ifdef CONFIG_ARCH_TEGRA
	33	void tegra_serial_handle_break(struct uart_port *p)
	34	{
	35	unsigned int status, tmout = 10000;
	36
	37	do {
	38	status = p->serial_in(p, UART_LSR);
	39	if (status & (UART_LSR_FIFOE \| UART_LSR_BRK_ERROR_BITS))
	40	status = p->serial_in(p, UART_RX);
	41	else
	42	break;
	43	if (--tmout == 0)
	44	break;
	45	udelay(1);
	46	} while (1);
	47	}
f26402e8 SW	48	#else
	49	static inline void tegra_serial_handle_break(struct uart_port *port)
	50	{
	51	}
bf03f65b DW	52	#endif
bf03f65b DW	53
8d38a5b2 AB	54	/*
	55	* Fill a struct uart_port for a given device node
	56	*/
9671f099	57	static int of_platform_serial_setup(struct platform_device *ofdev,
0bbeb3c3 MK	58	int type, struct uart_port *port,
0bbeb3c3 MK	59	struct of_serial_info *info)
8d38a5b2 AB	60	{
8d38a5b2 AB	61	struct resource resource;
61c7a080	62	struct device_node *np = ofdev->dev.of_node;
b84e7731 GL	63	u32 clk, spd, prop;
b84e7731 GL	64	int ret;
8d38a5b2 AB	65
8d38a5b2 AB	66	memset(port, 0, sizeof *port);
b84e7731	67	if (of_property_read_u32(np, "clock-frequency", &clk)) {
0bbeb3c3 MK	68
	69	/* Get clk rate through clk driver if present */
	70	info->clk = clk_get(&ofdev->dev, NULL);
76cc4386	71	if (IS_ERR(info->clk)) {
0bbeb3c3 MK	72	dev_warn(&ofdev->dev,
0bbeb3c3 MK	73	"clk or clock-frequency not defined\n");
76cc4386	74	return PTR_ERR(info->clk);
0bbeb3c3 MK	75	}
	76
	77	clk_prepare_enable(info->clk);
	78	clk = clk_get_rate(info->clk);
8d38a5b2	79	}
b84e7731 GL	80	/* If current-speed was set, then try not to change it. */
	81	if (of_property_read_u32(np, "current-speed", &spd) == 0)
	82	port->custom_divisor = clk / (16 * spd);
8d38a5b2 AB	83
	84	ret = of_address_to_resource(np, 0, &resource);
	85	if (ret) {
	86	dev_warn(&ofdev->dev, "invalid address\n");
0bbeb3c3	87	goto out;
8d38a5b2 AB	88	}
	89
	90	spin_lock_init(&port->lock);
	91	port->mapbase = resource.start;
07876912	92	port->mapsize = resource_size(&resource);
b912b5e2 JL	93
b912b5e2 JL	94	/* Check for shifted address mapping */
b84e7731 GL	95	if (of_property_read_u32(np, "reg-offset", &prop) == 0)
b84e7731 GL	96	port->mapbase += prop;
b912b5e2 JL	97
b912b5e2 JL	98	/* Check for registers offset within the devices address range */
b84e7731 GL	99	if (of_property_read_u32(np, "reg-shift", &prop) == 0)
b84e7731 GL	100	port->regshift = prop;
b912b5e2	101
9f1ca068 HK	102	/* Check for fifo size */
	103	if (of_property_read_u32(np, "fifo-size", &prop) == 0)
	104	port->fifosize = prop;
	105
3239fd31 LS	106	/* Check for a fixed line number */
	107	ret = of_alias_get_id(np, "serial");
	108	if (ret >= 0)
	109	port->line = ret;
	110
8d38a5b2 AB	111	port->irq = irq_of_parse_and_map(np, 0);
8d38a5b2 AB	112	port->iotype = UPIO_MEM;
b84e7731 GL	113	if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
b84e7731 GL	114	switch (prop) {
7423734e JI	115	case 1:
	116	port->iotype = UPIO_MEM;
	117	break;
	118	case 4:
ebc5e200 KC	119	port->iotype = of_device_is_big_endian(np) ?
ebc5e200 KC	120	UPIO_MEM32BE : UPIO_MEM32;
7423734e JI	121	break;
7423734e JI	122	default:
b84e7731 GL	123	dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
b84e7731 GL	124	prop);
0bbeb3c3 MK	125	ret = -EINVAL;
0bbeb3c3 MK	126	goto out;
7423734e JI	127	}
	128	}
	129
8d38a5b2	130	port->type = type;
b84e7731	131	port->uartclk = clk;
abb4a239	132	port->flags = UPF_SHARE_IRQ \| UPF_BOOT_AUTOCONF \| UPF_IOREMAP
eedacbf0	133	\| UPF_FIXED_PORT \| UPF_FIXED_TYPE;
fde8be29 GJ	134
	135	if (of_find_property(np, "no-loopback-test", NULL))
	136	port->flags \|= UPF_SKIP_TEST;
	137
8d38a5b2	138	port->dev = &ofdev->dev;
8d38a5b2	139
9b8777e3 JC	140	switch (type) {
9b8777e3 JC	141	case PORT_TEGRA:
bf03f65b	142	port->handle_break = tegra_serial_handle_break;
9b8777e3 JC	143	break;
	144
	145	case PORT_RT2880:
	146	port->iotype = UPIO_AU;
	147	break;
	148	}
bf03f65b	149
8d38a5b2	150	return 0;
0bbeb3c3 MK	151	out:
	152	if (info->clk)
	153	clk_disable_unprepare(info->clk);
	154	return ret;
8d38a5b2 AB	155	}
	156
	157	/*
	158	* Try to register a serial port
	159	*/
ed0bb232	160	static const struct of_device_id of_platform_serial_table[];
9671f099	161	static int of_platform_serial_probe(struct platform_device *ofdev)
8d38a5b2	162	{
b1608d69	163	const struct of_device_id *match;
e34b9c94	164	struct of_serial_info *info;
8d38a5b2 AB	165	struct uart_port port;
	166	int port_type;
	167	int ret;
	168
b1608d69 GL	169	match = of_match_device(of_platform_serial_table, &ofdev->dev);
b1608d69 GL	170	if (!match)
793218df GL	171	return -EINVAL;
793218df GL	172
61c7a080	173	if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
8d38a5b2 AB	174	return -EBUSY;
8d38a5b2 AB	175
7e12e675	176	info = kzalloc(sizeof(*info), GFP_KERNEL);
e34b9c94 IK	177	if (info == NULL)
	178	return -ENOMEM;
	179
b1608d69	180	port_type = (unsigned long)match->data;
0bbeb3c3	181	ret = of_platform_serial_setup(ofdev, port_type, &port, info);
8d38a5b2 AB	182	if (ret)
	183	goto out;
	184
	185	switch (port_type) {
5886188d	186	#ifdef CONFIG_SERIAL_8250
8d38a5b2	187	case PORT_8250 ... PORT_MAX_8250:
ce7240e4	188	{
ce7240e4 AC	189	struct uart_8250_port port8250;
ce7240e4 AC	190	memset(&port8250, 0, sizeof(port8250));
7fa21dd8	191	port.type = port_type;
ce7240e4	192	port8250.port = port;
b0b8c84c HK	193
	194	if (port.fifosize)
	195	port8250.capabilities = UART_CAP_FIFO;
	196
	197	if (of_property_read_bool(ofdev->dev.of_node,
	198	"auto-flow-control"))
	199	port8250.capabilities \|= UART_CAP_AFE;
	200
ce7240e4	201	ret = serial8250_register_8250_port(&port8250);
8d38a5b2	202	break;
ce7240e4	203	}
5886188d BK	204	#endif
	205	#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	206	case PORT_NWPSERIAL:
	207	ret = nwpserial_register_port(&port);
	208	break;
	209	#endif
8d38a5b2 AB	210	default:
8d38a5b2 AB	211	/* need to add code for these */
1558f9b4 IK	212	case PORT_UNKNOWN:
1558f9b4 IK	213	dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
8d38a5b2 AB	214	ret = -ENODEV;
	215	break;
	216	}
	217	if (ret < 0)
	218	goto out;
	219
e34b9c94 IK	220	info->type = port_type;
e34b9c94 IK	221	info->line = ret;
696faedd	222	platform_set_drvdata(ofdev, info);
8d38a5b2 AB	223	return 0;
8d38a5b2 AB	224	out:
e34b9c94	225	kfree(info);
8d38a5b2 AB	226	irq_dispose_mapping(port.irq);
	227	return ret;
	228	}
	229
	230	/*
	231	* Release a line
	232	*/
2dc11581	233	static int of_platform_serial_remove(struct platform_device *ofdev)
8d38a5b2	234	{
696faedd	235	struct of_serial_info *info = platform_get_drvdata(ofdev);
e34b9c94	236	switch (info->type) {
5886188d	237	#ifdef CONFIG_SERIAL_8250
e34b9c94 IK	238	case PORT_8250 ... PORT_MAX_8250:
	239	serial8250_unregister_port(info->line);
	240	break;
5886188d BK	241	#endif
	242	#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
	243	case PORT_NWPSERIAL:
	244	nwpserial_unregister_port(info->line);
	245	break;
	246	#endif
e34b9c94 IK	247	default:
	248	/* need to add code for these */
	249	break;
	250	}
0bbeb3c3 MK	251
	252	if (info->clk)
	253	clk_disable_unprepare(info->clk);
e34b9c94	254	kfree(info);
8d38a5b2 AB	255	return 0;
	256	}
	257
8ad3b135 JL	258	#ifdef CONFIG_PM_SLEEP
	259	#ifdef CONFIG_SERIAL_8250
	260	static void of_serial_suspend_8250(struct of_serial_info *info)
	261	{
	262	struct uart_8250_port *port8250 = serial8250_get_port(info->line);
	263	struct uart_port *port = &port8250->port;
	264
	265	serial8250_suspend_port(info->line);
	266	if (info->clk && (!uart_console(port) \|\| console_suspend_enabled))
	267	clk_disable_unprepare(info->clk);
	268	}
	269
	270	static void of_serial_resume_8250(struct of_serial_info *info)
	271	{
	272	struct uart_8250_port *port8250 = serial8250_get_port(info->line);
	273	struct uart_port *port = &port8250->port;
	274
	275	if (info->clk && (!uart_console(port) \|\| console_suspend_enabled))
	276	clk_prepare_enable(info->clk);
	277
	278	serial8250_resume_port(info->line);
	279	}
	280	#else
	281	static inline void of_serial_suspend_8250(struct of_serial_info *info)
	282	{
	283	}
	284
	285	static inline void of_serial_resume_8250(struct of_serial_info *info)
	286	{
	287	}
	288	#endif
	289
	290	static int of_serial_suspend(struct device *dev)
	291	{
	292	struct of_serial_info *info = dev_get_drvdata(dev);
	293
	294	switch (info->type) {
	295	case PORT_8250 ... PORT_MAX_8250:
	296	of_serial_suspend_8250(info);
	297	break;
	298	default:
	299	break;
	300	}
	301
	302	return 0;
	303	}
	304
	305	static int of_serial_resume(struct device *dev)
	306	{
	307	struct of_serial_info *info = dev_get_drvdata(dev);
	308
	309	switch (info->type) {
	310	case PORT_8250 ... PORT_MAX_8250:
	311	of_serial_resume_8250(info);
	312	break;
	313	default:
	314	break;
	315	}
	316
	317	return 0;
	318	}
	319	#endif
	320	static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
	321
8d38a5b2 AB	322	/*
	323	* A few common types, add more as needed.
	324	*/
ed0bb232	325	static const struct of_device_id of_platform_serial_table[] = {
8c6e9112 GL	326	{ .compatible = "ns8250", .data = (void *)PORT_8250, },
	327	{ .compatible = "ns16450", .data = (void *)PORT_16450, },
	328	{ .compatible = "ns16550a", .data = (void *)PORT_16550A, },
	329	{ .compatible = "ns16550", .data = (void *)PORT_16550, },
	330	{ .compatible = "ns16750", .data = (void *)PORT_16750, },
	331	{ .compatible = "ns16850", .data = (void *)PORT_16850, },
2e39e5be	332	{ .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
e4305f0c	333	{ .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
9b8777e3	334	{ .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
e06c93ca LFT	335	{ .compatible = "altr,16550-FIFO32",
	336	.data = (void *)PORT_ALTR_16550_F32, },
	337	{ .compatible = "altr,16550-FIFO64",
	338	.data = (void *)PORT_ALTR_16550_F64, },
	339	{ .compatible = "altr,16550-FIFO128",
	340	.data = (void *)PORT_ALTR_16550_F128, },
6ad991b6 RH	341	{ .compatible = "mrvl,mmp-uart",
	342	.data = (void *)PORT_XSCALE, },
	343	{ .compatible = "mrvl,pxa-uart",
	344	.data = (void *)PORT_XSCALE, },
5886188d	345	#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
8c6e9112 GL	346	{ .compatible = "ibm,qpace-nwp-serial",
8c6e9112 GL	347	.data = (void *)PORT_NWPSERIAL, },
5886188d	348	#endif
8d38a5b2 AB	349	{ /* end of list */ },
	350	};
	351
793218df	352	static struct platform_driver of_platform_serial_driver = {
4018294b GL	353	.driver = {
4018294b GL	354	.name = "of_serial",
4018294b GL	355	.of_match_table = of_platform_serial_table,
4018294b GL	356	},
8d38a5b2 AB	357	.probe = of_platform_serial_probe,
8d38a5b2 AB	358	.remove = of_platform_serial_remove,
8d38a5b2 AB	359	};
8d38a5b2 AB	360
940ab889	361	module_platform_driver(of_platform_serial_driver);
8d38a5b2 AB	362
	363	MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
	364	MODULE_LICENSE("GPL");
	365	MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");