Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
bd21eaf9 | 3 | * Copyright (c) 2003-2014 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
2d70c103 | 8 | #include "qla_target.h" |
1da177e4 | 9 | |
05236a05 | 10 | #include <linux/delay.h> |
5a0e3ad6 | 11 | #include <linux/slab.h> |
e326d22a | 12 | #include <linux/cpu.h> |
09ce66ae | 13 | #include <linux/t10-pi.h> |
df7baa50 | 14 | #include <scsi/scsi_tcq.h> |
9a069e19 | 15 | #include <scsi/scsi_bsg_fc.h> |
bad75002 | 16 | #include <scsi/scsi_eh.h> |
d32041ec JT |
17 | #include <scsi/fc/fc_fs.h> |
18 | #include <linux/nvme-fc-driver.h> | |
df7baa50 | 19 | |
1da177e4 | 20 | static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t); |
73208dfd | 21 | static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *); |
2afa19a9 | 22 | static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *); |
c5419e26 | 23 | static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *, |
73208dfd | 24 | sts_entry_t *); |
9a853f71 | 25 | |
c4dc7cd3 BVA |
26 | const char *const port_state_str[] = { |
27 | "Unknown", | |
28 | "UNCONFIGURED", | |
29 | "DEAD", | |
30 | "LOST", | |
31 | "ONLINE" | |
32 | }; | |
33 | ||
1da177e4 LT |
34 | /** |
35 | * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200. | |
807eb907 | 36 | * @irq: interrupt number |
1da177e4 | 37 | * @dev_id: SCSI driver HA context |
1da177e4 LT |
38 | * |
39 | * Called by system whenever the host adapter generates an interrupt. | |
40 | * | |
41 | * Returns handled flag. | |
42 | */ | |
43 | irqreturn_t | |
7d12e780 | 44 | qla2100_intr_handler(int irq, void *dev_id) |
1da177e4 | 45 | { |
e315cd28 AC |
46 | scsi_qla_host_t *vha; |
47 | struct qla_hw_data *ha; | |
3d71644c | 48 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 49 | int status; |
1da177e4 | 50 | unsigned long iter; |
14e660e6 | 51 | uint16_t hccr; |
0a59cea4 | 52 | uint16_t mb[8]; |
e315cd28 | 53 | struct rsp_que *rsp; |
43fac4d9 | 54 | unsigned long flags; |
1da177e4 | 55 | |
e315cd28 AC |
56 | rsp = (struct rsp_que *) dev_id; |
57 | if (!rsp) { | |
3256b435 CD |
58 | ql_log(ql_log_info, NULL, 0x505d, |
59 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
60 | return (IRQ_NONE); |
61 | } | |
62 | ||
e315cd28 | 63 | ha = rsp->hw; |
3d71644c | 64 | reg = &ha->iobase->isp; |
1da177e4 LT |
65 | status = 0; |
66 | ||
43fac4d9 | 67 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 68 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 69 | for (iter = 50; iter--; ) { |
14e660e6 | 70 | hccr = RD_REG_WORD(®->hccr); |
c821e0d5 | 71 | if (qla2x00_check_reg16_for_disconnect(vha, hccr)) |
f3ddac19 | 72 | break; |
14e660e6 SJ |
73 | if (hccr & HCCR_RISC_PAUSE) { |
74 | if (pci_channel_offline(ha->pdev)) | |
75 | break; | |
76 | ||
77 | /* | |
78 | * Issue a "HARD" reset in order for the RISC interrupt | |
a06a0f8e | 79 | * bit to be cleared. Schedule a big hammer to get |
14e660e6 SJ |
80 | * out of the RISC PAUSED state. |
81 | */ | |
82 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
83 | RD_REG_WORD(®->hccr); | |
84 | ||
e315cd28 AC |
85 | ha->isp_ops->fw_dump(vha, 1); |
86 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
14e660e6 SJ |
87 | break; |
88 | } else if ((RD_REG_WORD(®->istatus) & ISR_RISC_INT) == 0) | |
1da177e4 LT |
89 | break; |
90 | ||
91 | if (RD_REG_WORD(®->semaphore) & BIT_0) { | |
92 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
93 | RD_REG_WORD(®->hccr); | |
94 | ||
95 | /* Get mailbox data. */ | |
9a853f71 AV |
96 | mb[0] = RD_MAILBOX_REG(ha, reg, 0); |
97 | if (mb[0] > 0x3fff && mb[0] < 0x8000) { | |
e315cd28 | 98 | qla2x00_mbx_completion(vha, mb[0]); |
1da177e4 | 99 | status |= MBX_INTERRUPT; |
9a853f71 AV |
100 | } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { |
101 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
102 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
103 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 104 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
105 | } else { |
106 | /*EMPTY*/ | |
7c3df132 SK |
107 | ql_dbg(ql_dbg_async, vha, 0x5025, |
108 | "Unrecognized interrupt type (%d).\n", | |
109 | mb[0]); | |
1da177e4 LT |
110 | } |
111 | /* Release mailbox registers. */ | |
112 | WRT_REG_WORD(®->semaphore, 0); | |
113 | RD_REG_WORD(®->semaphore); | |
114 | } else { | |
73208dfd | 115 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
116 | |
117 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
118 | RD_REG_WORD(®->hccr); | |
119 | } | |
120 | } | |
36439832 | 121 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 122 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 123 | |
1da177e4 LT |
124 | return (IRQ_HANDLED); |
125 | } | |
126 | ||
f3ddac19 | 127 | bool |
c821e0d5 | 128 | qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg) |
f3ddac19 CD |
129 | { |
130 | /* Check for PCI disconnection */ | |
a30c2a3b | 131 | if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) { |
beb9e315 | 132 | if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) && |
6b383979 JL |
133 | !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) && |
134 | !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) { | |
232792b6 JL |
135 | /* |
136 | * Schedule this (only once) on the default system | |
137 | * workqueue so that all the adapter workqueues and the | |
138 | * DPC thread can be shutdown cleanly. | |
139 | */ | |
140 | schedule_work(&vha->hw->board_disable); | |
141 | } | |
f3ddac19 CD |
142 | return true; |
143 | } else | |
144 | return false; | |
145 | } | |
146 | ||
c821e0d5 JL |
147 | bool |
148 | qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg) | |
149 | { | |
150 | return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg); | |
151 | } | |
152 | ||
1da177e4 LT |
153 | /** |
154 | * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. | |
807eb907 | 155 | * @irq: interrupt number |
1da177e4 | 156 | * @dev_id: SCSI driver HA context |
1da177e4 LT |
157 | * |
158 | * Called by system whenever the host adapter generates an interrupt. | |
159 | * | |
160 | * Returns handled flag. | |
161 | */ | |
162 | irqreturn_t | |
7d12e780 | 163 | qla2300_intr_handler(int irq, void *dev_id) |
1da177e4 | 164 | { |
e315cd28 | 165 | scsi_qla_host_t *vha; |
3d71644c | 166 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 167 | int status; |
1da177e4 LT |
168 | unsigned long iter; |
169 | uint32_t stat; | |
1da177e4 | 170 | uint16_t hccr; |
0a59cea4 | 171 | uint16_t mb[8]; |
e315cd28 AC |
172 | struct rsp_que *rsp; |
173 | struct qla_hw_data *ha; | |
43fac4d9 | 174 | unsigned long flags; |
1da177e4 | 175 | |
e315cd28 AC |
176 | rsp = (struct rsp_que *) dev_id; |
177 | if (!rsp) { | |
3256b435 CD |
178 | ql_log(ql_log_info, NULL, 0x5058, |
179 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
180 | return (IRQ_NONE); |
181 | } | |
182 | ||
e315cd28 | 183 | ha = rsp->hw; |
3d71644c | 184 | reg = &ha->iobase->isp; |
1da177e4 LT |
185 | status = 0; |
186 | ||
43fac4d9 | 187 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 188 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 LT |
189 | for (iter = 50; iter--; ) { |
190 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | |
c821e0d5 | 191 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 192 | break; |
1da177e4 | 193 | if (stat & HSR_RISC_PAUSED) { |
85880801 | 194 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
195 | break; |
196 | ||
1da177e4 | 197 | hccr = RD_REG_WORD(®->hccr); |
f3ddac19 | 198 | |
1da177e4 | 199 | if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) |
7c3df132 SK |
200 | ql_log(ql_log_warn, vha, 0x5026, |
201 | "Parity error -- HCCR=%x, Dumping " | |
202 | "firmware.\n", hccr); | |
1da177e4 | 203 | else |
7c3df132 SK |
204 | ql_log(ql_log_warn, vha, 0x5027, |
205 | "RISC paused -- HCCR=%x, Dumping " | |
206 | "firmware.\n", hccr); | |
1da177e4 LT |
207 | |
208 | /* | |
209 | * Issue a "HARD" reset in order for the RISC | |
210 | * interrupt bit to be cleared. Schedule a big | |
a06a0f8e | 211 | * hammer to get out of the RISC PAUSED state. |
1da177e4 LT |
212 | */ |
213 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
214 | RD_REG_WORD(®->hccr); | |
07f31805 | 215 | |
e315cd28 AC |
216 | ha->isp_ops->fw_dump(vha, 1); |
217 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
218 | break; |
219 | } else if ((stat & HSR_RISC_INT) == 0) | |
220 | break; | |
221 | ||
1da177e4 | 222 | switch (stat & 0xff) { |
1da177e4 LT |
223 | case 0x1: |
224 | case 0x2: | |
225 | case 0x10: | |
226 | case 0x11: | |
e315cd28 | 227 | qla2x00_mbx_completion(vha, MSW(stat)); |
1da177e4 LT |
228 | status |= MBX_INTERRUPT; |
229 | ||
230 | /* Release mailbox registers. */ | |
231 | WRT_REG_WORD(®->semaphore, 0); | |
232 | break; | |
233 | case 0x12: | |
9a853f71 AV |
234 | mb[0] = MSW(stat); |
235 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
236 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
237 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 238 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 AV |
239 | break; |
240 | case 0x13: | |
73208dfd | 241 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
242 | break; |
243 | case 0x15: | |
9a853f71 AV |
244 | mb[0] = MBA_CMPLT_1_16BIT; |
245 | mb[1] = MSW(stat); | |
73208dfd | 246 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
247 | break; |
248 | case 0x16: | |
9a853f71 AV |
249 | mb[0] = MBA_SCSI_COMPLETION; |
250 | mb[1] = MSW(stat); | |
251 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
73208dfd | 252 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
253 | break; |
254 | default: | |
7c3df132 SK |
255 | ql_dbg(ql_dbg_async, vha, 0x5028, |
256 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
1da177e4 LT |
257 | break; |
258 | } | |
259 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
260 | RD_REG_WORD_RELAXED(®->hccr); | |
261 | } | |
36439832 | 262 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 263 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 264 | |
1da177e4 LT |
265 | return (IRQ_HANDLED); |
266 | } | |
267 | ||
268 | /** | |
269 | * qla2x00_mbx_completion() - Process mailbox command completions. | |
2db6228d | 270 | * @vha: SCSI driver HA context |
1da177e4 LT |
271 | * @mb0: Mailbox0 register |
272 | */ | |
273 | static void | |
e315cd28 | 274 | qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
1da177e4 LT |
275 | { |
276 | uint16_t cnt; | |
4fa94f83 | 277 | uint32_t mboxes; |
1da177e4 | 278 | uint16_t __iomem *wptr; |
e315cd28 | 279 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 280 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 281 | |
4fa94f83 | 282 | /* Read all mbox registers? */ |
c02189e1 BVA |
283 | WARN_ON_ONCE(ha->mbx_count > 32); |
284 | mboxes = (1ULL << ha->mbx_count) - 1; | |
4fa94f83 | 285 | if (!ha->mcp) |
a720101d | 286 | ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
287 | else |
288 | mboxes = ha->mcp->in_mb; | |
289 | ||
1da177e4 LT |
290 | /* Load return mailbox registers. */ |
291 | ha->flags.mbox_int = 1; | |
292 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 293 | mboxes >>= 1; |
1da177e4 LT |
294 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1); |
295 | ||
296 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
fa2a1ce5 | 297 | if (IS_QLA2200(ha) && cnt == 8) |
1da177e4 | 298 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8); |
4fa94f83 | 299 | if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0)) |
1da177e4 | 300 | ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); |
4fa94f83 | 301 | else if (mboxes & BIT_0) |
1da177e4 | 302 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); |
fa2a1ce5 | 303 | |
1da177e4 | 304 | wptr++; |
4fa94f83 | 305 | mboxes >>= 1; |
1da177e4 | 306 | } |
1da177e4 LT |
307 | } |
308 | ||
8a659571 AV |
309 | static void |
310 | qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) | |
311 | { | |
312 | static char *event[] = | |
313 | { "Complete", "Request Notification", "Time Extension" }; | |
314 | int rval; | |
315 | struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; | |
9e5054ec | 316 | struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82; |
8a659571 AV |
317 | uint16_t __iomem *wptr; |
318 | uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; | |
319 | ||
320 | /* Seed data -- mailbox1 -> mailbox7. */ | |
9e5054ec CD |
321 | if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) |
322 | wptr = (uint16_t __iomem *)®24->mailbox1; | |
323 | else if (IS_QLA8044(vha->hw)) | |
324 | wptr = (uint16_t __iomem *)®82->mailbox_out[1]; | |
325 | else | |
326 | return; | |
327 | ||
8a659571 AV |
328 | for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) |
329 | mb[cnt] = RD_REG_WORD(wptr); | |
330 | ||
7c3df132 | 331 | ql_dbg(ql_dbg_async, vha, 0x5021, |
6246b8a1 | 332 | "Inter-Driver Communication %s -- " |
7c3df132 SK |
333 | "%04x %04x %04x %04x %04x %04x %04x.\n", |
334 | event[aen & 0xff], mb[0], mb[1], mb[2], mb[3], | |
335 | mb[4], mb[5], mb[6]); | |
454073c9 SV |
336 | switch (aen) { |
337 | /* Handle IDC Error completion case. */ | |
338 | case MBA_IDC_COMPLETE: | |
339 | if (mb[1] >> 15) { | |
340 | vha->hw->flags.idc_compl_status = 1; | |
9aaf2cea | 341 | if (vha->hw->notify_dcbx_comp && !vha->vp_idx) |
454073c9 SV |
342 | complete(&vha->hw->dcbx_comp); |
343 | } | |
344 | break; | |
345 | ||
346 | case MBA_IDC_NOTIFY: | |
347 | /* Acknowledgement needed? [Notify && non-zero timeout]. */ | |
348 | timeout = (descr >> 8) & 0xf; | |
349 | ql_dbg(ql_dbg_async, vha, 0x5022, | |
350 | "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n", | |
351 | vha->host_no, event[aen & 0xff], timeout); | |
352 | ||
353 | if (!timeout) | |
354 | return; | |
355 | rval = qla2x00_post_idc_ack_work(vha, mb); | |
356 | if (rval != QLA_SUCCESS) | |
357 | ql_log(ql_log_warn, vha, 0x5023, | |
358 | "IDC failed to post ACK.\n"); | |
359 | break; | |
360 | case MBA_IDC_TIME_EXT: | |
361 | vha->hw->idc_extend_tmo = descr; | |
362 | ql_dbg(ql_dbg_async, vha, 0x5087, | |
363 | "%lu Inter-Driver Communication %s -- " | |
364 | "Extend timeout by=%d.\n", | |
365 | vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo); | |
366 | break; | |
bf5b8ad7 | 367 | } |
8a659571 AV |
368 | } |
369 | ||
daae62a3 | 370 | #define LS_UNKNOWN 2 |
d0297c9a JC |
371 | const char * |
372 | qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed) | |
daae62a3 | 373 | { |
f73cb695 CD |
374 | static const char *const link_speeds[] = { |
375 | "1", "2", "?", "4", "8", "16", "32", "10" | |
d0297c9a | 376 | }; |
b0a1c5b5 | 377 | #define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1) |
daae62a3 CD |
378 | |
379 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
d0297c9a JC |
380 | return link_speeds[0]; |
381 | else if (speed == 0x13) | |
f73cb695 CD |
382 | return link_speeds[QLA_LAST_SPEED]; |
383 | else if (speed < QLA_LAST_SPEED) | |
d0297c9a JC |
384 | return link_speeds[speed]; |
385 | else | |
386 | return link_speeds[LS_UNKNOWN]; | |
daae62a3 CD |
387 | } |
388 | ||
fa492630 | 389 | static void |
7d613ac6 SV |
390 | qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) |
391 | { | |
392 | struct qla_hw_data *ha = vha->hw; | |
393 | ||
394 | /* | |
395 | * 8200 AEN Interpretation: | |
396 | * mb[0] = AEN code | |
397 | * mb[1] = AEN Reason code | |
398 | * mb[2] = LSW of Peg-Halt Status-1 Register | |
399 | * mb[6] = MSW of Peg-Halt Status-1 Register | |
400 | * mb[3] = LSW of Peg-Halt Status-2 register | |
401 | * mb[7] = MSW of Peg-Halt Status-2 register | |
402 | * mb[4] = IDC Device-State Register value | |
403 | * mb[5] = IDC Driver-Presence Register value | |
404 | */ | |
405 | ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: " | |
406 | "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n", | |
407 | mb[0], mb[1], mb[2], mb[6]); | |
408 | ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x " | |
409 | "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x " | |
410 | "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]); | |
411 | ||
412 | if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE | | |
413 | IDC_HEARTBEAT_FAILURE)) { | |
414 | ha->flags.nic_core_hung = 1; | |
415 | ql_log(ql_log_warn, vha, 0x5060, | |
416 | "83XX: F/W Error Reported: Check if reset required.\n"); | |
417 | ||
418 | if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) { | |
419 | uint32_t protocol_engine_id, fw_err_code, err_level; | |
420 | ||
421 | /* | |
422 | * IDC_PEG_HALT_STATUS_CHANGE interpretation: | |
423 | * - PEG-Halt Status-1 Register: | |
424 | * (LSW = mb[2], MSW = mb[6]) | |
425 | * Bits 0-7 = protocol-engine ID | |
426 | * Bits 8-28 = f/w error code | |
427 | * Bits 29-31 = Error-level | |
428 | * Error-level 0x1 = Non-Fatal error | |
429 | * Error-level 0x2 = Recoverable Fatal error | |
430 | * Error-level 0x4 = UnRecoverable Fatal error | |
431 | * - PEG-Halt Status-2 Register: | |
432 | * (LSW = mb[3], MSW = mb[7]) | |
433 | */ | |
434 | protocol_engine_id = (mb[2] & 0xff); | |
435 | fw_err_code = (((mb[2] & 0xff00) >> 8) | | |
436 | ((mb[6] & 0x1fff) << 8)); | |
437 | err_level = ((mb[6] & 0xe000) >> 13); | |
438 | ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 " | |
439 | "Register: protocol_engine_id=0x%x " | |
440 | "fw_err_code=0x%x err_level=0x%x.\n", | |
441 | protocol_engine_id, fw_err_code, err_level); | |
442 | ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 " | |
443 | "Register: 0x%x%x.\n", mb[7], mb[3]); | |
444 | if (err_level == ERR_LEVEL_NON_FATAL) { | |
445 | ql_log(ql_log_warn, vha, 0x5063, | |
0bf0efa1 | 446 | "Not a fatal error, f/w has recovered itself.\n"); |
7d613ac6 SV |
447 | } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) { |
448 | ql_log(ql_log_fatal, vha, 0x5064, | |
449 | "Recoverable Fatal error: Chip reset " | |
450 | "required.\n"); | |
451 | qla83xx_schedule_work(vha, | |
452 | QLA83XX_NIC_CORE_RESET); | |
453 | } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) { | |
454 | ql_log(ql_log_fatal, vha, 0x5065, | |
455 | "Unrecoverable Fatal error: Set FAILED " | |
456 | "state, reboot required.\n"); | |
457 | qla83xx_schedule_work(vha, | |
458 | QLA83XX_NIC_CORE_UNRECOVERABLE); | |
459 | } | |
460 | } | |
461 | ||
462 | if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) { | |
463 | uint16_t peg_fw_state, nw_interface_link_up; | |
464 | uint16_t nw_interface_signal_detect, sfp_status; | |
465 | uint16_t htbt_counter, htbt_monitor_enable; | |
b4a028a5 | 466 | uint16_t sfp_additional_info, sfp_multirate; |
7d613ac6 SV |
467 | uint16_t sfp_tx_fault, link_speed, dcbx_status; |
468 | ||
469 | /* | |
470 | * IDC_NIC_FW_REPORTED_FAILURE interpretation: | |
471 | * - PEG-to-FC Status Register: | |
472 | * (LSW = mb[2], MSW = mb[6]) | |
473 | * Bits 0-7 = Peg-Firmware state | |
474 | * Bit 8 = N/W Interface Link-up | |
475 | * Bit 9 = N/W Interface signal detected | |
476 | * Bits 10-11 = SFP Status | |
477 | * SFP Status 0x0 = SFP+ transceiver not expected | |
478 | * SFP Status 0x1 = SFP+ transceiver not present | |
479 | * SFP Status 0x2 = SFP+ transceiver invalid | |
480 | * SFP Status 0x3 = SFP+ transceiver present and | |
481 | * valid | |
482 | * Bits 12-14 = Heartbeat Counter | |
483 | * Bit 15 = Heartbeat Monitor Enable | |
484 | * Bits 16-17 = SFP Additional Info | |
485 | * SFP info 0x0 = Unregocnized transceiver for | |
486 | * Ethernet | |
487 | * SFP info 0x1 = SFP+ brand validation failed | |
488 | * SFP info 0x2 = SFP+ speed validation failed | |
489 | * SFP info 0x3 = SFP+ access error | |
490 | * Bit 18 = SFP Multirate | |
491 | * Bit 19 = SFP Tx Fault | |
492 | * Bits 20-22 = Link Speed | |
493 | * Bits 23-27 = Reserved | |
494 | * Bits 28-30 = DCBX Status | |
495 | * DCBX Status 0x0 = DCBX Disabled | |
496 | * DCBX Status 0x1 = DCBX Enabled | |
497 | * DCBX Status 0x2 = DCBX Exchange error | |
498 | * Bit 31 = Reserved | |
499 | */ | |
500 | peg_fw_state = (mb[2] & 0x00ff); | |
501 | nw_interface_link_up = ((mb[2] & 0x0100) >> 8); | |
502 | nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9); | |
503 | sfp_status = ((mb[2] & 0x0c00) >> 10); | |
504 | htbt_counter = ((mb[2] & 0x7000) >> 12); | |
505 | htbt_monitor_enable = ((mb[2] & 0x8000) >> 15); | |
b4a028a5 | 506 | sfp_additional_info = (mb[6] & 0x0003); |
7d613ac6 SV |
507 | sfp_multirate = ((mb[6] & 0x0004) >> 2); |
508 | sfp_tx_fault = ((mb[6] & 0x0008) >> 3); | |
509 | link_speed = ((mb[6] & 0x0070) >> 4); | |
510 | dcbx_status = ((mb[6] & 0x7000) >> 12); | |
511 | ||
512 | ql_log(ql_log_warn, vha, 0x5066, | |
513 | "Peg-to-Fc Status Register:\n" | |
514 | "peg_fw_state=0x%x, nw_interface_link_up=0x%x, " | |
515 | "nw_interface_signal_detect=0x%x" | |
516 | "\nsfp_statis=0x%x.\n ", peg_fw_state, | |
517 | nw_interface_link_up, nw_interface_signal_detect, | |
518 | sfp_status); | |
519 | ql_log(ql_log_warn, vha, 0x5067, | |
520 | "htbt_counter=0x%x, htbt_monitor_enable=0x%x, " | |
b4a028a5 | 521 | "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ", |
7d613ac6 | 522 | htbt_counter, htbt_monitor_enable, |
b4a028a5 | 523 | sfp_additional_info, sfp_multirate); |
7d613ac6 SV |
524 | ql_log(ql_log_warn, vha, 0x5068, |
525 | "sfp_tx_fault=0x%x, link_state=0x%x, " | |
526 | "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed, | |
527 | dcbx_status); | |
528 | ||
529 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
530 | } | |
531 | ||
532 | if (mb[1] & IDC_HEARTBEAT_FAILURE) { | |
533 | ql_log(ql_log_warn, vha, 0x5069, | |
534 | "Heartbeat Failure encountered, chip reset " | |
535 | "required.\n"); | |
536 | ||
537 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
538 | } | |
539 | } | |
540 | ||
541 | if (mb[1] & IDC_DEVICE_STATE_CHANGE) { | |
542 | ql_log(ql_log_info, vha, 0x506a, | |
543 | "IDC Device-State changed = 0x%x.\n", mb[4]); | |
6c3943cd SK |
544 | if (ha->flags.nic_core_reset_owner) |
545 | return; | |
7d613ac6 SV |
546 | qla83xx_schedule_work(vha, MBA_IDC_AEN); |
547 | } | |
548 | } | |
549 | ||
bb4cf5b7 CD |
550 | int |
551 | qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry) | |
552 | { | |
553 | struct qla_hw_data *ha = vha->hw; | |
554 | scsi_qla_host_t *vp; | |
555 | uint32_t vp_did; | |
556 | unsigned long flags; | |
557 | int ret = 0; | |
558 | ||
559 | if (!ha->num_vhosts) | |
560 | return ret; | |
561 | ||
562 | spin_lock_irqsave(&ha->vport_slock, flags); | |
563 | list_for_each_entry(vp, &ha->vp_list, list) { | |
564 | vp_did = vp->d_id.b24; | |
565 | if (vp_did == rscn_entry) { | |
566 | ret = 1; | |
567 | break; | |
568 | } | |
569 | } | |
570 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
571 | ||
572 | return ret; | |
573 | } | |
574 | ||
726b8548 | 575 | fc_port_t * |
17cac3a1 JC |
576 | qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id) |
577 | { | |
726b8548 QT |
578 | fc_port_t *f, *tf; |
579 | ||
580 | f = tf = NULL; | |
581 | list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) | |
582 | if (f->loop_id == loop_id) | |
583 | return f; | |
584 | return NULL; | |
585 | } | |
17cac3a1 | 586 | |
726b8548 QT |
587 | fc_port_t * |
588 | qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted) | |
589 | { | |
590 | fc_port_t *f, *tf; | |
591 | ||
592 | f = tf = NULL; | |
593 | list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { | |
594 | if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) { | |
595 | if (incl_deleted) | |
596 | return f; | |
597 | else if (f->deleted == 0) | |
598 | return f; | |
599 | } | |
600 | } | |
601 | return NULL; | |
602 | } | |
17cac3a1 | 603 | |
726b8548 QT |
604 | fc_port_t * |
605 | qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id, | |
606 | u8 incl_deleted) | |
607 | { | |
608 | fc_port_t *f, *tf; | |
609 | ||
610 | f = tf = NULL; | |
611 | list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { | |
612 | if (f->d_id.b24 == id->b24) { | |
613 | if (incl_deleted) | |
614 | return f; | |
615 | else if (f->deleted == 0) | |
616 | return f; | |
617 | } | |
618 | } | |
17cac3a1 JC |
619 | return NULL; |
620 | } | |
621 | ||
1da177e4 LT |
622 | /** |
623 | * qla2x00_async_event() - Process aynchronous events. | |
2db6228d BVA |
624 | * @vha: SCSI driver HA context |
625 | * @rsp: response queue | |
9a853f71 | 626 | * @mb: Mailbox registers (0 - 3) |
1da177e4 | 627 | */ |
2c3dfe3f | 628 | void |
73208dfd | 629 | qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb) |
1da177e4 | 630 | { |
1da177e4 | 631 | uint16_t handle_cnt; |
bdab23da | 632 | uint16_t cnt, mbx; |
1da177e4 | 633 | uint32_t handles[5]; |
e315cd28 | 634 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 635 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
bdab23da | 636 | struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; |
bc5c2aad | 637 | struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; |
52c82823 | 638 | uint32_t rscn_entry, host_pid; |
4d4df193 | 639 | unsigned long flags; |
ef86cb20 | 640 | fc_port_t *fcport = NULL; |
1da177e4 | 641 | |
45235022 QT |
642 | if (!vha->hw->flags.fw_started) |
643 | return; | |
644 | ||
1da177e4 LT |
645 | /* Setup to process RIO completion. */ |
646 | handle_cnt = 0; | |
6246b8a1 | 647 | if (IS_CNA_CAPABLE(ha)) |
3a03eb79 | 648 | goto skip_rio; |
1da177e4 LT |
649 | switch (mb[0]) { |
650 | case MBA_SCSI_COMPLETION: | |
9a853f71 | 651 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
652 | handle_cnt = 1; |
653 | break; | |
654 | case MBA_CMPLT_1_16BIT: | |
9a853f71 | 655 | handles[0] = mb[1]; |
1da177e4 LT |
656 | handle_cnt = 1; |
657 | mb[0] = MBA_SCSI_COMPLETION; | |
658 | break; | |
659 | case MBA_CMPLT_2_16BIT: | |
9a853f71 AV |
660 | handles[0] = mb[1]; |
661 | handles[1] = mb[2]; | |
1da177e4 LT |
662 | handle_cnt = 2; |
663 | mb[0] = MBA_SCSI_COMPLETION; | |
664 | break; | |
665 | case MBA_CMPLT_3_16BIT: | |
9a853f71 AV |
666 | handles[0] = mb[1]; |
667 | handles[1] = mb[2]; | |
668 | handles[2] = mb[3]; | |
1da177e4 LT |
669 | handle_cnt = 3; |
670 | mb[0] = MBA_SCSI_COMPLETION; | |
671 | break; | |
672 | case MBA_CMPLT_4_16BIT: | |
9a853f71 AV |
673 | handles[0] = mb[1]; |
674 | handles[1] = mb[2]; | |
675 | handles[2] = mb[3]; | |
1da177e4 LT |
676 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
677 | handle_cnt = 4; | |
678 | mb[0] = MBA_SCSI_COMPLETION; | |
679 | break; | |
680 | case MBA_CMPLT_5_16BIT: | |
9a853f71 AV |
681 | handles[0] = mb[1]; |
682 | handles[1] = mb[2]; | |
683 | handles[2] = mb[3]; | |
1da177e4 LT |
684 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
685 | handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); | |
686 | handle_cnt = 5; | |
687 | mb[0] = MBA_SCSI_COMPLETION; | |
688 | break; | |
689 | case MBA_CMPLT_2_32BIT: | |
9a853f71 | 690 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
691 | handles[1] = le32_to_cpu( |
692 | ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) | | |
693 | RD_MAILBOX_REG(ha, reg, 6)); | |
694 | handle_cnt = 2; | |
695 | mb[0] = MBA_SCSI_COMPLETION; | |
696 | break; | |
697 | default: | |
698 | break; | |
699 | } | |
3a03eb79 | 700 | skip_rio: |
1da177e4 LT |
701 | switch (mb[0]) { |
702 | case MBA_SCSI_COMPLETION: /* Fast Post */ | |
e315cd28 | 703 | if (!vha->flags.online) |
1da177e4 LT |
704 | break; |
705 | ||
706 | for (cnt = 0; cnt < handle_cnt; cnt++) | |
73208dfd AC |
707 | qla2x00_process_completed_request(vha, rsp->req, |
708 | handles[cnt]); | |
1da177e4 LT |
709 | break; |
710 | ||
711 | case MBA_RESET: /* Reset */ | |
7c3df132 SK |
712 | ql_dbg(ql_dbg_async, vha, 0x5002, |
713 | "Asynchronous RESET.\n"); | |
1da177e4 | 714 | |
e315cd28 | 715 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
716 | break; |
717 | ||
718 | case MBA_SYSTEM_ERR: /* System Error */ | |
ecc89f25 JC |
719 | mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || |
720 | IS_QLA28XX(ha)) ? | |
6246b8a1 | 721 | RD_REG_WORD(®24->mailbox7) : 0; |
7c3df132 | 722 | ql_log(ql_log_warn, vha, 0x5003, |
bdab23da AV |
723 | "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh " |
724 | "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx); | |
2a3192a3 JC |
725 | ha->fw_dump_mpi = |
726 | (IS_QLA27XX(ha) || IS_QLA28XX(ha)) && | |
727 | RD_REG_WORD(®24->mailbox7) & BIT_8; | |
e315cd28 | 728 | ha->isp_ops->fw_dump(vha, 1); |
ec7193e2 | 729 | ha->flags.fw_init_done = 0; |
4b60c827 | 730 | QLA_FW_STOPPED(ha); |
1da177e4 | 731 | |
e428924c | 732 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 733 | if (mb[1] == 0 && mb[2] == 0) { |
7c3df132 | 734 | ql_log(ql_log_fatal, vha, 0x5004, |
9a853f71 AV |
735 | "Unrecoverable Hardware Error: adapter " |
736 | "marked OFFLINE!\n"); | |
e315cd28 | 737 | vha->flags.online = 0; |
6246b8a1 | 738 | vha->device_flags |= DFLG_DEV_FAILED; |
b1d46989 | 739 | } else { |
25985edc | 740 | /* Check to see if MPI timeout occurred */ |
f73cb695 | 741 | if ((mbx & MBX_3) && (ha->port_no == 0)) |
b1d46989 MI |
742 | set_bit(MPI_RESET_NEEDED, |
743 | &vha->dpc_flags); | |
744 | ||
e315cd28 | 745 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
b1d46989 | 746 | } |
9a853f71 | 747 | } else if (mb[1] == 0) { |
7c3df132 | 748 | ql_log(ql_log_fatal, vha, 0x5005, |
1da177e4 LT |
749 | "Unrecoverable Hardware Error: adapter marked " |
750 | "OFFLINE!\n"); | |
e315cd28 | 751 | vha->flags.online = 0; |
6246b8a1 | 752 | vha->device_flags |= DFLG_DEV_FAILED; |
1da177e4 | 753 | } else |
e315cd28 | 754 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
755 | break; |
756 | ||
757 | case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */ | |
7c3df132 SK |
758 | ql_log(ql_log_warn, vha, 0x5006, |
759 | "ISP Request Transfer Error (%x).\n", mb[1]); | |
1da177e4 | 760 | |
e315cd28 | 761 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
762 | break; |
763 | ||
764 | case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */ | |
7c3df132 | 765 | ql_log(ql_log_warn, vha, 0x5007, |
41233cd3 | 766 | "ISP Response Transfer Error (%x).\n", mb[1]); |
1da177e4 | 767 | |
e315cd28 | 768 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
769 | break; |
770 | ||
771 | case MBA_WAKEUP_THRES: /* Request Queue Wake-up */ | |
7c3df132 | 772 | ql_dbg(ql_dbg_async, vha, 0x5008, |
41233cd3 JC |
773 | "Asynchronous WAKEUP_THRES (%x).\n", mb[1]); |
774 | break; | |
1da177e4 | 775 | |
41233cd3 | 776 | case MBA_LOOP_INIT_ERR: |
75d560e0 | 777 | ql_log(ql_log_warn, vha, 0x5090, |
41233cd3 | 778 | "LOOP INIT ERROR (%x).\n", mb[1]); |
41233cd3 | 779 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
2d70c103 | 780 | break; |
41233cd3 | 781 | |
1da177e4 | 782 | case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ |
ec7193e2 | 783 | ha->flags.lip_ae = 1; |
ec7193e2 | 784 | |
cfb0919c | 785 | ql_dbg(ql_dbg_async, vha, 0x5009, |
7c3df132 | 786 | "LIP occurred (%x).\n", mb[1]); |
1da177e4 | 787 | |
e315cd28 AC |
788 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
789 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
790 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
791 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
792 | } |
793 | ||
e315cd28 AC |
794 | if (vha->vp_idx) { |
795 | atomic_set(&vha->vp_state, VP_FAILED); | |
796 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
797 | } |
798 | ||
e315cd28 AC |
799 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); |
800 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
1da177e4 | 801 | |
e315cd28 AC |
802 | vha->flags.management_server_logged_in = 0; |
803 | qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]); | |
1da177e4 LT |
804 | break; |
805 | ||
806 | case MBA_LOOP_UP: /* Loop Up Event */ | |
daae62a3 | 807 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
d8b45213 | 808 | ha->link_data_rate = PORT_SPEED_1GB; |
daae62a3 | 809 | else |
1da177e4 | 810 | ha->link_data_rate = mb[1]; |
1da177e4 | 811 | |
8e5a9484 | 812 | ql_log(ql_log_info, vha, 0x500a, |
daae62a3 | 813 | "LOOP UP detected (%s Gbps).\n", |
d0297c9a | 814 | qla2x00_get_link_speed_str(ha, ha->link_data_rate)); |
1da177e4 | 815 | |
e315cd28 AC |
816 | vha->flags.management_server_logged_in = 0; |
817 | qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); | |
e4e3a2ce QT |
818 | |
819 | if (AUTO_DETECT_SFP_SUPPORT(vha)) { | |
820 | set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags); | |
821 | qla2xxx_wake_dpc(vha); | |
822 | } | |
1da177e4 LT |
823 | break; |
824 | ||
825 | case MBA_LOOP_DOWN: /* Loop Down Event */ | |
9cd883f0 | 826 | SAVE_TOPO(ha); |
ec7193e2 QT |
827 | ha->flags.lip_ae = 0; |
828 | ha->current_topology = 0; | |
829 | ||
6246b8a1 GM |
830 | mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
831 | ? RD_REG_WORD(®24->mailbox4) : 0; | |
7ec0effd AD |
832 | mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(®82->mailbox_out[4]) |
833 | : mbx; | |
8e5a9484 | 834 | ql_log(ql_log_info, vha, 0x500b, |
7c3df132 SK |
835 | "LOOP DOWN detected (%x %x %x %x).\n", |
836 | mb[1], mb[2], mb[3], mbx); | |
1da177e4 | 837 | |
e315cd28 AC |
838 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
839 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
840 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
2486c627 HM |
841 | /* |
842 | * In case of loop down, restore WWPN from | |
843 | * NVRAM in case of FA-WWPN capable ISP | |
718abbdc | 844 | * Restore for Physical Port only |
2486c627 | 845 | */ |
718abbdc | 846 | if (!vha->vp_idx) { |
dcbf8f80 SC |
847 | if (ha->flags.fawwpn_enabled && |
848 | (ha->current_topology == ISP_CFG_F)) { | |
718abbdc | 849 | void *wwpn = ha->init_cb->port_name; |
bd432bb5 | 850 | |
718abbdc SC |
851 | memcpy(vha->port_name, wwpn, WWN_SIZE); |
852 | fc_host_port_name(vha->host) = | |
853 | wwn_to_u64(vha->port_name); | |
854 | ql_dbg(ql_dbg_init + ql_dbg_verbose, | |
83548fe2 | 855 | vha, 0x00d8, "LOOP DOWN detected," |
718abbdc SC |
856 | "restore WWPN %016llx\n", |
857 | wwn_to_u64(vha->port_name)); | |
858 | } | |
859 | ||
860 | clear_bit(VP_CONFIG_OK, &vha->vp_flags); | |
2486c627 HM |
861 | } |
862 | ||
e315cd28 AC |
863 | vha->device_flags |= DFLG_NO_CABLE; |
864 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
865 | } |
866 | ||
e315cd28 AC |
867 | if (vha->vp_idx) { |
868 | atomic_set(&vha->vp_state, VP_FAILED); | |
869 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
870 | } |
871 | ||
e315cd28 | 872 | vha->flags.management_server_logged_in = 0; |
d8b45213 | 873 | ha->link_data_rate = PORT_SPEED_UNKNOWN; |
e315cd28 | 874 | qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0); |
1da177e4 LT |
875 | break; |
876 | ||
877 | case MBA_LIP_RESET: /* LIP reset occurred */ | |
cfb0919c | 878 | ql_dbg(ql_dbg_async, vha, 0x500c, |
cc3ef7bc | 879 | "LIP reset occurred (%x).\n", mb[1]); |
1da177e4 | 880 | |
e315cd28 AC |
881 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
882 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
883 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
884 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
885 | } |
886 | ||
e315cd28 AC |
887 | if (vha->vp_idx) { |
888 | atomic_set(&vha->vp_state, VP_FAILED); | |
889 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
890 | } |
891 | ||
e315cd28 | 892 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
893 | |
894 | ha->operating_mode = LOOP; | |
e315cd28 AC |
895 | vha->flags.management_server_logged_in = 0; |
896 | qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]); | |
1da177e4 LT |
897 | break; |
898 | ||
3a03eb79 | 899 | /* case MBA_DCBX_COMPLETE: */ |
1da177e4 | 900 | case MBA_POINT_TO_POINT: /* Point-to-Point */ |
ec7193e2 | 901 | ha->flags.lip_ae = 0; |
ec7193e2 | 902 | |
1da177e4 LT |
903 | if (IS_QLA2100(ha)) |
904 | break; | |
905 | ||
7ec0effd | 906 | if (IS_CNA_CAPABLE(ha)) { |
7c3df132 SK |
907 | ql_dbg(ql_dbg_async, vha, 0x500d, |
908 | "DCBX Completed -- %04x %04x %04x.\n", | |
909 | mb[1], mb[2], mb[3]); | |
9aaf2cea | 910 | if (ha->notify_dcbx_comp && !vha->vp_idx) |
23f2ebd1 SR |
911 | complete(&ha->dcbx_comp); |
912 | ||
913 | } else | |
7c3df132 SK |
914 | ql_dbg(ql_dbg_async, vha, 0x500e, |
915 | "Asynchronous P2P MODE received.\n"); | |
1da177e4 LT |
916 | |
917 | /* | |
918 | * Until there's a transition from loop down to loop up, treat | |
919 | * this as loop down only. | |
920 | */ | |
e315cd28 AC |
921 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
922 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
923 | if (!atomic_read(&vha->loop_down_timer)) | |
924 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 925 | LOOP_DOWN_TIME); |
48acad09 QT |
926 | if (!N2N_TOPO(ha)) |
927 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
928 | } |
929 | ||
e315cd28 AC |
930 | if (vha->vp_idx) { |
931 | atomic_set(&vha->vp_state, VP_FAILED); | |
932 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
933 | } |
934 | ||
e315cd28 AC |
935 | if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) |
936 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
937 | ||
938 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); | |
939 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
4346b149 | 940 | |
e315cd28 | 941 | vha->flags.management_server_logged_in = 0; |
1da177e4 LT |
942 | break; |
943 | ||
944 | case MBA_CHG_IN_CONNECTION: /* Change in connection mode */ | |
945 | if (IS_QLA2100(ha)) | |
946 | break; | |
947 | ||
cfb0919c | 948 | ql_dbg(ql_dbg_async, vha, 0x500f, |
1da177e4 LT |
949 | "Configuration change detected: value=%x.\n", mb[1]); |
950 | ||
e315cd28 AC |
951 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
952 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
953 | if (!atomic_read(&vha->loop_down_timer)) | |
954 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 955 | LOOP_DOWN_TIME); |
e315cd28 | 956 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 LT |
957 | } |
958 | ||
e315cd28 AC |
959 | if (vha->vp_idx) { |
960 | atomic_set(&vha->vp_state, VP_FAILED); | |
961 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
962 | } |
963 | ||
e315cd28 AC |
964 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
965 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 LT |
966 | break; |
967 | ||
968 | case MBA_PORT_UPDATE: /* Port database update */ | |
55903b9d SV |
969 | /* |
970 | * Handle only global and vn-port update events | |
971 | * | |
972 | * Relevant inputs: | |
973 | * mb[1] = N_Port handle of changed port | |
974 | * OR 0xffff for global event | |
975 | * mb[2] = New login state | |
976 | * 7 = Port logged out | |
977 | * mb[3] = LSB is vp_idx, 0xff = all vps | |
978 | * | |
979 | * Skip processing if: | |
980 | * Event is global, vp_idx is NOT all vps, | |
981 | * vp_idx does not match | |
982 | * Event is not global, vp_idx does not match | |
983 | */ | |
12cec63e AV |
984 | if (IS_QLA2XXX_MIDTYPE(ha) && |
985 | ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) || | |
986 | (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff)) | |
987 | break; | |
73208dfd | 988 | |
17cac3a1 | 989 | if (mb[2] == 0x7) { |
7c3df132 | 990 | ql_dbg(ql_dbg_async, vha, 0x5010, |
17cac3a1 JC |
991 | "Port %s %04x %04x %04x.\n", |
992 | mb[1] == 0xffff ? "unavailable" : "logout", | |
7c3df132 | 993 | mb[1], mb[2], mb[3]); |
17cac3a1 JC |
994 | |
995 | if (mb[1] == 0xffff) | |
996 | goto global_port_update; | |
997 | ||
b98ae0d7 QT |
998 | if (mb[1] == NPH_SNS_LID(ha)) { |
999 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1000 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1001 | break; | |
1002 | } | |
1003 | ||
1004 | /* use handle_cnt for loop id/nport handle */ | |
1005 | if (IS_FWI2_CAPABLE(ha)) | |
1006 | handle_cnt = NPH_SNS; | |
1007 | else | |
1008 | handle_cnt = SIMPLE_NAME_SERVER; | |
1009 | if (mb[1] == handle_cnt) { | |
1010 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1011 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1012 | break; | |
1013 | } | |
1014 | ||
17cac3a1 JC |
1015 | /* Port logout */ |
1016 | fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]); | |
1017 | if (!fcport) | |
1018 | break; | |
1019 | if (atomic_read(&fcport->state) != FCS_ONLINE) | |
1020 | break; | |
1021 | ql_dbg(ql_dbg_async, vha, 0x508a, | |
1022 | "Marking port lost loopid=%04x portid=%06x.\n", | |
1023 | fcport->loop_id, fcport->d_id.b24); | |
726b8548 QT |
1024 | if (qla_ini_mode_enabled(vha)) { |
1025 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); | |
1026 | fcport->logout_on_delete = 0; | |
d8630bb9 | 1027 | qlt_schedule_sess_for_deletion(fcport); |
726b8548 | 1028 | } |
17cac3a1 JC |
1029 | break; |
1030 | ||
1031 | global_port_update: | |
9764ff88 AV |
1032 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
1033 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
1034 | atomic_set(&vha->loop_down_timer, | |
1035 | LOOP_DOWN_TIME); | |
1036 | vha->device_flags |= DFLG_NO_CABLE; | |
1037 | qla2x00_mark_all_devices_lost(vha, 1); | |
1038 | } | |
1039 | ||
1040 | if (vha->vp_idx) { | |
1041 | atomic_set(&vha->vp_state, VP_FAILED); | |
1042 | fc_vport_set_state(vha->fc_vport, | |
1043 | FC_VPORT_FAILED); | |
faadc5e7 | 1044 | qla2x00_mark_all_devices_lost(vha, 1); |
9764ff88 AV |
1045 | } |
1046 | ||
1047 | vha->flags.management_server_logged_in = 0; | |
1048 | ha->link_data_rate = PORT_SPEED_UNKNOWN; | |
1049 | break; | |
1050 | } | |
1051 | ||
1da177e4 | 1052 | /* |
cc3ef7bc | 1053 | * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET |
1da177e4 LT |
1054 | * event etc. earlier indicating loop is down) then process |
1055 | * it. Otherwise ignore it and Wait for RSCN to come in. | |
1056 | */ | |
e315cd28 | 1057 | atomic_set(&vha->loop_down_timer, 0); |
8e5a9484 | 1058 | if (atomic_read(&vha->loop_state) != LOOP_DOWN && |
edd05de1 | 1059 | !ha->flags.n2n_ae && |
8e5a9484 | 1060 | atomic_read(&vha->loop_state) != LOOP_DEAD) { |
7c3df132 SK |
1061 | ql_dbg(ql_dbg_async, vha, 0x5011, |
1062 | "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n", | |
1063 | mb[1], mb[2], mb[3]); | |
2d70c103 NB |
1064 | |
1065 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
1066 | break; |
1067 | } | |
1068 | ||
7c3df132 SK |
1069 | ql_dbg(ql_dbg_async, vha, 0x5012, |
1070 | "Port database changed %04x %04x %04x.\n", | |
1071 | mb[1], mb[2], mb[3]); | |
1da177e4 LT |
1072 | |
1073 | /* | |
1074 | * Mark all devices as missing so we will login again. | |
1075 | */ | |
e315cd28 | 1076 | atomic_set(&vha->loop_state, LOOP_UP); |
6944dccb | 1077 | vha->scan.scan_retry = 0; |
1da177e4 | 1078 | |
e315cd28 AC |
1079 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1080 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
ded6411f | 1081 | set_bit(VP_CONFIG_OK, &vha->vp_flags); |
2d70c103 NB |
1082 | |
1083 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
1084 | break; |
1085 | ||
1086 | case MBA_RSCN_UPDATE: /* State Change Registration */ | |
3c397400 | 1087 | /* Check if the Vport has issued a SCR */ |
e315cd28 | 1088 | if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags)) |
3c397400 SJ |
1089 | break; |
1090 | /* Only handle SCNs for our Vport index. */ | |
0d6e61bc | 1091 | if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff)) |
3c397400 | 1092 | break; |
0d6e61bc | 1093 | |
7c3df132 SK |
1094 | ql_dbg(ql_dbg_async, vha, 0x5013, |
1095 | "RSCN database changed -- %04x %04x %04x.\n", | |
1096 | mb[1], mb[2], mb[3]); | |
1da177e4 | 1097 | |
59d72d87 | 1098 | rscn_entry = ((mb[1] & 0xff) << 16) | mb[2]; |
e315cd28 AC |
1099 | host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8) |
1100 | | vha->d_id.b.al_pa; | |
1da177e4 | 1101 | if (rscn_entry == host_pid) { |
7c3df132 SK |
1102 | ql_dbg(ql_dbg_async, vha, 0x5014, |
1103 | "Ignoring RSCN update to local host " | |
1104 | "port ID (%06x).\n", host_pid); | |
1da177e4 LT |
1105 | break; |
1106 | } | |
1107 | ||
59d72d87 RA |
1108 | /* Ignore reserved bits from RSCN-payload. */ |
1109 | rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2]; | |
1da177e4 | 1110 | |
bb4cf5b7 CD |
1111 | /* Skip RSCNs for virtual ports on the same physical port */ |
1112 | if (qla2x00_is_a_vp_did(vha, rscn_entry)) | |
1113 | break; | |
1114 | ||
e315cd28 AC |
1115 | atomic_set(&vha->loop_down_timer, 0); |
1116 | vha->flags.management_server_logged_in = 0; | |
726b8548 QT |
1117 | { |
1118 | struct event_arg ea; | |
1da177e4 | 1119 | |
726b8548 QT |
1120 | memset(&ea, 0, sizeof(ea)); |
1121 | ea.event = FCME_RSCN; | |
1122 | ea.id.b24 = rscn_entry; | |
41dc529a | 1123 | ea.id.b.rsvd_1 = rscn_entry >> 24; |
726b8548 | 1124 | qla2x00_fcport_event_handler(vha, &ea); |
41dc529a | 1125 | qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry); |
726b8548 | 1126 | } |
1da177e4 | 1127 | break; |
1da177e4 LT |
1128 | /* case MBA_RIO_RESPONSE: */ |
1129 | case MBA_ZIO_RESPONSE: | |
7c3df132 SK |
1130 | ql_dbg(ql_dbg_async, vha, 0x5015, |
1131 | "[R|Z]IO update completion.\n"); | |
1da177e4 | 1132 | |
e428924c | 1133 | if (IS_FWI2_CAPABLE(ha)) |
2afa19a9 | 1134 | qla24xx_process_response_queue(vha, rsp); |
4fdfefe5 | 1135 | else |
73208dfd | 1136 | qla2x00_process_response_queue(rsp); |
1da177e4 | 1137 | break; |
9a853f71 AV |
1138 | |
1139 | case MBA_DISCARD_RND_FRAME: | |
7c3df132 SK |
1140 | ql_dbg(ql_dbg_async, vha, 0x5016, |
1141 | "Discard RND Frame -- %04x %04x %04x.\n", | |
1142 | mb[1], mb[2], mb[3]); | |
9a853f71 | 1143 | break; |
45ebeb56 AV |
1144 | |
1145 | case MBA_TRACE_NOTIFICATION: | |
7c3df132 SK |
1146 | ql_dbg(ql_dbg_async, vha, 0x5017, |
1147 | "Trace Notification -- %04x %04x.\n", mb[1], mb[2]); | |
45ebeb56 | 1148 | break; |
4d4df193 HK |
1149 | |
1150 | case MBA_ISP84XX_ALERT: | |
7c3df132 SK |
1151 | ql_dbg(ql_dbg_async, vha, 0x5018, |
1152 | "ISP84XX Alert Notification -- %04x %04x %04x.\n", | |
1153 | mb[1], mb[2], mb[3]); | |
4d4df193 HK |
1154 | |
1155 | spin_lock_irqsave(&ha->cs84xx->access_lock, flags); | |
1156 | switch (mb[1]) { | |
1157 | case A84_PANIC_RECOVERY: | |
7c3df132 SK |
1158 | ql_log(ql_log_info, vha, 0x5019, |
1159 | "Alert 84XX: panic recovery %04x %04x.\n", | |
1160 | mb[2], mb[3]); | |
4d4df193 HK |
1161 | break; |
1162 | case A84_OP_LOGIN_COMPLETE: | |
1163 | ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1164 | ql_log(ql_log_info, vha, 0x501a, |
1165 | "Alert 84XX: firmware version %x.\n", | |
1166 | ha->cs84xx->op_fw_version); | |
4d4df193 HK |
1167 | break; |
1168 | case A84_DIAG_LOGIN_COMPLETE: | |
1169 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1170 | ql_log(ql_log_info, vha, 0x501b, |
1171 | "Alert 84XX: diagnostic firmware version %x.\n", | |
1172 | ha->cs84xx->diag_fw_version); | |
4d4df193 HK |
1173 | break; |
1174 | case A84_GOLD_LOGIN_COMPLETE: | |
1175 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
1176 | ha->cs84xx->fw_update = 1; | |
7c3df132 SK |
1177 | ql_log(ql_log_info, vha, 0x501c, |
1178 | "Alert 84XX: gold firmware version %x.\n", | |
1179 | ha->cs84xx->gold_fw_version); | |
4d4df193 HK |
1180 | break; |
1181 | default: | |
7c3df132 SK |
1182 | ql_log(ql_log_warn, vha, 0x501d, |
1183 | "Alert 84xx: Invalid Alert %04x %04x %04x.\n", | |
4d4df193 HK |
1184 | mb[1], mb[2], mb[3]); |
1185 | } | |
1186 | spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); | |
1187 | break; | |
3a03eb79 | 1188 | case MBA_DCBX_START: |
7c3df132 SK |
1189 | ql_dbg(ql_dbg_async, vha, 0x501e, |
1190 | "DCBX Started -- %04x %04x %04x.\n", | |
1191 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1192 | break; |
1193 | case MBA_DCBX_PARAM_UPDATE: | |
7c3df132 SK |
1194 | ql_dbg(ql_dbg_async, vha, 0x501f, |
1195 | "DCBX Parameters Updated -- %04x %04x %04x.\n", | |
1196 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1197 | break; |
1198 | case MBA_FCF_CONF_ERR: | |
7c3df132 SK |
1199 | ql_dbg(ql_dbg_async, vha, 0x5020, |
1200 | "FCF Configuration Error -- %04x %04x %04x.\n", | |
1201 | mb[1], mb[2], mb[3]); | |
3a03eb79 | 1202 | break; |
3a03eb79 | 1203 | case MBA_IDC_NOTIFY: |
7ec0effd | 1204 | if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { |
67b2a31f CD |
1205 | mb[4] = RD_REG_WORD(®24->mailbox4); |
1206 | if (((mb[2] & 0x7fff) == MBC_PORT_RESET || | |
1207 | (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) && | |
1208 | (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) { | |
8fcd6b8b | 1209 | set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); |
67b2a31f CD |
1210 | /* |
1211 | * Extend loop down timer since port is active. | |
1212 | */ | |
1213 | if (atomic_read(&vha->loop_state) == LOOP_DOWN) | |
1214 | atomic_set(&vha->loop_down_timer, | |
1215 | LOOP_DOWN_TIME); | |
8fcd6b8b CD |
1216 | qla2xxx_wake_dpc(vha); |
1217 | } | |
67b2a31f | 1218 | } |
81881861 | 1219 | /* fall through */ |
8fcd6b8b | 1220 | case MBA_IDC_COMPLETE: |
9aaf2cea | 1221 | if (ha->notify_lb_portup_comp && !vha->vp_idx) |
f356bef1 CD |
1222 | complete(&ha->lb_portup_comp); |
1223 | /* Fallthru */ | |
3a03eb79 | 1224 | case MBA_IDC_TIME_EXT: |
7ec0effd AD |
1225 | if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || |
1226 | IS_QLA8044(ha)) | |
7d613ac6 SV |
1227 | qla81xx_idc_event(vha, mb[0], mb[1]); |
1228 | break; | |
1229 | ||
1230 | case MBA_IDC_AEN: | |
1231 | mb[4] = RD_REG_WORD(®24->mailbox4); | |
1232 | mb[5] = RD_REG_WORD(®24->mailbox5); | |
1233 | mb[6] = RD_REG_WORD(®24->mailbox6); | |
1234 | mb[7] = RD_REG_WORD(®24->mailbox7); | |
1235 | qla83xx_handle_8200_aen(vha, mb); | |
3a03eb79 | 1236 | break; |
7d613ac6 | 1237 | |
b5a340dd JC |
1238 | case MBA_DPORT_DIAGNOSTICS: |
1239 | ql_dbg(ql_dbg_async, vha, 0x5052, | |
ef55e513 | 1240 | "D-Port Diagnostics: %04x result=%s\n", |
ec891462 | 1241 | mb[0], |
b5a340dd | 1242 | mb[1] == 0 ? "start" : |
ef55e513 JC |
1243 | mb[1] == 1 ? "done (pass)" : |
1244 | mb[1] == 2 ? "done (error)" : "other"); | |
b5a340dd JC |
1245 | break; |
1246 | ||
a29b3dd7 JC |
1247 | case MBA_TEMPERATURE_ALERT: |
1248 | ql_dbg(ql_dbg_async, vha, 0x505e, | |
1249 | "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]); | |
1250 | if (mb[1] == 0x12) | |
1251 | schedule_work(&ha->board_disable); | |
1252 | break; | |
1253 | ||
92d4408e SC |
1254 | case MBA_TRANS_INSERT: |
1255 | ql_dbg(ql_dbg_async, vha, 0x5091, | |
1256 | "Transceiver Insertion: %04x\n", mb[1]); | |
1257 | break; | |
1258 | ||
6246b8a1 GM |
1259 | default: |
1260 | ql_dbg(ql_dbg_async, vha, 0x5057, | |
1261 | "Unknown AEN:%04x %04x %04x %04x\n", | |
1262 | mb[0], mb[1], mb[2], mb[3]); | |
1da177e4 | 1263 | } |
2c3dfe3f | 1264 | |
2d70c103 NB |
1265 | qlt_async_event(mb[0], vha, mb); |
1266 | ||
e315cd28 | 1267 | if (!vha->vp_idx && ha->num_vhosts) |
73208dfd | 1268 | qla2x00_alert_all_vps(rsp, mb); |
1da177e4 LT |
1269 | } |
1270 | ||
1271 | /** | |
1272 | * qla2x00_process_completed_request() - Process a Fast Post response. | |
2db6228d BVA |
1273 | * @vha: SCSI driver HA context |
1274 | * @req: request queue | |
1da177e4 LT |
1275 | * @index: SRB index |
1276 | */ | |
8ae6d9c7 | 1277 | void |
73208dfd | 1278 | qla2x00_process_completed_request(struct scsi_qla_host *vha, |
8ae6d9c7 | 1279 | struct req_que *req, uint32_t index) |
1da177e4 LT |
1280 | { |
1281 | srb_t *sp; | |
e315cd28 | 1282 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1283 | |
1284 | /* Validate handle. */ | |
8d93f550 | 1285 | if (index >= req->num_outstanding_cmds) { |
7c3df132 SK |
1286 | ql_log(ql_log_warn, vha, 0x3014, |
1287 | "Invalid SCSI command index (%x).\n", index); | |
1da177e4 | 1288 | |
7ec0effd | 1289 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1290 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1291 | else | |
1292 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1293 | return; |
1294 | } | |
1295 | ||
e315cd28 | 1296 | sp = req->outstanding_cmds[index]; |
1da177e4 LT |
1297 | if (sp) { |
1298 | /* Free outstanding command slot. */ | |
e315cd28 | 1299 | req->outstanding_cmds[index] = NULL; |
1da177e4 | 1300 | |
1da177e4 | 1301 | /* Save ISP completion status */ |
25ff6af1 | 1302 | sp->done(sp, DID_OK << 16); |
1da177e4 | 1303 | } else { |
7c3df132 | 1304 | ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n"); |
1da177e4 | 1305 | |
7ec0effd | 1306 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1307 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1308 | else | |
1309 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1310 | } |
1311 | } | |
1312 | ||
8ae6d9c7 | 1313 | srb_t * |
ac280b67 AV |
1314 | qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func, |
1315 | struct req_que *req, void *iocb) | |
1316 | { | |
1317 | struct qla_hw_data *ha = vha->hw; | |
1318 | sts_entry_t *pkt = iocb; | |
1319 | srb_t *sp = NULL; | |
1320 | uint16_t index; | |
1321 | ||
1322 | index = LSW(pkt->handle); | |
8d93f550 | 1323 | if (index >= req->num_outstanding_cmds) { |
7c3df132 | 1324 | ql_log(ql_log_warn, vha, 0x5031, |
726b8548 QT |
1325 | "Invalid command index (%x) type %8ph.\n", |
1326 | index, iocb); | |
7ec0effd | 1327 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1328 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1329 | else | |
1330 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
ac280b67 AV |
1331 | goto done; |
1332 | } | |
1333 | sp = req->outstanding_cmds[index]; | |
1334 | if (!sp) { | |
7c3df132 SK |
1335 | ql_log(ql_log_warn, vha, 0x5032, |
1336 | "Invalid completion handle (%x) -- timed-out.\n", index); | |
ac280b67 AV |
1337 | return sp; |
1338 | } | |
1339 | if (sp->handle != index) { | |
7c3df132 SK |
1340 | ql_log(ql_log_warn, vha, 0x5033, |
1341 | "SRB handle (%x) mismatch %x.\n", sp->handle, index); | |
ac280b67 AV |
1342 | return NULL; |
1343 | } | |
9a069e19 | 1344 | |
ac280b67 | 1345 | req->outstanding_cmds[index] = NULL; |
9a069e19 | 1346 | |
ac280b67 AV |
1347 | done: |
1348 | return sp; | |
1349 | } | |
1350 | ||
1351 | static void | |
1352 | qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1353 | struct mbx_entry *mbx) | |
1354 | { | |
1355 | const char func[] = "MBX-IOCB"; | |
1356 | const char *type; | |
ac280b67 AV |
1357 | fc_port_t *fcport; |
1358 | srb_t *sp; | |
4916392b | 1359 | struct srb_iocb *lio; |
99b0bec7 | 1360 | uint16_t *data; |
5ff1d584 | 1361 | uint16_t status; |
ac280b67 AV |
1362 | |
1363 | sp = qla2x00_get_sp_from_handle(vha, func, req, mbx); | |
1364 | if (!sp) | |
1365 | return; | |
1366 | ||
9ba56b95 GM |
1367 | lio = &sp->u.iocb_cmd; |
1368 | type = sp->name; | |
ac280b67 | 1369 | fcport = sp->fcport; |
4916392b | 1370 | data = lio->u.logio.data; |
ac280b67 | 1371 | |
5ff1d584 | 1372 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1373 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1374 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1375 | if (mbx->entry_status) { |
7c3df132 | 1376 | ql_dbg(ql_dbg_async, vha, 0x5043, |
cfb0919c | 1377 | "Async-%s error entry - hdl=%x portid=%02x%02x%02x " |
d3fa9e7d | 1378 | "entry-status=%x status=%x state-flag=%x " |
cfb0919c CD |
1379 | "status-flags=%x.\n", type, sp->handle, |
1380 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
d3fa9e7d AV |
1381 | fcport->d_id.b.al_pa, mbx->entry_status, |
1382 | le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags), | |
7c3df132 | 1383 | le16_to_cpu(mbx->status_flags)); |
d3fa9e7d | 1384 | |
cfb0919c | 1385 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029, |
f8f97b0c | 1386 | mbx, sizeof(*mbx)); |
ac280b67 | 1387 | |
99b0bec7 | 1388 | goto logio_done; |
ac280b67 AV |
1389 | } |
1390 | ||
5ff1d584 | 1391 | status = le16_to_cpu(mbx->status); |
9ba56b95 | 1392 | if (status == 0x30 && sp->type == SRB_LOGIN_CMD && |
5ff1d584 AV |
1393 | le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) |
1394 | status = 0; | |
1395 | if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) { | |
7c3df132 | 1396 | ql_dbg(ql_dbg_async, vha, 0x5045, |
cfb0919c CD |
1397 | "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n", |
1398 | type, sp->handle, fcport->d_id.b.domain, | |
1399 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1400 | le16_to_cpu(mbx->mb1)); | |
ac280b67 AV |
1401 | |
1402 | data[0] = MBS_COMMAND_COMPLETE; | |
9ba56b95 | 1403 | if (sp->type == SRB_LOGIN_CMD) { |
99b0bec7 AV |
1404 | fcport->port_type = FCT_TARGET; |
1405 | if (le16_to_cpu(mbx->mb1) & BIT_0) | |
1406 | fcport->port_type = FCT_INITIATOR; | |
6ac52608 | 1407 | else if (le16_to_cpu(mbx->mb1) & BIT_1) |
99b0bec7 | 1408 | fcport->flags |= FCF_FCP2_DEVICE; |
5ff1d584 | 1409 | } |
99b0bec7 | 1410 | goto logio_done; |
ac280b67 AV |
1411 | } |
1412 | ||
1413 | data[0] = le16_to_cpu(mbx->mb0); | |
1414 | switch (data[0]) { | |
1415 | case MBS_PORT_ID_USED: | |
1416 | data[1] = le16_to_cpu(mbx->mb1); | |
1417 | break; | |
1418 | case MBS_LOOP_ID_USED: | |
1419 | break; | |
1420 | default: | |
1421 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1422 | break; |
1423 | } | |
1424 | ||
7c3df132 | 1425 | ql_log(ql_log_warn, vha, 0x5046, |
cfb0919c CD |
1426 | "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x " |
1427 | "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle, | |
1428 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1429 | status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1), | |
ac280b67 | 1430 | le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6), |
7c3df132 | 1431 | le16_to_cpu(mbx->mb7)); |
ac280b67 | 1432 | |
99b0bec7 | 1433 | logio_done: |
25ff6af1 | 1434 | sp->done(sp, 0); |
ac280b67 AV |
1435 | } |
1436 | ||
726b8548 QT |
1437 | static void |
1438 | qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1439 | struct mbx_24xx_entry *pkt) | |
1440 | { | |
1441 | const char func[] = "MBX-IOCB2"; | |
1442 | srb_t *sp; | |
1443 | struct srb_iocb *si; | |
1444 | u16 sz, i; | |
1445 | int res; | |
1446 | ||
1447 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1448 | if (!sp) | |
1449 | return; | |
1450 | ||
1451 | si = &sp->u.iocb_cmd; | |
1452 | sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb)); | |
1453 | ||
1454 | for (i = 0; i < sz; i++) | |
1455 | si->u.mbx.in_mb[i] = le16_to_cpu(pkt->mb[i]); | |
1456 | ||
1457 | res = (si->u.mbx.in_mb[0] & MBS_MASK); | |
1458 | ||
25ff6af1 | 1459 | sp->done(sp, res); |
726b8548 QT |
1460 | } |
1461 | ||
1462 | static void | |
1463 | qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1464 | struct nack_to_isp *pkt) | |
1465 | { | |
1466 | const char func[] = "nack"; | |
1467 | srb_t *sp; | |
1468 | int res = 0; | |
1469 | ||
1470 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1471 | if (!sp) | |
1472 | return; | |
1473 | ||
1474 | if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS)) | |
1475 | res = QLA_FUNCTION_FAILED; | |
1476 | ||
25ff6af1 | 1477 | sp->done(sp, res); |
ac280b67 AV |
1478 | } |
1479 | ||
9bc4f4fb HZ |
1480 | static void |
1481 | qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1482 | sts_entry_t *pkt, int iocb_type) | |
1483 | { | |
1484 | const char func[] = "CT_IOCB"; | |
1485 | const char *type; | |
9bc4f4fb | 1486 | srb_t *sp; |
75cc8cfc | 1487 | struct bsg_job *bsg_job; |
01e0e15c | 1488 | struct fc_bsg_reply *bsg_reply; |
9bc4f4fb | 1489 | uint16_t comp_status; |
726b8548 | 1490 | int res = 0; |
9bc4f4fb HZ |
1491 | |
1492 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1493 | if (!sp) | |
1494 | return; | |
1495 | ||
726b8548 QT |
1496 | switch (sp->type) { |
1497 | case SRB_CT_CMD: | |
1498 | bsg_job = sp->u.bsg_job; | |
1499 | bsg_reply = bsg_job->reply; | |
1500 | ||
1501 | type = "ct pass-through"; | |
1502 | ||
1503 | comp_status = le16_to_cpu(pkt->comp_status); | |
1504 | ||
1505 | /* | |
1506 | * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT | |
1507 | * fc payload to the caller | |
1508 | */ | |
1509 | bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; | |
1510 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); | |
1511 | ||
1512 | if (comp_status != CS_COMPLETE) { | |
1513 | if (comp_status == CS_DATA_UNDERRUN) { | |
1514 | res = DID_OK << 16; | |
1515 | bsg_reply->reply_payload_rcv_len = | |
1a20719e | 1516 | le16_to_cpu(pkt->rsp_info_len); |
726b8548 QT |
1517 | |
1518 | ql_log(ql_log_warn, vha, 0x5048, | |
1519 | "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n", | |
1520 | type, comp_status, | |
1521 | bsg_reply->reply_payload_rcv_len); | |
1522 | } else { | |
1523 | ql_log(ql_log_warn, vha, 0x5049, | |
1524 | "CT pass-through-%s error comp_status=0x%x.\n", | |
1525 | type, comp_status); | |
1526 | res = DID_ERROR << 16; | |
1527 | bsg_reply->reply_payload_rcv_len = 0; | |
1528 | } | |
1529 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035, | |
f8f97b0c | 1530 | pkt, sizeof(*pkt)); |
726b8548 QT |
1531 | } else { |
1532 | res = DID_OK << 16; | |
1533 | bsg_reply->reply_payload_rcv_len = | |
1534 | bsg_job->reply_payload.payload_len; | |
1535 | bsg_job->reply_len = 0; | |
1536 | } | |
1537 | break; | |
1538 | case SRB_CT_PTHRU_CMD: | |
1539 | /* | |
1540 | * borrowing sts_entry_24xx.comp_status. | |
1541 | * same location as ct_entry_24xx.comp_status | |
1542 | */ | |
1543 | res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt, | |
1544 | (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, | |
1545 | sp->name); | |
1546 | break; | |
9bc4f4fb HZ |
1547 | } |
1548 | ||
25ff6af1 | 1549 | sp->done(sp, res); |
9bc4f4fb HZ |
1550 | } |
1551 | ||
9a069e19 GM |
1552 | static void |
1553 | qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1554 | struct sts_entry_24xx *pkt, int iocb_type) | |
1555 | { | |
1556 | const char func[] = "ELS_CT_IOCB"; | |
1557 | const char *type; | |
9a069e19 | 1558 | srb_t *sp; |
75cc8cfc | 1559 | struct bsg_job *bsg_job; |
01e0e15c | 1560 | struct fc_bsg_reply *bsg_reply; |
9a069e19 GM |
1561 | uint16_t comp_status; |
1562 | uint32_t fw_status[3]; | |
9ba56b95 | 1563 | int res; |
edd05de1 | 1564 | struct srb_iocb *els; |
9a069e19 GM |
1565 | |
1566 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1567 | if (!sp) | |
1568 | return; | |
9a069e19 GM |
1569 | |
1570 | type = NULL; | |
9ba56b95 | 1571 | switch (sp->type) { |
9a069e19 GM |
1572 | case SRB_ELS_CMD_RPT: |
1573 | case SRB_ELS_CMD_HST: | |
1574 | type = "els"; | |
1575 | break; | |
1576 | case SRB_CT_CMD: | |
1577 | type = "ct pass-through"; | |
1578 | break; | |
6eb54715 HM |
1579 | case SRB_ELS_DCMD: |
1580 | type = "Driver ELS logo"; | |
edd05de1 DG |
1581 | if (iocb_type != ELS_IOCB_TYPE) { |
1582 | ql_dbg(ql_dbg_user, vha, 0x5047, | |
1583 | "Completing %s: (%p) type=%d.\n", | |
1584 | type, sp, sp->type); | |
1585 | sp->done(sp, 0); | |
1586 | return; | |
1587 | } | |
1588 | break; | |
726b8548 QT |
1589 | case SRB_CT_PTHRU_CMD: |
1590 | /* borrowing sts_entry_24xx.comp_status. | |
1591 | same location as ct_entry_24xx.comp_status | |
1592 | */ | |
2d73ac61 | 1593 | res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt, |
726b8548 QT |
1594 | (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, |
1595 | sp->name); | |
25ff6af1 | 1596 | sp->done(sp, res); |
6eb54715 | 1597 | return; |
9a069e19 | 1598 | default: |
37fed3ee | 1599 | ql_dbg(ql_dbg_user, vha, 0x503e, |
9ba56b95 | 1600 | "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type); |
9a069e19 GM |
1601 | return; |
1602 | } | |
1603 | ||
1604 | comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status); | |
845bbb09 BVA |
1605 | fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_1); |
1606 | fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_2); | |
9a069e19 | 1607 | |
edd05de1 DG |
1608 | if (iocb_type == ELS_IOCB_TYPE) { |
1609 | els = &sp->u.iocb_cmd; | |
1610 | els->u.els_plogi.fw_status[0] = fw_status[0]; | |
1611 | els->u.els_plogi.fw_status[1] = fw_status[1]; | |
1612 | els->u.els_plogi.fw_status[2] = fw_status[2]; | |
1613 | els->u.els_plogi.comp_status = fw_status[0]; | |
1614 | if (comp_status == CS_COMPLETE) { | |
1615 | res = DID_OK << 16; | |
1616 | } else { | |
1617 | if (comp_status == CS_DATA_UNDERRUN) { | |
1618 | res = DID_OK << 16; | |
1619 | els->u.els_plogi.len = | |
1620 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1621 | pkt)->total_byte_count); | |
1622 | } else { | |
1623 | els->u.els_plogi.len = 0; | |
1624 | res = DID_ERROR << 16; | |
1625 | } | |
1626 | } | |
a1f9ab48 | 1627 | ql_dbg(ql_dbg_user, vha, 0x503f, |
edd05de1 DG |
1628 | "ELS IOCB Done -%s error hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n", |
1629 | type, sp->handle, comp_status, fw_status[1], fw_status[2], | |
1630 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1631 | pkt)->total_byte_count)); | |
1632 | goto els_ct_done; | |
1633 | } | |
1634 | ||
9a069e19 GM |
1635 | /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT |
1636 | * fc payload to the caller | |
1637 | */ | |
a1730595 DG |
1638 | bsg_job = sp->u.bsg_job; |
1639 | bsg_reply = bsg_job->reply; | |
01e0e15c | 1640 | bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; |
9a069e19 GM |
1641 | bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status); |
1642 | ||
1643 | if (comp_status != CS_COMPLETE) { | |
1644 | if (comp_status == CS_DATA_UNDERRUN) { | |
9ba56b95 | 1645 | res = DID_OK << 16; |
01e0e15c | 1646 | bsg_reply->reply_payload_rcv_len = |
9ba56b95 | 1647 | le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count); |
9a069e19 | 1648 | |
37fed3ee | 1649 | ql_dbg(ql_dbg_user, vha, 0x503f, |
cfb0919c | 1650 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1651 | "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n", |
cfb0919c | 1652 | type, sp->handle, comp_status, fw_status[1], fw_status[2], |
7c3df132 SK |
1653 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1654 | pkt)->total_byte_count)); | |
05231a3b | 1655 | } else { |
37fed3ee | 1656 | ql_dbg(ql_dbg_user, vha, 0x5040, |
cfb0919c | 1657 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1658 | "error subcode 1=0x%x error subcode 2=0x%x.\n", |
cfb0919c | 1659 | type, sp->handle, comp_status, |
7c3df132 SK |
1660 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1661 | pkt)->error_subcode_1), | |
1662 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1663 | pkt)->error_subcode_2)); | |
9ba56b95 | 1664 | res = DID_ERROR << 16; |
01e0e15c | 1665 | bsg_reply->reply_payload_rcv_len = 0; |
9a069e19 | 1666 | } |
05231a3b CH |
1667 | memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply), |
1668 | fw_status, sizeof(fw_status)); | |
37fed3ee | 1669 | ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056, |
f8f97b0c | 1670 | pkt, sizeof(*pkt)); |
9a069e19 GM |
1671 | } |
1672 | else { | |
9ba56b95 | 1673 | res = DID_OK << 16; |
01e0e15c | 1674 | bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len; |
9a069e19 GM |
1675 | bsg_job->reply_len = 0; |
1676 | } | |
edd05de1 | 1677 | els_ct_done: |
9a069e19 | 1678 | |
25ff6af1 | 1679 | sp->done(sp, res); |
9a069e19 GM |
1680 | } |
1681 | ||
ac280b67 AV |
1682 | static void |
1683 | qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1684 | struct logio_entry_24xx *logio) | |
1685 | { | |
1686 | const char func[] = "LOGIO-IOCB"; | |
1687 | const char *type; | |
ac280b67 AV |
1688 | fc_port_t *fcport; |
1689 | srb_t *sp; | |
4916392b | 1690 | struct srb_iocb *lio; |
99b0bec7 | 1691 | uint16_t *data; |
ac280b67 AV |
1692 | uint32_t iop[2]; |
1693 | ||
1694 | sp = qla2x00_get_sp_from_handle(vha, func, req, logio); | |
1695 | if (!sp) | |
1696 | return; | |
1697 | ||
9ba56b95 GM |
1698 | lio = &sp->u.iocb_cmd; |
1699 | type = sp->name; | |
ac280b67 | 1700 | fcport = sp->fcport; |
4916392b | 1701 | data = lio->u.logio.data; |
ac280b67 | 1702 | |
5ff1d584 | 1703 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1704 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1705 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1706 | if (logio->entry_status) { |
5e19ed90 | 1707 | ql_log(ql_log_warn, fcport->vha, 0x5034, |
5b33469a | 1708 | "Async-%s error entry - %8phC hdl=%x" |
d3fa9e7d | 1709 | "portid=%02x%02x%02x entry-status=%x.\n", |
5b33469a | 1710 | type, fcport->port_name, sp->handle, fcport->d_id.b.domain, |
cfb0919c CD |
1711 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
1712 | logio->entry_status); | |
1713 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d, | |
f8f97b0c | 1714 | logio, sizeof(*logio)); |
ac280b67 | 1715 | |
99b0bec7 | 1716 | goto logio_done; |
ac280b67 AV |
1717 | } |
1718 | ||
1719 | if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) { | |
5e19ed90 | 1720 | ql_dbg(ql_dbg_async, fcport->vha, 0x5036, |
5b33469a QT |
1721 | "Async-%s complete - %8phC hdl=%x portid=%02x%02x%02x " |
1722 | "iop0=%x.\n", type, fcport->port_name, sp->handle, | |
1723 | fcport->d_id.b.domain, | |
cfb0919c | 1724 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
7c3df132 | 1725 | le32_to_cpu(logio->io_parameter[0])); |
ac280b67 | 1726 | |
ead03855 | 1727 | vha->hw->exch_starvation = 0; |
ac280b67 | 1728 | data[0] = MBS_COMMAND_COMPLETE; |
03aaa89f DT |
1729 | |
1730 | if (sp->type == SRB_PRLI_CMD) { | |
1731 | lio->u.logio.iop[0] = | |
1732 | le32_to_cpu(logio->io_parameter[0]); | |
1733 | lio->u.logio.iop[1] = | |
1734 | le32_to_cpu(logio->io_parameter[1]); | |
1735 | goto logio_done; | |
1736 | } | |
1737 | ||
9ba56b95 | 1738 | if (sp->type != SRB_LOGIN_CMD) |
99b0bec7 | 1739 | goto logio_done; |
ac280b67 AV |
1740 | |
1741 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1742 | if (iop[0] & BIT_4) { | |
1743 | fcport->port_type = FCT_TARGET; | |
1744 | if (iop[0] & BIT_8) | |
8474f3a0 | 1745 | fcport->flags |= FCF_FCP2_DEVICE; |
b0cd579c | 1746 | } else if (iop[0] & BIT_5) |
ac280b67 | 1747 | fcport->port_type = FCT_INITIATOR; |
b0cd579c | 1748 | |
2d70c103 NB |
1749 | if (iop[0] & BIT_7) |
1750 | fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
1751 | ||
ac280b67 AV |
1752 | if (logio->io_parameter[7] || logio->io_parameter[8]) |
1753 | fcport->supported_classes |= FC_COS_CLASS2; | |
1754 | if (logio->io_parameter[9] || logio->io_parameter[10]) | |
1755 | fcport->supported_classes |= FC_COS_CLASS3; | |
1756 | ||
99b0bec7 | 1757 | goto logio_done; |
ac280b67 AV |
1758 | } |
1759 | ||
1760 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1761 | iop[1] = le32_to_cpu(logio->io_parameter[1]); | |
726b8548 QT |
1762 | lio->u.logio.iop[0] = iop[0]; |
1763 | lio->u.logio.iop[1] = iop[1]; | |
ac280b67 AV |
1764 | switch (iop[0]) { |
1765 | case LSC_SCODE_PORTID_USED: | |
1766 | data[0] = MBS_PORT_ID_USED; | |
1767 | data[1] = LSW(iop[1]); | |
1768 | break; | |
1769 | case LSC_SCODE_NPORT_USED: | |
1770 | data[0] = MBS_LOOP_ID_USED; | |
1771 | break; | |
5b33469a QT |
1772 | case LSC_SCODE_CMD_FAILED: |
1773 | if (iop[1] == 0x0606) { | |
1774 | /* | |
1775 | * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI, | |
1776 | * Target side acked. | |
1777 | */ | |
1778 | data[0] = MBS_COMMAND_COMPLETE; | |
1779 | goto logio_done; | |
1780 | } | |
1781 | data[0] = MBS_COMMAND_ERROR; | |
1782 | break; | |
ead03855 QT |
1783 | case LSC_SCODE_NOXCB: |
1784 | vha->hw->exch_starvation++; | |
1785 | if (vha->hw->exch_starvation > 5) { | |
83548fe2 | 1786 | ql_log(ql_log_warn, vha, 0xd046, |
ead03855 QT |
1787 | "Exchange starvation. Resetting RISC\n"); |
1788 | ||
1789 | vha->hw->exch_starvation = 0; | |
1790 | ||
1791 | if (IS_P3P_TYPE(vha->hw)) | |
1792 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); | |
1793 | else | |
1794 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1795 | qla2xxx_wake_dpc(vha); | |
1796 | } | |
81881861 | 1797 | /* fall through */ |
ac280b67 AV |
1798 | default: |
1799 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1800 | break; |
1801 | } | |
1802 | ||
5e19ed90 | 1803 | ql_dbg(ql_dbg_async, fcport->vha, 0x5037, |
5b33469a QT |
1804 | "Async-%s failed - %8phC hdl=%x portid=%02x%02x%02x comp=%x " |
1805 | "iop0=%x iop1=%x.\n", type, fcport->port_name, | |
1806 | sp->handle, fcport->d_id.b.domain, | |
d3fa9e7d | 1807 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
ac280b67 AV |
1808 | le16_to_cpu(logio->comp_status), |
1809 | le32_to_cpu(logio->io_parameter[0]), | |
7c3df132 | 1810 | le32_to_cpu(logio->io_parameter[1])); |
ac280b67 | 1811 | |
99b0bec7 | 1812 | logio_done: |
25ff6af1 | 1813 | sp->done(sp, 0); |
ac280b67 AV |
1814 | } |
1815 | ||
3822263e | 1816 | static void |
faef62d1 | 1817 | qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk) |
3822263e MI |
1818 | { |
1819 | const char func[] = "TMF-IOCB"; | |
1820 | const char *type; | |
1821 | fc_port_t *fcport; | |
1822 | srb_t *sp; | |
1823 | struct srb_iocb *iocb; | |
3822263e | 1824 | struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; |
3822263e MI |
1825 | |
1826 | sp = qla2x00_get_sp_from_handle(vha, func, req, tsk); | |
1827 | if (!sp) | |
1828 | return; | |
1829 | ||
9ba56b95 GM |
1830 | iocb = &sp->u.iocb_cmd; |
1831 | type = sp->name; | |
3822263e | 1832 | fcport = sp->fcport; |
faef62d1 | 1833 | iocb->u.tmf.data = QLA_SUCCESS; |
3822263e MI |
1834 | |
1835 | if (sts->entry_status) { | |
5e19ed90 | 1836 | ql_log(ql_log_warn, fcport->vha, 0x5038, |
cfb0919c CD |
1837 | "Async-%s error - hdl=%x entry-status(%x).\n", |
1838 | type, sp->handle, sts->entry_status); | |
faef62d1 | 1839 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
ad950360 | 1840 | } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) { |
5e19ed90 | 1841 | ql_log(ql_log_warn, fcport->vha, 0x5039, |
cfb0919c CD |
1842 | "Async-%s error - hdl=%x completion status(%x).\n", |
1843 | type, sp->handle, sts->comp_status); | |
faef62d1 AB |
1844 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
1845 | } else if ((le16_to_cpu(sts->scsi_status) & | |
3822263e | 1846 | SS_RESPONSE_INFO_LEN_VALID)) { |
faef62d1 AB |
1847 | if (le32_to_cpu(sts->rsp_data_len) < 4) { |
1848 | ql_log(ql_log_warn, fcport->vha, 0x503b, | |
1849 | "Async-%s error - hdl=%x not enough response(%d).\n", | |
1850 | type, sp->handle, sts->rsp_data_len); | |
1851 | } else if (sts->data[3]) { | |
1852 | ql_log(ql_log_warn, fcport->vha, 0x503c, | |
1853 | "Async-%s error - hdl=%x response(%x).\n", | |
1854 | type, sp->handle, sts->data[3]); | |
8d2b21db | 1855 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
faef62d1 | 1856 | } |
3822263e MI |
1857 | } |
1858 | ||
faef62d1 | 1859 | if (iocb->u.tmf.data != QLA_SUCCESS) |
f8f97b0c JC |
1860 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055, |
1861 | sts, sizeof(*sts)); | |
3822263e | 1862 | |
25ff6af1 | 1863 | sp->done(sp, 0); |
3822263e MI |
1864 | } |
1865 | ||
60dd6e8e DT |
1866 | static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, |
1867 | void *tsk, srb_t *sp) | |
7401bc18 | 1868 | { |
7401bc18 | 1869 | fc_port_t *fcport; |
7401bc18 DG |
1870 | struct srb_iocb *iocb; |
1871 | struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; | |
1872 | uint16_t state_flags; | |
1873 | struct nvmefc_fcp_req *fd; | |
4072e1dc DT |
1874 | uint16_t ret = QLA_SUCCESS; |
1875 | uint16_t comp_status = le16_to_cpu(sts->comp_status); | |
7401bc18 DG |
1876 | |
1877 | iocb = &sp->u.iocb_cmd; | |
1878 | fcport = sp->fcport; | |
4072e1dc | 1879 | iocb->u.nvme.comp_status = comp_status; |
7401bc18 DG |
1880 | state_flags = le16_to_cpu(sts->state_flags); |
1881 | fd = iocb->u.nvme.desc; | |
7401bc18 | 1882 | |
60dd6e8e | 1883 | if (unlikely(iocb->u.nvme.aen_op)) |
deeae7a6 | 1884 | atomic_dec(&sp->vha->hw->nvme_active_aen_cnt); |
7401bc18 DG |
1885 | |
1886 | /* | |
1887 | * State flags: Bit 6 and 0. | |
1888 | * If 0 is set, we don't care about 6. | |
1889 | * both cases resp was dma'd to host buffer | |
1890 | * if both are 0, that is good path case. | |
1891 | * if six is set and 0 is clear, we need to | |
1892 | * copy resp data from status iocb to resp buffer. | |
1893 | */ | |
1894 | if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) { | |
1895 | iocb->u.nvme.rsp_pyld_len = 0; | |
1896 | } else if ((state_flags & SF_FCP_RSP_DMA)) { | |
1897 | iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len); | |
1898 | } else if (state_flags & SF_NVME_ERSP) { | |
1899 | uint32_t *inbuf, *outbuf; | |
1900 | uint16_t iter; | |
1901 | ||
1902 | inbuf = (uint32_t *)&sts->nvme_ersp_data; | |
1903 | outbuf = (uint32_t *)fd->rspaddr; | |
1904 | iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len); | |
1905 | iter = iocb->u.nvme.rsp_pyld_len >> 2; | |
1906 | for (; iter; iter--) | |
1907 | *outbuf++ = swab32(*inbuf++); | |
1908 | } else { /* unhandled case */ | |
1909 | ql_log(ql_log_warn, fcport->vha, 0x503a, | |
1910 | "NVME-%s error. Unhandled state_flags of %x\n", | |
1911 | sp->name, state_flags); | |
1912 | } | |
1913 | ||
1914 | fd->transferred_length = fd->payload_length - | |
1915 | le32_to_cpu(sts->residual_len); | |
1916 | ||
4072e1dc DT |
1917 | if (unlikely(comp_status != CS_COMPLETE)) |
1918 | ql_log(ql_log_warn, fcport->vha, 0x5060, | |
1919 | "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n", | |
1920 | sp->name, sp->handle, comp_status, | |
1921 | fd->transferred_length, le32_to_cpu(sts->residual_len), | |
1922 | sts->ox_id); | |
1923 | ||
1924 | /* | |
1925 | * If transport error then Failure (HBA rejects request) | |
1926 | * otherwise transport will handle. | |
1927 | */ | |
1928 | switch (comp_status) { | |
60dd6e8e | 1929 | case CS_COMPLETE: |
60dd6e8e | 1930 | break; |
4072e1dc | 1931 | |
60dd6e8e DT |
1932 | case CS_RESET: |
1933 | case CS_PORT_UNAVAILABLE: | |
1934 | case CS_PORT_LOGGED_OUT: | |
4072e1dc DT |
1935 | fcport->nvme_flag |= NVME_FLAG_RESETTING; |
1936 | /* fall through */ | |
1937 | case CS_ABORTED: | |
60dd6e8e | 1938 | case CS_PORT_BUSY: |
60dd6e8e DT |
1939 | fd->transferred_length = 0; |
1940 | iocb->u.nvme.rsp_pyld_len = 0; | |
1941 | ret = QLA_ABORTED; | |
1942 | break; | |
4072e1dc DT |
1943 | case CS_DATA_UNDERRUN: |
1944 | break; | |
60dd6e8e | 1945 | default: |
7401bc18 | 1946 | ret = QLA_FUNCTION_FAILED; |
60dd6e8e | 1947 | break; |
7401bc18 DG |
1948 | } |
1949 | sp->done(sp, ret); | |
1950 | } | |
1951 | ||
2853192e QT |
1952 | static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req, |
1953 | struct vp_ctrl_entry_24xx *vce) | |
1954 | { | |
1955 | const char func[] = "CTRLVP-IOCB"; | |
1956 | srb_t *sp; | |
1957 | int rval = QLA_SUCCESS; | |
1958 | ||
1959 | sp = qla2x00_get_sp_from_handle(vha, func, req, vce); | |
1960 | if (!sp) | |
1961 | return; | |
1962 | ||
1963 | if (vce->entry_status != 0) { | |
1964 | ql_dbg(ql_dbg_vport, vha, 0x10c4, | |
1965 | "%s: Failed to complete IOCB -- error status (%x)\n", | |
1966 | sp->name, vce->entry_status); | |
1967 | rval = QLA_FUNCTION_FAILED; | |
1968 | } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { | |
1969 | ql_dbg(ql_dbg_vport, vha, 0x10c5, | |
1970 | "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n", | |
1971 | sp->name, le16_to_cpu(vce->comp_status), | |
1972 | le16_to_cpu(vce->vp_idx_failed)); | |
1973 | rval = QLA_FUNCTION_FAILED; | |
1974 | } else { | |
1975 | ql_dbg(ql_dbg_vport, vha, 0x10c6, | |
1976 | "Done %s.\n", __func__); | |
1977 | } | |
1978 | ||
1979 | sp->rc = rval; | |
1980 | sp->done(sp, rval); | |
1981 | } | |
1982 | ||
7b006b97 BVA |
1983 | /* Process a single response queue entry. */ |
1984 | static void qla2x00_process_response_entry(struct scsi_qla_host *vha, | |
1985 | struct rsp_que *rsp, | |
1986 | sts_entry_t *pkt) | |
1987 | { | |
1988 | sts21_entry_t *sts21_entry; | |
1989 | sts22_entry_t *sts22_entry; | |
1990 | uint16_t handle_cnt; | |
1991 | uint16_t cnt; | |
1992 | ||
1993 | switch (pkt->entry_type) { | |
1994 | case STATUS_TYPE: | |
1995 | qla2x00_status_entry(vha, rsp, pkt); | |
1996 | break; | |
1997 | case STATUS_TYPE_21: | |
1998 | sts21_entry = (sts21_entry_t *)pkt; | |
1999 | handle_cnt = sts21_entry->handle_count; | |
2000 | for (cnt = 0; cnt < handle_cnt; cnt++) | |
2001 | qla2x00_process_completed_request(vha, rsp->req, | |
2002 | sts21_entry->handle[cnt]); | |
2003 | break; | |
2004 | case STATUS_TYPE_22: | |
2005 | sts22_entry = (sts22_entry_t *)pkt; | |
2006 | handle_cnt = sts22_entry->handle_count; | |
2007 | for (cnt = 0; cnt < handle_cnt; cnt++) | |
2008 | qla2x00_process_completed_request(vha, rsp->req, | |
2009 | sts22_entry->handle[cnt]); | |
2010 | break; | |
2011 | case STATUS_CONT_TYPE: | |
2012 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); | |
2013 | break; | |
2014 | case MBX_IOCB_TYPE: | |
2015 | qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt); | |
2016 | break; | |
2017 | case CT_IOCB_TYPE: | |
2018 | qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); | |
2019 | break; | |
2020 | default: | |
2021 | /* Type Not Supported. */ | |
2022 | ql_log(ql_log_warn, vha, 0x504a, | |
2023 | "Received unknown response pkt type %x entry status=%x.\n", | |
2024 | pkt->entry_type, pkt->entry_status); | |
2025 | break; | |
2026 | } | |
2027 | } | |
2028 | ||
1da177e4 LT |
2029 | /** |
2030 | * qla2x00_process_response_queue() - Process response queue entries. | |
2db6228d | 2031 | * @rsp: response queue |
1da177e4 LT |
2032 | */ |
2033 | void | |
73208dfd | 2034 | qla2x00_process_response_queue(struct rsp_que *rsp) |
1da177e4 | 2035 | { |
73208dfd AC |
2036 | struct scsi_qla_host *vha; |
2037 | struct qla_hw_data *ha = rsp->hw; | |
3d71644c | 2038 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2039 | sts_entry_t *pkt; |
73208dfd | 2040 | |
2afa19a9 | 2041 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 2042 | |
e315cd28 | 2043 | if (!vha->flags.online) |
1da177e4 LT |
2044 | return; |
2045 | ||
e315cd28 AC |
2046 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
2047 | pkt = (sts_entry_t *)rsp->ring_ptr; | |
1da177e4 | 2048 | |
e315cd28 AC |
2049 | rsp->ring_index++; |
2050 | if (rsp->ring_index == rsp->length) { | |
2051 | rsp->ring_index = 0; | |
2052 | rsp->ring_ptr = rsp->ring; | |
1da177e4 | 2053 | } else { |
e315cd28 | 2054 | rsp->ring_ptr++; |
1da177e4 LT |
2055 | } |
2056 | ||
2057 | if (pkt->entry_status != 0) { | |
73208dfd | 2058 | qla2x00_error_entry(vha, rsp, pkt); |
1da177e4 LT |
2059 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
2060 | wmb(); | |
2061 | continue; | |
2062 | } | |
2063 | ||
7b006b97 | 2064 | qla2x00_process_response_entry(vha, rsp, pkt); |
1da177e4 LT |
2065 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
2066 | wmb(); | |
2067 | } | |
2068 | ||
2069 | /* Adjust ring index */ | |
e315cd28 | 2070 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); |
1da177e4 LT |
2071 | } |
2072 | ||
4733fcb1 | 2073 | static inline void |
5544213b | 2074 | qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, |
9ba56b95 | 2075 | uint32_t sense_len, struct rsp_que *rsp, int res) |
4733fcb1 | 2076 | { |
25ff6af1 | 2077 | struct scsi_qla_host *vha = sp->vha; |
9ba56b95 GM |
2078 | struct scsi_cmnd *cp = GET_CMD_SP(sp); |
2079 | uint32_t track_sense_len; | |
4733fcb1 AV |
2080 | |
2081 | if (sense_len >= SCSI_SENSE_BUFFERSIZE) | |
2082 | sense_len = SCSI_SENSE_BUFFERSIZE; | |
2083 | ||
9ba56b95 GM |
2084 | SET_CMD_SENSE_LEN(sp, sense_len); |
2085 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer); | |
2086 | track_sense_len = sense_len; | |
2087 | ||
2088 | if (sense_len > par_sense_len) | |
5544213b | 2089 | sense_len = par_sense_len; |
4733fcb1 AV |
2090 | |
2091 | memcpy(cp->sense_buffer, sense_data, sense_len); | |
2092 | ||
9ba56b95 GM |
2093 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); |
2094 | track_sense_len -= sense_len; | |
2095 | SET_CMD_SENSE_LEN(sp, track_sense_len); | |
2096 | ||
2097 | if (track_sense_len != 0) { | |
2afa19a9 | 2098 | rsp->status_srb = sp; |
9ba56b95 GM |
2099 | cp->result = res; |
2100 | } | |
4733fcb1 | 2101 | |
cfb0919c CD |
2102 | if (sense_len) { |
2103 | ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c, | |
9cb78c16 | 2104 | "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n", |
25ff6af1 | 2105 | sp->vha->host_no, cp->device->id, cp->device->lun, |
cfb0919c | 2106 | cp); |
7c3df132 SK |
2107 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b, |
2108 | cp->sense_buffer, sense_len); | |
cfb0919c | 2109 | } |
4733fcb1 AV |
2110 | } |
2111 | ||
bad75002 AE |
2112 | struct scsi_dif_tuple { |
2113 | __be16 guard; /* Checksum */ | |
d6a03581 | 2114 | __be16 app_tag; /* APPL identifier */ |
bad75002 AE |
2115 | __be32 ref_tag; /* Target LBA or indirect LBA */ |
2116 | }; | |
2117 | ||
2118 | /* | |
2119 | * Checks the guard or meta-data for the type of error | |
2120 | * detected by the HBA. In case of errors, we set the | |
2121 | * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST | |
2122 | * to indicate to the kernel that the HBA detected error. | |
2123 | */ | |
8cb2049c | 2124 | static inline int |
bad75002 AE |
2125 | qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) |
2126 | { | |
25ff6af1 | 2127 | struct scsi_qla_host *vha = sp->vha; |
9ba56b95 | 2128 | struct scsi_cmnd *cmd = GET_CMD_SP(sp); |
8cb2049c AE |
2129 | uint8_t *ap = &sts24->data[12]; |
2130 | uint8_t *ep = &sts24->data[20]; | |
bad75002 AE |
2131 | uint32_t e_ref_tag, a_ref_tag; |
2132 | uint16_t e_app_tag, a_app_tag; | |
2133 | uint16_t e_guard, a_guard; | |
2134 | ||
8cb2049c AE |
2135 | /* |
2136 | * swab32 of the "data" field in the beginning of qla2x00_status_entry() | |
2137 | * would make guard field appear at offset 2 | |
2138 | */ | |
2139 | a_guard = le16_to_cpu(*(uint16_t *)(ap + 2)); | |
2140 | a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0)); | |
2141 | a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4)); | |
2142 | e_guard = le16_to_cpu(*(uint16_t *)(ep + 2)); | |
2143 | e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0)); | |
2144 | e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4)); | |
bad75002 | 2145 | |
7c3df132 SK |
2146 | ql_dbg(ql_dbg_io, vha, 0x3023, |
2147 | "iocb(s) %p Returned STATUS.\n", sts24); | |
bad75002 | 2148 | |
7c3df132 SK |
2149 | ql_dbg(ql_dbg_io, vha, 0x3024, |
2150 | "DIF ERROR in cmd 0x%x lba 0x%llx act ref" | |
bad75002 | 2151 | " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app" |
7c3df132 | 2152 | " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n", |
bad75002 | 2153 | cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, |
7c3df132 | 2154 | a_app_tag, e_app_tag, a_guard, e_guard); |
bad75002 | 2155 | |
8cb2049c AE |
2156 | /* |
2157 | * Ignore sector if: | |
2158 | * For type 3: ref & app tag is all 'f's | |
2159 | * For type 0,1,2: app tag is all 'f's | |
2160 | */ | |
128b6f9f | 2161 | if ((a_app_tag == T10_PI_APP_ESCAPE) && |
8cb2049c | 2162 | ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) || |
128b6f9f | 2163 | (a_ref_tag == T10_PI_REF_ESCAPE))) { |
8cb2049c AE |
2164 | uint32_t blocks_done, resid; |
2165 | sector_t lba_s = scsi_get_lba(cmd); | |
2166 | ||
2167 | /* 2TB boundary case covered automatically with this */ | |
2168 | blocks_done = e_ref_tag - (uint32_t)lba_s + 1; | |
2169 | ||
2170 | resid = scsi_bufflen(cmd) - (blocks_done * | |
2171 | cmd->device->sector_size); | |
2172 | ||
2173 | scsi_set_resid(cmd, resid); | |
2174 | cmd->result = DID_OK << 16; | |
2175 | ||
2176 | /* Update protection tag */ | |
2177 | if (scsi_prot_sg_count(cmd)) { | |
2178 | uint32_t i, j = 0, k = 0, num_ent; | |
2179 | struct scatterlist *sg; | |
27c0e83b | 2180 | struct t10_pi_tuple *spt; |
8cb2049c AE |
2181 | |
2182 | /* Patch the corresponding protection tags */ | |
2183 | scsi_for_each_prot_sg(cmd, sg, | |
2184 | scsi_prot_sg_count(cmd), i) { | |
2185 | num_ent = sg_dma_len(sg) / 8; | |
2186 | if (k + num_ent < blocks_done) { | |
2187 | k += num_ent; | |
2188 | continue; | |
2189 | } | |
2190 | j = blocks_done - k - 1; | |
2191 | k = blocks_done; | |
2192 | break; | |
2193 | } | |
2194 | ||
2195 | if (k != blocks_done) { | |
cfb0919c | 2196 | ql_log(ql_log_warn, vha, 0x302f, |
8ec9c7fb RD |
2197 | "unexpected tag values tag:lba=%x:%llx)\n", |
2198 | e_ref_tag, (unsigned long long)lba_s); | |
8cb2049c AE |
2199 | return 1; |
2200 | } | |
2201 | ||
2202 | spt = page_address(sg_page(sg)) + sg->offset; | |
2203 | spt += j; | |
2204 | ||
128b6f9f | 2205 | spt->app_tag = T10_PI_APP_ESCAPE; |
8cb2049c | 2206 | if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3) |
128b6f9f | 2207 | spt->ref_tag = T10_PI_REF_ESCAPE; |
8cb2049c AE |
2208 | } |
2209 | ||
2210 | return 0; | |
2211 | } | |
2212 | ||
bad75002 AE |
2213 | /* check guard */ |
2214 | if (e_guard != a_guard) { | |
2215 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, | |
2216 | 0x10, 0x1); | |
2217 | set_driver_byte(cmd, DRIVER_SENSE); | |
2218 | set_host_byte(cmd, DID_ABORT); | |
584d7aad | 2219 | cmd->result |= SAM_STAT_CHECK_CONDITION; |
8cb2049c | 2220 | return 1; |
bad75002 AE |
2221 | } |
2222 | ||
e02587d7 AE |
2223 | /* check ref tag */ |
2224 | if (e_ref_tag != a_ref_tag) { | |
bad75002 | 2225 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 2226 | 0x10, 0x3); |
bad75002 AE |
2227 | set_driver_byte(cmd, DRIVER_SENSE); |
2228 | set_host_byte(cmd, DID_ABORT); | |
584d7aad | 2229 | cmd->result |= SAM_STAT_CHECK_CONDITION; |
8cb2049c | 2230 | return 1; |
bad75002 AE |
2231 | } |
2232 | ||
e02587d7 AE |
2233 | /* check appl tag */ |
2234 | if (e_app_tag != a_app_tag) { | |
bad75002 | 2235 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 2236 | 0x10, 0x2); |
bad75002 AE |
2237 | set_driver_byte(cmd, DRIVER_SENSE); |
2238 | set_host_byte(cmd, DID_ABORT); | |
584d7aad | 2239 | cmd->result |= SAM_STAT_CHECK_CONDITION; |
8cb2049c | 2240 | return 1; |
bad75002 | 2241 | } |
e02587d7 | 2242 | |
8cb2049c | 2243 | return 1; |
bad75002 AE |
2244 | } |
2245 | ||
a9b6f722 SK |
2246 | static void |
2247 | qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt, | |
2248 | struct req_que *req, uint32_t index) | |
2249 | { | |
2250 | struct qla_hw_data *ha = vha->hw; | |
2251 | srb_t *sp; | |
2252 | uint16_t comp_status; | |
2253 | uint16_t scsi_status; | |
2254 | uint16_t thread_id; | |
2255 | uint32_t rval = EXT_STATUS_OK; | |
75cc8cfc | 2256 | struct bsg_job *bsg_job = NULL; |
01e0e15c JT |
2257 | struct fc_bsg_request *bsg_request; |
2258 | struct fc_bsg_reply *bsg_reply; | |
1a20719e BVA |
2259 | sts_entry_t *sts = pkt; |
2260 | struct sts_entry_24xx *sts24 = pkt; | |
a9b6f722 SK |
2261 | |
2262 | /* Validate handle. */ | |
8d93f550 | 2263 | if (index >= req->num_outstanding_cmds) { |
a9b6f722 SK |
2264 | ql_log(ql_log_warn, vha, 0x70af, |
2265 | "Invalid SCSI completion handle 0x%x.\n", index); | |
2266 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2267 | return; | |
2268 | } | |
2269 | ||
2270 | sp = req->outstanding_cmds[index]; | |
01e0e15c | 2271 | if (!sp) { |
a9b6f722 SK |
2272 | ql_log(ql_log_warn, vha, 0x70b0, |
2273 | "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n", | |
2274 | req->id, index); | |
2275 | ||
2276 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2277 | return; | |
2278 | } | |
2279 | ||
01e0e15c JT |
2280 | /* Free outstanding command slot. */ |
2281 | req->outstanding_cmds[index] = NULL; | |
2282 | bsg_job = sp->u.bsg_job; | |
2283 | bsg_request = bsg_job->request; | |
2284 | bsg_reply = bsg_job->reply; | |
2285 | ||
a9b6f722 SK |
2286 | if (IS_FWI2_CAPABLE(ha)) { |
2287 | comp_status = le16_to_cpu(sts24->comp_status); | |
2288 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
2289 | } else { | |
2290 | comp_status = le16_to_cpu(sts->comp_status); | |
2291 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
2292 | } | |
2293 | ||
01e0e15c | 2294 | thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1]; |
a9b6f722 SK |
2295 | switch (comp_status) { |
2296 | case CS_COMPLETE: | |
2297 | if (scsi_status == 0) { | |
01e0e15c | 2298 | bsg_reply->reply_payload_rcv_len = |
a9b6f722 | 2299 | bsg_job->reply_payload.payload_len; |
fabbb8df | 2300 | vha->qla_stats.input_bytes += |
01e0e15c | 2301 | bsg_reply->reply_payload_rcv_len; |
fabbb8df | 2302 | vha->qla_stats.input_requests++; |
a9b6f722 SK |
2303 | rval = EXT_STATUS_OK; |
2304 | } | |
2305 | goto done; | |
2306 | ||
2307 | case CS_DATA_OVERRUN: | |
2308 | ql_dbg(ql_dbg_user, vha, 0x70b1, | |
5a68a1c2 | 2309 | "Command completed with data overrun thread_id=%d\n", |
a9b6f722 SK |
2310 | thread_id); |
2311 | rval = EXT_STATUS_DATA_OVERRUN; | |
2312 | break; | |
2313 | ||
2314 | case CS_DATA_UNDERRUN: | |
2315 | ql_dbg(ql_dbg_user, vha, 0x70b2, | |
5a68a1c2 | 2316 | "Command completed with data underrun thread_id=%d\n", |
a9b6f722 SK |
2317 | thread_id); |
2318 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2319 | break; | |
2320 | case CS_BIDIR_RD_OVERRUN: | |
2321 | ql_dbg(ql_dbg_user, vha, 0x70b3, | |
2322 | "Command completed with read data overrun thread_id=%d\n", | |
2323 | thread_id); | |
2324 | rval = EXT_STATUS_DATA_OVERRUN; | |
2325 | break; | |
2326 | ||
2327 | case CS_BIDIR_RD_WR_OVERRUN: | |
2328 | ql_dbg(ql_dbg_user, vha, 0x70b4, | |
2329 | "Command completed with read and write data overrun " | |
2330 | "thread_id=%d\n", thread_id); | |
2331 | rval = EXT_STATUS_DATA_OVERRUN; | |
2332 | break; | |
2333 | ||
2334 | case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN: | |
2335 | ql_dbg(ql_dbg_user, vha, 0x70b5, | |
2336 | "Command completed with read data over and write data " | |
2337 | "underrun thread_id=%d\n", thread_id); | |
2338 | rval = EXT_STATUS_DATA_OVERRUN; | |
2339 | break; | |
2340 | ||
2341 | case CS_BIDIR_RD_UNDERRUN: | |
2342 | ql_dbg(ql_dbg_user, vha, 0x70b6, | |
5a68a1c2 | 2343 | "Command completed with read data underrun " |
a9b6f722 SK |
2344 | "thread_id=%d\n", thread_id); |
2345 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2346 | break; | |
2347 | ||
2348 | case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN: | |
2349 | ql_dbg(ql_dbg_user, vha, 0x70b7, | |
2350 | "Command completed with read data under and write data " | |
2351 | "overrun thread_id=%d\n", thread_id); | |
2352 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2353 | break; | |
2354 | ||
2355 | case CS_BIDIR_RD_WR_UNDERRUN: | |
2356 | ql_dbg(ql_dbg_user, vha, 0x70b8, | |
2357 | "Command completed with read and write data underrun " | |
2358 | "thread_id=%d\n", thread_id); | |
2359 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2360 | break; | |
2361 | ||
2362 | case CS_BIDIR_DMA: | |
2363 | ql_dbg(ql_dbg_user, vha, 0x70b9, | |
2364 | "Command completed with data DMA error thread_id=%d\n", | |
2365 | thread_id); | |
2366 | rval = EXT_STATUS_DMA_ERR; | |
2367 | break; | |
2368 | ||
2369 | case CS_TIMEOUT: | |
2370 | ql_dbg(ql_dbg_user, vha, 0x70ba, | |
2371 | "Command completed with timeout thread_id=%d\n", | |
2372 | thread_id); | |
2373 | rval = EXT_STATUS_TIMEOUT; | |
2374 | break; | |
2375 | default: | |
2376 | ql_dbg(ql_dbg_user, vha, 0x70bb, | |
2377 | "Command completed with completion status=0x%x " | |
2378 | "thread_id=%d\n", comp_status, thread_id); | |
2379 | rval = EXT_STATUS_ERR; | |
2380 | break; | |
2381 | } | |
01e0e15c | 2382 | bsg_reply->reply_payload_rcv_len = 0; |
a9b6f722 SK |
2383 | |
2384 | done: | |
2385 | /* Return the vendor specific reply to API */ | |
01e0e15c | 2386 | bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval; |
a9b6f722 SK |
2387 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); |
2388 | /* Always return DID_OK, bsg will send the vendor specific response | |
2389 | * in this case only */ | |
f7d5182c | 2390 | sp->done(sp, DID_OK << 16); |
a9b6f722 SK |
2391 | |
2392 | } | |
2393 | ||
1da177e4 LT |
2394 | /** |
2395 | * qla2x00_status_entry() - Process a Status IOCB entry. | |
2db6228d BVA |
2396 | * @vha: SCSI driver HA context |
2397 | * @rsp: response queue | |
1da177e4 LT |
2398 | * @pkt: Entry pointer |
2399 | */ | |
2400 | static void | |
73208dfd | 2401 | qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) |
1da177e4 | 2402 | { |
1da177e4 | 2403 | srb_t *sp; |
1da177e4 LT |
2404 | fc_port_t *fcport; |
2405 | struct scsi_cmnd *cp; | |
1a20719e BVA |
2406 | sts_entry_t *sts = pkt; |
2407 | struct sts_entry_24xx *sts24 = pkt; | |
1da177e4 LT |
2408 | uint16_t comp_status; |
2409 | uint16_t scsi_status; | |
b7d2280c | 2410 | uint16_t ox_id; |
1da177e4 LT |
2411 | uint8_t lscsi_status; |
2412 | int32_t resid; | |
5544213b AV |
2413 | uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, |
2414 | fw_resid_len; | |
9a853f71 | 2415 | uint8_t *rsp_info, *sense_data; |
e315cd28 | 2416 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 AC |
2417 | uint32_t handle; |
2418 | uint16_t que; | |
2419 | struct req_que *req; | |
b7d2280c | 2420 | int logit = 1; |
9ba56b95 | 2421 | int res = 0; |
a9b6f722 | 2422 | uint16_t state_flags = 0; |
e05fe292 | 2423 | uint16_t retry_delay = 0; |
9a853f71 | 2424 | |
e428924c | 2425 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 AV |
2426 | comp_status = le16_to_cpu(sts24->comp_status); |
2427 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
a9b6f722 | 2428 | state_flags = le16_to_cpu(sts24->state_flags); |
9a853f71 AV |
2429 | } else { |
2430 | comp_status = le16_to_cpu(sts->comp_status); | |
2431 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
2432 | } | |
2afa19a9 AC |
2433 | handle = (uint32_t) LSW(sts->handle); |
2434 | que = MSW(sts->handle); | |
2435 | req = ha->req_q_map[que]; | |
a9083016 | 2436 | |
36008cf1 CD |
2437 | /* Check for invalid queue pointer */ |
2438 | if (req == NULL || | |
2439 | que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) { | |
2440 | ql_dbg(ql_dbg_io, vha, 0x3059, | |
2441 | "Invalid status handle (0x%x): Bad req pointer. req=%p, " | |
2442 | "que=%u.\n", sts->handle, req, que); | |
2443 | return; | |
2444 | } | |
2445 | ||
1da177e4 | 2446 | /* Validate handle. */ |
c7bc4cae | 2447 | if (handle < req->num_outstanding_cmds) { |
2afa19a9 | 2448 | sp = req->outstanding_cmds[handle]; |
c7bc4cae CD |
2449 | if (!sp) { |
2450 | ql_dbg(ql_dbg_io, vha, 0x3075, | |
2451 | "%s(%ld): Already returned command for status handle (0x%x).\n", | |
2452 | __func__, vha->host_no, sts->handle); | |
2453 | return; | |
2454 | } | |
2455 | } else { | |
cfb0919c | 2456 | ql_dbg(ql_dbg_io, vha, 0x3017, |
c7bc4cae CD |
2457 | "Invalid status handle, out of range (0x%x).\n", |
2458 | sts->handle); | |
1da177e4 | 2459 | |
acd3ce88 CD |
2460 | if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { |
2461 | if (IS_P3P_TYPE(ha)) | |
2462 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); | |
2463 | else | |
2464 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2465 | qla2xxx_wake_dpc(vha); | |
2466 | } | |
1da177e4 LT |
2467 | return; |
2468 | } | |
a9b6f722 | 2469 | |
c5419e26 QT |
2470 | if (sp->cmd_type != TYPE_SRB) { |
2471 | req->outstanding_cmds[handle] = NULL; | |
2472 | ql_dbg(ql_dbg_io, vha, 0x3015, | |
2473 | "Unknown sp->cmd_type %x %p).\n", | |
2474 | sp->cmd_type, sp); | |
2475 | return; | |
2476 | } | |
2477 | ||
7401bc18 DG |
2478 | /* NVME completion. */ |
2479 | if (sp->type == SRB_NVME_CMD) { | |
60dd6e8e DT |
2480 | req->outstanding_cmds[handle] = NULL; |
2481 | qla24xx_nvme_iocb_entry(vha, req, pkt, sp); | |
7401bc18 DG |
2482 | return; |
2483 | } | |
2484 | ||
a9b6f722 SK |
2485 | if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) { |
2486 | qla25xx_process_bidir_status_iocb(vha, pkt, req, handle); | |
2487 | return; | |
2488 | } | |
2489 | ||
faef62d1 AB |
2490 | /* Task Management completion. */ |
2491 | if (sp->type == SRB_TM_CMD) { | |
2492 | qla24xx_tm_iocb_entry(vha, req, pkt); | |
2493 | return; | |
2494 | } | |
2495 | ||
a9b6f722 SK |
2496 | /* Fast path completion. */ |
2497 | if (comp_status == CS_COMPLETE && scsi_status == 0) { | |
2498 | qla2x00_process_completed_request(vha, req, handle); | |
2499 | ||
2500 | return; | |
2501 | } | |
2502 | ||
2503 | req->outstanding_cmds[handle] = NULL; | |
9ba56b95 | 2504 | cp = GET_CMD_SP(sp); |
1da177e4 | 2505 | if (cp == NULL) { |
cfb0919c | 2506 | ql_dbg(ql_dbg_io, vha, 0x3018, |
7c3df132 SK |
2507 | "Command already returned (0x%x/%p).\n", |
2508 | sts->handle, sp); | |
1da177e4 LT |
2509 | |
2510 | return; | |
2511 | } | |
2512 | ||
8ae6d9c7 | 2513 | lscsi_status = scsi_status & STATUS_MASK; |
1da177e4 | 2514 | |
bdf79621 | 2515 | fcport = sp->fcport; |
1da177e4 | 2516 | |
b7d2280c | 2517 | ox_id = 0; |
5544213b AV |
2518 | sense_len = par_sense_len = rsp_info_len = resid_len = |
2519 | fw_resid_len = 0; | |
e428924c | 2520 | if (IS_FWI2_CAPABLE(ha)) { |
0f00a206 LC |
2521 | if (scsi_status & SS_SENSE_LEN_VALID) |
2522 | sense_len = le32_to_cpu(sts24->sense_len); | |
2523 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2524 | rsp_info_len = le32_to_cpu(sts24->rsp_data_len); | |
2525 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) | |
2526 | resid_len = le32_to_cpu(sts24->rsp_residual_count); | |
2527 | if (comp_status == CS_DATA_UNDERRUN) | |
2528 | fw_resid_len = le32_to_cpu(sts24->residual_len); | |
9a853f71 AV |
2529 | rsp_info = sts24->data; |
2530 | sense_data = sts24->data; | |
2531 | host_to_fcp_swap(sts24->data, sizeof(sts24->data)); | |
b7d2280c | 2532 | ox_id = le16_to_cpu(sts24->ox_id); |
5544213b | 2533 | par_sense_len = sizeof(sts24->data); |
e05fe292 | 2534 | /* Valid values of the retry delay timer are 0x1-0xffef */ |
3cedc879 AG |
2535 | if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) { |
2536 | retry_delay = sts24->retry_delay & 0x3fff; | |
2537 | ql_dbg(ql_dbg_io, sp->vha, 0x3033, | |
2538 | "%s: scope=%#x retry_delay=%#x\n", __func__, | |
2539 | sts24->retry_delay >> 14, retry_delay); | |
2540 | } | |
9a853f71 | 2541 | } else { |
0f00a206 LC |
2542 | if (scsi_status & SS_SENSE_LEN_VALID) |
2543 | sense_len = le16_to_cpu(sts->req_sense_length); | |
2544 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2545 | rsp_info_len = le16_to_cpu(sts->rsp_info_len); | |
9a853f71 AV |
2546 | resid_len = le32_to_cpu(sts->residual_length); |
2547 | rsp_info = sts->rsp_info; | |
2548 | sense_data = sts->req_sense_data; | |
5544213b | 2549 | par_sense_len = sizeof(sts->req_sense_data); |
9a853f71 AV |
2550 | } |
2551 | ||
1da177e4 LT |
2552 | /* Check for any FCP transport errors. */ |
2553 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) { | |
9a853f71 | 2554 | /* Sense data lies beyond any FCP RESPONSE data. */ |
5544213b | 2555 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 2556 | sense_data += rsp_info_len; |
5544213b AV |
2557 | par_sense_len -= rsp_info_len; |
2558 | } | |
9a853f71 | 2559 | if (rsp_info_len > 3 && rsp_info[3]) { |
5e19ed90 | 2560 | ql_dbg(ql_dbg_io, fcport->vha, 0x3019, |
7c3df132 SK |
2561 | "FCP I/O protocol failure (0x%x/0x%x).\n", |
2562 | rsp_info_len, rsp_info[3]); | |
1da177e4 | 2563 | |
9ba56b95 | 2564 | res = DID_BUS_BUSY << 16; |
b7d2280c | 2565 | goto out; |
1da177e4 LT |
2566 | } |
2567 | } | |
2568 | ||
3e8ce320 AV |
2569 | /* Check for overrun. */ |
2570 | if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && | |
2571 | scsi_status & SS_RESIDUAL_OVER) | |
2572 | comp_status = CS_DATA_OVERRUN; | |
2573 | ||
e05fe292 CD |
2574 | /* |
2575 | * Check retry_delay_timer value if we receive a busy or | |
2576 | * queue full. | |
2577 | */ | |
2578 | if (lscsi_status == SAM_STAT_TASK_SET_FULL || | |
2579 | lscsi_status == SAM_STAT_BUSY) | |
2580 | qla2x00_set_retry_delay_timestamp(fcport, retry_delay); | |
2581 | ||
1da177e4 LT |
2582 | /* |
2583 | * Based on Host and scsi status generate status code for Linux | |
2584 | */ | |
2585 | switch (comp_status) { | |
2586 | case CS_COMPLETE: | |
df7baa50 | 2587 | case CS_QUEUE_FULL: |
1da177e4 | 2588 | if (scsi_status == 0) { |
9ba56b95 | 2589 | res = DID_OK << 16; |
1da177e4 LT |
2590 | break; |
2591 | } | |
2592 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) { | |
9a853f71 | 2593 | resid = resid_len; |
385d70b4 | 2594 | scsi_set_resid(cp, resid); |
0da69df1 AV |
2595 | |
2596 | if (!lscsi_status && | |
385d70b4 | 2597 | ((unsigned)(scsi_bufflen(cp) - resid) < |
0da69df1 | 2598 | cp->underflow)) { |
5e19ed90 | 2599 | ql_dbg(ql_dbg_io, fcport->vha, 0x301a, |
83548fe2 | 2600 | "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2601 | resid, scsi_bufflen(cp)); |
0da69df1 | 2602 | |
9ba56b95 | 2603 | res = DID_ERROR << 16; |
0da69df1 AV |
2604 | break; |
2605 | } | |
1da177e4 | 2606 | } |
9ba56b95 | 2607 | res = DID_OK << 16 | lscsi_status; |
1da177e4 | 2608 | |
df7baa50 | 2609 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2610 | ql_dbg(ql_dbg_io, fcport->vha, 0x301b, |
7c3df132 | 2611 | "QUEUE FULL detected.\n"); |
df7baa50 AV |
2612 | break; |
2613 | } | |
b7d2280c | 2614 | logit = 0; |
1da177e4 LT |
2615 | if (lscsi_status != SS_CHECK_CONDITION) |
2616 | break; | |
2617 | ||
b80ca4f7 | 2618 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2619 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2620 | break; | |
2621 | ||
5544213b | 2622 | qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len, |
9ba56b95 | 2623 | rsp, res); |
1da177e4 LT |
2624 | break; |
2625 | ||
2626 | case CS_DATA_UNDERRUN: | |
ed17c71b | 2627 | /* Use F/W calculated residual length. */ |
0f00a206 LC |
2628 | resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len; |
2629 | scsi_set_resid(cp, resid); | |
2630 | if (scsi_status & SS_RESIDUAL_UNDER) { | |
2631 | if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) { | |
5e19ed90 | 2632 | ql_dbg(ql_dbg_io, fcport->vha, 0x301d, |
83548fe2 | 2633 | "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2634 | resid, scsi_bufflen(cp)); |
0f00a206 | 2635 | |
9ba56b95 | 2636 | res = DID_ERROR << 16 | lscsi_status; |
4e85e3d9 | 2637 | goto check_scsi_status; |
6acf8190 | 2638 | } |
ed17c71b | 2639 | |
0f00a206 LC |
2640 | if (!lscsi_status && |
2641 | ((unsigned)(scsi_bufflen(cp) - resid) < | |
2642 | cp->underflow)) { | |
5e19ed90 | 2643 | ql_dbg(ql_dbg_io, fcport->vha, 0x301e, |
83548fe2 | 2644 | "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2645 | resid, scsi_bufflen(cp)); |
e038a1be | 2646 | |
9ba56b95 | 2647 | res = DID_ERROR << 16; |
0f00a206 LC |
2648 | break; |
2649 | } | |
4aee5766 GM |
2650 | } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && |
2651 | lscsi_status != SAM_STAT_BUSY) { | |
2652 | /* | |
2653 | * scsi status of task set and busy are considered to be | |
2654 | * task not completed. | |
2655 | */ | |
2656 | ||
5e19ed90 | 2657 | ql_dbg(ql_dbg_io, fcport->vha, 0x301f, |
83548fe2 QT |
2658 | "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", |
2659 | resid, scsi_bufflen(cp)); | |
0f00a206 | 2660 | |
9ba56b95 | 2661 | res = DID_ERROR << 16 | lscsi_status; |
0374f55e | 2662 | goto check_scsi_status; |
4aee5766 GM |
2663 | } else { |
2664 | ql_dbg(ql_dbg_io, fcport->vha, 0x3030, | |
2665 | "scsi_status: 0x%x, lscsi_status: 0x%x\n", | |
2666 | scsi_status, lscsi_status); | |
1da177e4 LT |
2667 | } |
2668 | ||
9ba56b95 | 2669 | res = DID_OK << 16 | lscsi_status; |
b7d2280c | 2670 | logit = 0; |
0f00a206 | 2671 | |
0374f55e | 2672 | check_scsi_status: |
1da177e4 | 2673 | /* |
fa2a1ce5 | 2674 | * Check to see if SCSI Status is non zero. If so report SCSI |
1da177e4 LT |
2675 | * Status. |
2676 | */ | |
2677 | if (lscsi_status != 0) { | |
ffec28a3 | 2678 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2679 | ql_dbg(ql_dbg_io, fcport->vha, 0x3020, |
7c3df132 | 2680 | "QUEUE FULL detected.\n"); |
b7d2280c | 2681 | logit = 1; |
ffec28a3 AV |
2682 | break; |
2683 | } | |
1da177e4 LT |
2684 | if (lscsi_status != SS_CHECK_CONDITION) |
2685 | break; | |
2686 | ||
b80ca4f7 | 2687 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2688 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2689 | break; | |
2690 | ||
5544213b | 2691 | qla2x00_handle_sense(sp, sense_data, par_sense_len, |
9ba56b95 | 2692 | sense_len, rsp, res); |
1da177e4 LT |
2693 | } |
2694 | break; | |
2695 | ||
1da177e4 LT |
2696 | case CS_PORT_LOGGED_OUT: |
2697 | case CS_PORT_CONFIG_CHG: | |
2698 | case CS_PORT_BUSY: | |
2699 | case CS_INCOMPLETE: | |
2700 | case CS_PORT_UNAVAILABLE: | |
b7d2280c | 2701 | case CS_TIMEOUT: |
ff454b01 CD |
2702 | case CS_RESET: |
2703 | ||
056a4483 MC |
2704 | /* |
2705 | * We are going to have the fc class block the rport | |
2706 | * while we try to recover so instruct the mid layer | |
2707 | * to requeue until the class decides how to handle this. | |
2708 | */ | |
9ba56b95 | 2709 | res = DID_TRANSPORT_DISRUPTED << 16; |
b7d2280c AV |
2710 | |
2711 | if (comp_status == CS_TIMEOUT) { | |
2712 | if (IS_FWI2_CAPABLE(ha)) | |
2713 | break; | |
2714 | else if ((le16_to_cpu(sts->status_flags) & | |
2715 | SF_LOGOUT_SENT) == 0) | |
2716 | break; | |
2717 | } | |
2718 | ||
726b8548 QT |
2719 | if (atomic_read(&fcport->state) == FCS_ONLINE) { |
2720 | ql_dbg(ql_dbg_disc, fcport->vha, 0x3021, | |
2721 | "Port to be marked lost on fcport=%02x%02x%02x, current " | |
2722 | "port state= %s comp_status %x.\n", fcport->d_id.b.domain, | |
2723 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
282d1056 | 2724 | port_state_str[FCS_ONLINE], |
726b8548 QT |
2725 | comp_status); |
2726 | ||
e315cd28 | 2727 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); |
d8630bb9 | 2728 | qlt_schedule_sess_for_deletion(fcport); |
726b8548 QT |
2729 | } |
2730 | ||
1da177e4 LT |
2731 | break; |
2732 | ||
1da177e4 | 2733 | case CS_ABORTED: |
9ba56b95 | 2734 | res = DID_RESET << 16; |
1da177e4 | 2735 | break; |
bad75002 AE |
2736 | |
2737 | case CS_DIF_ERROR: | |
8cb2049c | 2738 | logit = qla2x00_handle_dif_error(sp, sts24); |
fb6e4668 | 2739 | res = cp->result; |
bad75002 | 2740 | break; |
9e522cd8 AE |
2741 | |
2742 | case CS_TRANSPORT: | |
2743 | res = DID_ERROR << 16; | |
2744 | ||
2745 | if (!IS_PI_SPLIT_DET_CAPABLE(ha)) | |
2746 | break; | |
2747 | ||
2748 | if (state_flags & BIT_4) | |
2749 | scmd_printk(KERN_WARNING, cp, | |
2750 | "Unsupported device '%s' found.\n", | |
2751 | cp->device->vendor); | |
2752 | break; | |
2753 | ||
50b81275 GM |
2754 | case CS_DMA: |
2755 | ql_log(ql_log_info, fcport->vha, 0x3022, | |
2756 | "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", | |
2757 | comp_status, scsi_status, res, vha->host_no, | |
2758 | cp->device->id, cp->device->lun, fcport->d_id.b24, | |
2759 | ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len, | |
2760 | resid_len, fw_resid_len, sp, cp); | |
2761 | ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee, | |
2762 | pkt, sizeof(*sts24)); | |
2763 | res = DID_ERROR << 16; | |
2764 | break; | |
1da177e4 | 2765 | default: |
9ba56b95 | 2766 | res = DID_ERROR << 16; |
1da177e4 LT |
2767 | break; |
2768 | } | |
2769 | ||
b7d2280c AV |
2770 | out: |
2771 | if (logit) | |
5e19ed90 | 2772 | ql_dbg(ql_dbg_io, fcport->vha, 0x3022, |
9cb78c16 | 2773 | "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu " |
7b833558 | 2774 | "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x " |
c7bc4cae | 2775 | "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", |
9ba56b95 | 2776 | comp_status, scsi_status, res, vha->host_no, |
cfb0919c CD |
2777 | cp->device->id, cp->device->lun, fcport->d_id.b.domain, |
2778 | fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id, | |
7b833558 | 2779 | cp->cmnd, scsi_bufflen(cp), rsp_info_len, |
c7bc4cae | 2780 | resid_len, fw_resid_len, sp, cp); |
b7d2280c | 2781 | |
2afa19a9 | 2782 | if (rsp->status_srb == NULL) |
25ff6af1 | 2783 | sp->done(sp, res); |
88263208 BVA |
2784 | else |
2785 | WARN_ON_ONCE(true); | |
1da177e4 LT |
2786 | } |
2787 | ||
2788 | /** | |
2789 | * qla2x00_status_cont_entry() - Process a Status Continuations entry. | |
2db6228d | 2790 | * @rsp: response queue |
1da177e4 LT |
2791 | * @pkt: Entry pointer |
2792 | * | |
2793 | * Extended sense data. | |
2794 | */ | |
2795 | static void | |
2afa19a9 | 2796 | qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) |
1da177e4 | 2797 | { |
9ba56b95 | 2798 | uint8_t sense_sz = 0; |
2afa19a9 | 2799 | struct qla_hw_data *ha = rsp->hw; |
7c3df132 | 2800 | struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); |
9ba56b95 | 2801 | srb_t *sp = rsp->status_srb; |
1da177e4 | 2802 | struct scsi_cmnd *cp; |
9ba56b95 GM |
2803 | uint32_t sense_len; |
2804 | uint8_t *sense_ptr; | |
1da177e4 | 2805 | |
9ba56b95 GM |
2806 | if (!sp || !GET_CMD_SENSE_LEN(sp)) |
2807 | return; | |
1da177e4 | 2808 | |
9ba56b95 GM |
2809 | sense_len = GET_CMD_SENSE_LEN(sp); |
2810 | sense_ptr = GET_CMD_SENSE_PTR(sp); | |
1da177e4 | 2811 | |
9ba56b95 GM |
2812 | cp = GET_CMD_SP(sp); |
2813 | if (cp == NULL) { | |
2814 | ql_log(ql_log_warn, vha, 0x3025, | |
2815 | "cmd is NULL: already returned to OS (sp=%p).\n", sp); | |
1da177e4 | 2816 | |
9ba56b95 GM |
2817 | rsp->status_srb = NULL; |
2818 | return; | |
1da177e4 | 2819 | } |
1da177e4 | 2820 | |
9ba56b95 GM |
2821 | if (sense_len > sizeof(pkt->data)) |
2822 | sense_sz = sizeof(pkt->data); | |
2823 | else | |
2824 | sense_sz = sense_len; | |
c4631191 | 2825 | |
9ba56b95 GM |
2826 | /* Move sense data. */ |
2827 | if (IS_FWI2_CAPABLE(ha)) | |
2828 | host_to_fcp_swap(pkt->data, sizeof(pkt->data)); | |
2829 | memcpy(sense_ptr, pkt->data, sense_sz); | |
2830 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c, | |
2831 | sense_ptr, sense_sz); | |
c4631191 | 2832 | |
9ba56b95 GM |
2833 | sense_len -= sense_sz; |
2834 | sense_ptr += sense_sz; | |
c4631191 | 2835 | |
9ba56b95 GM |
2836 | SET_CMD_SENSE_PTR(sp, sense_ptr); |
2837 | SET_CMD_SENSE_LEN(sp, sense_len); | |
2838 | ||
2839 | /* Place command on done queue. */ | |
2840 | if (sense_len == 0) { | |
2841 | rsp->status_srb = NULL; | |
25ff6af1 | 2842 | sp->done(sp, cp->result); |
88263208 BVA |
2843 | } else { |
2844 | WARN_ON_ONCE(true); | |
c4631191 | 2845 | } |
c4631191 GM |
2846 | } |
2847 | ||
1da177e4 LT |
2848 | /** |
2849 | * qla2x00_error_entry() - Process an error entry. | |
2db6228d BVA |
2850 | * @vha: SCSI driver HA context |
2851 | * @rsp: response queue | |
1da177e4 | 2852 | * @pkt: Entry pointer |
c5419e26 | 2853 | * return : 1=allow further error analysis. 0=no additional error analysis. |
1da177e4 | 2854 | */ |
c5419e26 | 2855 | static int |
73208dfd | 2856 | qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt) |
1da177e4 LT |
2857 | { |
2858 | srb_t *sp; | |
e315cd28 | 2859 | struct qla_hw_data *ha = vha->hw; |
c4631191 | 2860 | const char func[] = "ERROR-IOCB"; |
2afa19a9 | 2861 | uint16_t que = MSW(pkt->handle); |
a6fe35c0 | 2862 | struct req_que *req = NULL; |
9ba56b95 | 2863 | int res = DID_ERROR << 16; |
7c3df132 | 2864 | |
9ba56b95 | 2865 | ql_dbg(ql_dbg_async, vha, 0x502a, |
82de802a QT |
2866 | "iocb type %xh with error status %xh, handle %xh, rspq id %d\n", |
2867 | pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id); | |
9ba56b95 | 2868 | |
a6fe35c0 AE |
2869 | if (que >= ha->max_req_queues || !ha->req_q_map[que]) |
2870 | goto fatal; | |
2871 | ||
2872 | req = ha->req_q_map[que]; | |
2873 | ||
9ba56b95 GM |
2874 | if (pkt->entry_status & RF_BUSY) |
2875 | res = DID_BUS_BUSY << 16; | |
1da177e4 | 2876 | |
c5419e26 QT |
2877 | if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE) |
2878 | return 0; | |
4f060736 | 2879 | |
c5419e26 QT |
2880 | switch (pkt->entry_type) { |
2881 | case NOTIFY_ACK_TYPE: | |
2882 | case STATUS_TYPE: | |
2883 | case STATUS_CONT_TYPE: | |
2884 | case LOGINOUT_PORT_IOCB_TYPE: | |
2885 | case CT_IOCB_TYPE: | |
2886 | case ELS_IOCB_TYPE: | |
2887 | case ABORT_IOCB_TYPE: | |
2888 | case MBX_IOCB_TYPE: | |
527b8ae3 | 2889 | default: |
c5419e26 QT |
2890 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); |
2891 | if (sp) { | |
2892 | sp->done(sp, res); | |
2893 | return 0; | |
2894 | } | |
2895 | break; | |
2896 | ||
2897 | case ABTS_RESP_24XX: | |
2898 | case CTIO_TYPE7: | |
2899 | case CTIO_CRC2: | |
c5419e26 | 2900 | return 1; |
1da177e4 | 2901 | } |
a6fe35c0 AE |
2902 | fatal: |
2903 | ql_log(ql_log_warn, vha, 0x5030, | |
fd49a540 | 2904 | "Error entry - invalid handle/queue (%04x).\n", que); |
c5419e26 | 2905 | return 0; |
1da177e4 LT |
2906 | } |
2907 | ||
9a853f71 AV |
2908 | /** |
2909 | * qla24xx_mbx_completion() - Process mailbox command completions. | |
2db6228d | 2910 | * @vha: SCSI driver HA context |
9a853f71 AV |
2911 | * @mb0: Mailbox0 register |
2912 | */ | |
2913 | static void | |
e315cd28 | 2914 | qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
9a853f71 AV |
2915 | { |
2916 | uint16_t cnt; | |
4fa94f83 | 2917 | uint32_t mboxes; |
9a853f71 | 2918 | uint16_t __iomem *wptr; |
e315cd28 | 2919 | struct qla_hw_data *ha = vha->hw; |
9a853f71 AV |
2920 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
2921 | ||
4fa94f83 | 2922 | /* Read all mbox registers? */ |
c02189e1 BVA |
2923 | WARN_ON_ONCE(ha->mbx_count > 32); |
2924 | mboxes = (1ULL << ha->mbx_count) - 1; | |
4fa94f83 | 2925 | if (!ha->mcp) |
a720101d | 2926 | ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
2927 | else |
2928 | mboxes = ha->mcp->in_mb; | |
2929 | ||
9a853f71 AV |
2930 | /* Load return mailbox registers. */ |
2931 | ha->flags.mbox_int = 1; | |
2932 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 2933 | mboxes >>= 1; |
9a853f71 AV |
2934 | wptr = (uint16_t __iomem *)®->mailbox1; |
2935 | ||
2936 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
4fa94f83 AV |
2937 | if (mboxes & BIT_0) |
2938 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); | |
2939 | ||
2940 | mboxes >>= 1; | |
9a853f71 AV |
2941 | wptr++; |
2942 | } | |
9a853f71 AV |
2943 | } |
2944 | ||
4440e46d AB |
2945 | static void |
2946 | qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
2947 | struct abort_entry_24xx *pkt) | |
2948 | { | |
2949 | const char func[] = "ABT_IOCB"; | |
2950 | srb_t *sp; | |
2951 | struct srb_iocb *abt; | |
2952 | ||
2953 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
2954 | if (!sp) | |
2955 | return; | |
2956 | ||
2957 | abt = &sp->u.iocb_cmd; | |
15f30a57 | 2958 | abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle); |
25ff6af1 | 2959 | sp->done(sp, 0); |
4440e46d AB |
2960 | } |
2961 | ||
0f7e51f6 | 2962 | void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha, |
2963 | struct pt_ls4_request *pkt, struct req_que *req) | |
e84067d7 DG |
2964 | { |
2965 | srb_t *sp; | |
2966 | const char func[] = "LS4_IOCB"; | |
2967 | uint16_t comp_status; | |
2968 | ||
2969 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
2970 | if (!sp) | |
2971 | return; | |
2972 | ||
2973 | comp_status = le16_to_cpu(pkt->status); | |
2974 | sp->done(sp, comp_status); | |
2975 | } | |
2976 | ||
9a853f71 AV |
2977 | /** |
2978 | * qla24xx_process_response_queue() - Process response queue entries. | |
2db6228d BVA |
2979 | * @vha: SCSI driver HA context |
2980 | * @rsp: response queue | |
9a853f71 | 2981 | */ |
2afa19a9 AC |
2982 | void qla24xx_process_response_queue(struct scsi_qla_host *vha, |
2983 | struct rsp_que *rsp) | |
9a853f71 | 2984 | { |
9a853f71 | 2985 | struct sts_entry_24xx *pkt; |
a9083016 | 2986 | struct qla_hw_data *ha = vha->hw; |
9a853f71 | 2987 | |
ec7193e2 | 2988 | if (!ha->flags.fw_started) |
9a853f71 AV |
2989 | return; |
2990 | ||
e326d22a QT |
2991 | if (rsp->qpair->cpuid != smp_processor_id()) |
2992 | qla_cpu_update(rsp->qpair, smp_processor_id()); | |
2993 | ||
e315cd28 AC |
2994 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
2995 | pkt = (struct sts_entry_24xx *)rsp->ring_ptr; | |
9a853f71 | 2996 | |
e315cd28 AC |
2997 | rsp->ring_index++; |
2998 | if (rsp->ring_index == rsp->length) { | |
2999 | rsp->ring_index = 0; | |
3000 | rsp->ring_ptr = rsp->ring; | |
9a853f71 | 3001 | } else { |
e315cd28 | 3002 | rsp->ring_ptr++; |
9a853f71 AV |
3003 | } |
3004 | ||
3005 | if (pkt->entry_status != 0) { | |
c5419e26 | 3006 | if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt)) |
f83adb61 | 3007 | goto process_err; |
2d70c103 | 3008 | |
9a853f71 AV |
3009 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
3010 | wmb(); | |
3011 | continue; | |
3012 | } | |
f83adb61 | 3013 | process_err: |
9a853f71 AV |
3014 | |
3015 | switch (pkt->entry_type) { | |
3016 | case STATUS_TYPE: | |
73208dfd | 3017 | qla2x00_status_entry(vha, rsp, pkt); |
9a853f71 AV |
3018 | break; |
3019 | case STATUS_CONT_TYPE: | |
2afa19a9 | 3020 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
9a853f71 | 3021 | break; |
2c3dfe3f | 3022 | case VP_RPT_ID_IOCB_TYPE: |
e315cd28 | 3023 | qla24xx_report_id_acquisition(vha, |
2c3dfe3f SJ |
3024 | (struct vp_rpt_id_entry_24xx *)pkt); |
3025 | break; | |
ac280b67 AV |
3026 | case LOGINOUT_PORT_IOCB_TYPE: |
3027 | qla24xx_logio_entry(vha, rsp->req, | |
3028 | (struct logio_entry_24xx *)pkt); | |
3029 | break; | |
f83adb61 | 3030 | case CT_IOCB_TYPE: |
9a069e19 | 3031 | qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); |
9a069e19 | 3032 | break; |
f83adb61 | 3033 | case ELS_IOCB_TYPE: |
9a069e19 GM |
3034 | qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE); |
3035 | break; | |
2d70c103 | 3036 | case ABTS_RECV_24XX: |
ecc89f25 JC |
3037 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || |
3038 | IS_QLA28XX(ha)) { | |
2f424b9b | 3039 | /* ensure that the ATIO queue is empty */ |
82de802a QT |
3040 | qlt_handle_abts_recv(vha, rsp, |
3041 | (response_t *)pkt); | |
2f424b9b QT |
3042 | break; |
3043 | } else { | |
2f424b9b QT |
3044 | qlt_24xx_process_atio_queue(vha, 1); |
3045 | } | |
81881861 | 3046 | /* fall through */ |
2d70c103 NB |
3047 | case ABTS_RESP_24XX: |
3048 | case CTIO_TYPE7: | |
f83adb61 | 3049 | case CTIO_CRC2: |
82de802a | 3050 | qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt); |
2d70c103 | 3051 | break; |
e84067d7 DG |
3052 | case PT_LS4_REQUEST: |
3053 | qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt, | |
3054 | rsp->req); | |
3055 | break; | |
726b8548 QT |
3056 | case NOTIFY_ACK_TYPE: |
3057 | if (pkt->handle == QLA_TGT_SKIP_HANDLE) | |
82de802a QT |
3058 | qlt_response_pkt_all_vps(vha, rsp, |
3059 | (response_t *)pkt); | |
726b8548 QT |
3060 | else |
3061 | qla24xxx_nack_iocb_entry(vha, rsp->req, | |
3062 | (struct nack_to_isp *)pkt); | |
3063 | break; | |
54883291 SK |
3064 | case MARKER_TYPE: |
3065 | /* Do nothing in this case, this check is to prevent it | |
3066 | * from falling into default case | |
3067 | */ | |
3068 | break; | |
4440e46d AB |
3069 | case ABORT_IOCB_TYPE: |
3070 | qla24xx_abort_iocb_entry(vha, rsp->req, | |
3071 | (struct abort_entry_24xx *)pkt); | |
3072 | break; | |
726b8548 QT |
3073 | case MBX_IOCB_TYPE: |
3074 | qla24xx_mbx_iocb_entry(vha, rsp->req, | |
3075 | (struct mbx_24xx_entry *)pkt); | |
3076 | break; | |
2853192e QT |
3077 | case VP_CTRL_IOCB_TYPE: |
3078 | qla_ctrlvp_completed(vha, rsp->req, | |
3079 | (struct vp_ctrl_entry_24xx *)pkt); | |
3080 | break; | |
9a853f71 AV |
3081 | default: |
3082 | /* Type Not Supported. */ | |
7c3df132 SK |
3083 | ql_dbg(ql_dbg_async, vha, 0x5042, |
3084 | "Received unknown response pkt type %x " | |
9a853f71 | 3085 | "entry status=%x.\n", |
7c3df132 | 3086 | pkt->entry_type, pkt->entry_status); |
9a853f71 AV |
3087 | break; |
3088 | } | |
3089 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; | |
3090 | wmb(); | |
3091 | } | |
3092 | ||
3093 | /* Adjust ring index */ | |
7ec0effd | 3094 | if (IS_P3P_TYPE(ha)) { |
a9083016 | 3095 | struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; |
bd432bb5 | 3096 | |
a9083016 | 3097 | WRT_REG_DWORD(®->rsp_q_out[0], rsp->ring_index); |
726b8548 | 3098 | } else { |
a9083016 | 3099 | WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); |
726b8548 | 3100 | } |
9a853f71 AV |
3101 | } |
3102 | ||
05236a05 | 3103 | static void |
e315cd28 | 3104 | qla2xxx_check_risc_status(scsi_qla_host_t *vha) |
05236a05 AV |
3105 | { |
3106 | int rval; | |
3107 | uint32_t cnt; | |
e315cd28 | 3108 | struct qla_hw_data *ha = vha->hw; |
05236a05 AV |
3109 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
3110 | ||
f73cb695 | 3111 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && |
ecc89f25 | 3112 | !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) |
05236a05 AV |
3113 | return; |
3114 | ||
3115 | rval = QLA_SUCCESS; | |
3116 | WRT_REG_DWORD(®->iobase_addr, 0x7C00); | |
3117 | RD_REG_DWORD(®->iobase_addr); | |
3118 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
3119 | for (cnt = 10000; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
3120 | rval == QLA_SUCCESS; cnt--) { | |
3121 | if (cnt) { | |
3122 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
3123 | udelay(10); | |
3124 | } else | |
3125 | rval = QLA_FUNCTION_TIMEOUT; | |
3126 | } | |
3127 | if (rval == QLA_SUCCESS) | |
3128 | goto next_test; | |
3129 | ||
b2ec76c5 | 3130 | rval = QLA_SUCCESS; |
05236a05 AV |
3131 | WRT_REG_DWORD(®->iobase_window, 0x0003); |
3132 | for (cnt = 100; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
3133 | rval == QLA_SUCCESS; cnt--) { | |
3134 | if (cnt) { | |
3135 | WRT_REG_DWORD(®->iobase_window, 0x0003); | |
3136 | udelay(10); | |
3137 | } else | |
3138 | rval = QLA_FUNCTION_TIMEOUT; | |
3139 | } | |
3140 | if (rval != QLA_SUCCESS) | |
3141 | goto done; | |
3142 | ||
3143 | next_test: | |
3144 | if (RD_REG_DWORD(®->iobase_c8) & BIT_3) | |
7c3df132 SK |
3145 | ql_log(ql_log_info, vha, 0x504c, |
3146 | "Additional code -- 0x55AA.\n"); | |
05236a05 AV |
3147 | |
3148 | done: | |
3149 | WRT_REG_DWORD(®->iobase_window, 0x0000); | |
3150 | RD_REG_DWORD(®->iobase_window); | |
3151 | } | |
3152 | ||
9a853f71 | 3153 | /** |
6246b8a1 | 3154 | * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx. |
807eb907 | 3155 | * @irq: interrupt number |
9a853f71 | 3156 | * @dev_id: SCSI driver HA context |
9a853f71 AV |
3157 | * |
3158 | * Called by system whenever the host adapter generates an interrupt. | |
3159 | * | |
3160 | * Returns handled flag. | |
3161 | */ | |
3162 | irqreturn_t | |
7d12e780 | 3163 | qla24xx_intr_handler(int irq, void *dev_id) |
9a853f71 | 3164 | { |
e315cd28 AC |
3165 | scsi_qla_host_t *vha; |
3166 | struct qla_hw_data *ha; | |
9a853f71 AV |
3167 | struct device_reg_24xx __iomem *reg; |
3168 | int status; | |
9a853f71 AV |
3169 | unsigned long iter; |
3170 | uint32_t stat; | |
3171 | uint32_t hccr; | |
7d613ac6 | 3172 | uint16_t mb[8]; |
e315cd28 | 3173 | struct rsp_que *rsp; |
43fac4d9 | 3174 | unsigned long flags; |
1073daa4 | 3175 | bool process_atio = false; |
9a853f71 | 3176 | |
e315cd28 AC |
3177 | rsp = (struct rsp_que *) dev_id; |
3178 | if (!rsp) { | |
3256b435 CD |
3179 | ql_log(ql_log_info, NULL, 0x5059, |
3180 | "%s: NULL response queue pointer.\n", __func__); | |
9a853f71 AV |
3181 | return IRQ_NONE; |
3182 | } | |
3183 | ||
e315cd28 | 3184 | ha = rsp->hw; |
9a853f71 AV |
3185 | reg = &ha->iobase->isp24; |
3186 | status = 0; | |
3187 | ||
85880801 AV |
3188 | if (unlikely(pci_channel_offline(ha->pdev))) |
3189 | return IRQ_HANDLED; | |
3190 | ||
43fac4d9 | 3191 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 3192 | vha = pci_get_drvdata(ha->pdev); |
9a853f71 AV |
3193 | for (iter = 50; iter--; ) { |
3194 | stat = RD_REG_DWORD(®->host_status); | |
c821e0d5 | 3195 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 3196 | break; |
9a853f71 | 3197 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 3198 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
3199 | break; |
3200 | ||
9a853f71 AV |
3201 | hccr = RD_REG_DWORD(®->hccr); |
3202 | ||
7c3df132 SK |
3203 | ql_log(ql_log_warn, vha, 0x504b, |
3204 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
3205 | hccr); | |
05236a05 | 3206 | |
e315cd28 | 3207 | qla2xxx_check_risc_status(vha); |
05236a05 | 3208 | |
e315cd28 AC |
3209 | ha->isp_ops->fw_dump(vha, 1); |
3210 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
9a853f71 AV |
3211 | break; |
3212 | } else if ((stat & HSRX_RISC_INT) == 0) | |
3213 | break; | |
3214 | ||
3215 | switch (stat & 0xff) { | |
fafbda9f AE |
3216 | case INTR_ROM_MB_SUCCESS: |
3217 | case INTR_ROM_MB_FAILED: | |
3218 | case INTR_MB_SUCCESS: | |
3219 | case INTR_MB_FAILED: | |
e315cd28 | 3220 | qla24xx_mbx_completion(vha, MSW(stat)); |
9a853f71 AV |
3221 | status |= MBX_INTERRUPT; |
3222 | ||
3223 | break; | |
fafbda9f | 3224 | case INTR_ASYNC_EVENT: |
9a853f71 AV |
3225 | mb[0] = MSW(stat); |
3226 | mb[1] = RD_REG_WORD(®->mailbox1); | |
3227 | mb[2] = RD_REG_WORD(®->mailbox2); | |
3228 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 3229 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 | 3230 | break; |
fafbda9f AE |
3231 | case INTR_RSP_QUE_UPDATE: |
3232 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 3233 | qla24xx_process_response_queue(vha, rsp); |
9a853f71 | 3234 | break; |
c9558869 | 3235 | case INTR_ATIO_QUE_UPDATE_27XX: |
1073daa4 QT |
3236 | case INTR_ATIO_QUE_UPDATE: |
3237 | process_atio = true; | |
2d70c103 | 3238 | break; |
1073daa4 QT |
3239 | case INTR_ATIO_RSP_QUE_UPDATE: |
3240 | process_atio = true; | |
2d70c103 NB |
3241 | qla24xx_process_response_queue(vha, rsp); |
3242 | break; | |
9a853f71 | 3243 | default: |
7c3df132 SK |
3244 | ql_dbg(ql_dbg_async, vha, 0x504f, |
3245 | "Unrecognized interrupt type (%d).\n", stat * 0xff); | |
9a853f71 AV |
3246 | break; |
3247 | } | |
3248 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
3249 | RD_REG_DWORD_RELAXED(®->hccr); | |
cb860bbd GM |
3250 | if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1))) |
3251 | ndelay(3500); | |
9a853f71 | 3252 | } |
36439832 | 3253 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 3254 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
9a853f71 | 3255 | |
1073daa4 QT |
3256 | if (process_atio) { |
3257 | spin_lock_irqsave(&ha->tgt.atio_lock, flags); | |
3258 | qlt_24xx_process_atio_queue(vha, 0); | |
3259 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); | |
3260 | } | |
3261 | ||
9a853f71 AV |
3262 | return IRQ_HANDLED; |
3263 | } | |
3264 | ||
a8488abe AV |
3265 | static irqreturn_t |
3266 | qla24xx_msix_rsp_q(int irq, void *dev_id) | |
3267 | { | |
e315cd28 AC |
3268 | struct qla_hw_data *ha; |
3269 | struct rsp_que *rsp; | |
a8488abe | 3270 | struct device_reg_24xx __iomem *reg; |
2afa19a9 | 3271 | struct scsi_qla_host *vha; |
0f19bc68 | 3272 | unsigned long flags; |
a8488abe | 3273 | |
e315cd28 AC |
3274 | rsp = (struct rsp_que *) dev_id; |
3275 | if (!rsp) { | |
3256b435 CD |
3276 | ql_log(ql_log_info, NULL, 0x505a, |
3277 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
3278 | return IRQ_NONE; |
3279 | } | |
3280 | ha = rsp->hw; | |
a8488abe AV |
3281 | reg = &ha->iobase->isp24; |
3282 | ||
0f19bc68 | 3283 | spin_lock_irqsave(&ha->hardware_lock, flags); |
a8488abe | 3284 | |
a67093d4 | 3285 | vha = pci_get_drvdata(ha->pdev); |
2afa19a9 | 3286 | qla24xx_process_response_queue(vha, rsp); |
3155754a | 3287 | if (!ha->flags.disable_msix_handshake) { |
eb94114b AC |
3288 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
3289 | RD_REG_DWORD_RELAXED(®->hccr); | |
3290 | } | |
0f19bc68 | 3291 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe AV |
3292 | |
3293 | return IRQ_HANDLED; | |
3294 | } | |
3295 | ||
3296 | static irqreturn_t | |
3297 | qla24xx_msix_default(int irq, void *dev_id) | |
3298 | { | |
e315cd28 AC |
3299 | scsi_qla_host_t *vha; |
3300 | struct qla_hw_data *ha; | |
3301 | struct rsp_que *rsp; | |
a8488abe AV |
3302 | struct device_reg_24xx __iomem *reg; |
3303 | int status; | |
a8488abe AV |
3304 | uint32_t stat; |
3305 | uint32_t hccr; | |
7d613ac6 | 3306 | uint16_t mb[8]; |
0f19bc68 | 3307 | unsigned long flags; |
1073daa4 | 3308 | bool process_atio = false; |
a8488abe | 3309 | |
e315cd28 AC |
3310 | rsp = (struct rsp_que *) dev_id; |
3311 | if (!rsp) { | |
3256b435 CD |
3312 | ql_log(ql_log_info, NULL, 0x505c, |
3313 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
3314 | return IRQ_NONE; |
3315 | } | |
3316 | ha = rsp->hw; | |
a8488abe AV |
3317 | reg = &ha->iobase->isp24; |
3318 | status = 0; | |
3319 | ||
0f19bc68 | 3320 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 3321 | vha = pci_get_drvdata(ha->pdev); |
87f27015 | 3322 | do { |
a8488abe | 3323 | stat = RD_REG_DWORD(®->host_status); |
c821e0d5 | 3324 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 3325 | break; |
a8488abe | 3326 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 3327 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
3328 | break; |
3329 | ||
a8488abe AV |
3330 | hccr = RD_REG_DWORD(®->hccr); |
3331 | ||
7c3df132 SK |
3332 | ql_log(ql_log_info, vha, 0x5050, |
3333 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
3334 | hccr); | |
05236a05 | 3335 | |
e315cd28 | 3336 | qla2xxx_check_risc_status(vha); |
05236a05 | 3337 | |
e315cd28 AC |
3338 | ha->isp_ops->fw_dump(vha, 1); |
3339 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
a8488abe AV |
3340 | break; |
3341 | } else if ((stat & HSRX_RISC_INT) == 0) | |
3342 | break; | |
3343 | ||
3344 | switch (stat & 0xff) { | |
fafbda9f AE |
3345 | case INTR_ROM_MB_SUCCESS: |
3346 | case INTR_ROM_MB_FAILED: | |
3347 | case INTR_MB_SUCCESS: | |
3348 | case INTR_MB_FAILED: | |
e315cd28 | 3349 | qla24xx_mbx_completion(vha, MSW(stat)); |
a8488abe AV |
3350 | status |= MBX_INTERRUPT; |
3351 | ||
3352 | break; | |
fafbda9f | 3353 | case INTR_ASYNC_EVENT: |
a8488abe AV |
3354 | mb[0] = MSW(stat); |
3355 | mb[1] = RD_REG_WORD(®->mailbox1); | |
3356 | mb[2] = RD_REG_WORD(®->mailbox2); | |
3357 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 3358 | qla2x00_async_event(vha, rsp, mb); |
a8488abe | 3359 | break; |
fafbda9f AE |
3360 | case INTR_RSP_QUE_UPDATE: |
3361 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 3362 | qla24xx_process_response_queue(vha, rsp); |
a8488abe | 3363 | break; |
c9558869 | 3364 | case INTR_ATIO_QUE_UPDATE_27XX: |
1073daa4 QT |
3365 | case INTR_ATIO_QUE_UPDATE: |
3366 | process_atio = true; | |
2d70c103 | 3367 | break; |
1073daa4 QT |
3368 | case INTR_ATIO_RSP_QUE_UPDATE: |
3369 | process_atio = true; | |
2d70c103 NB |
3370 | qla24xx_process_response_queue(vha, rsp); |
3371 | break; | |
a8488abe | 3372 | default: |
7c3df132 SK |
3373 | ql_dbg(ql_dbg_async, vha, 0x5051, |
3374 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
a8488abe AV |
3375 | break; |
3376 | } | |
3377 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
87f27015 | 3378 | } while (0); |
36439832 | 3379 | qla2x00_handle_mbx_completion(ha, status); |
0f19bc68 | 3380 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe | 3381 | |
1073daa4 QT |
3382 | if (process_atio) { |
3383 | spin_lock_irqsave(&ha->tgt.atio_lock, flags); | |
3384 | qlt_24xx_process_atio_queue(vha, 0); | |
3385 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); | |
3386 | } | |
3387 | ||
a8488abe AV |
3388 | return IRQ_HANDLED; |
3389 | } | |
3390 | ||
d7459527 MH |
3391 | irqreturn_t |
3392 | qla2xxx_msix_rsp_q(int irq, void *dev_id) | |
3393 | { | |
3394 | struct qla_hw_data *ha; | |
3395 | struct qla_qpair *qpair; | |
3396 | struct device_reg_24xx __iomem *reg; | |
3397 | unsigned long flags; | |
3398 | ||
3399 | qpair = dev_id; | |
3400 | if (!qpair) { | |
3401 | ql_log(ql_log_info, NULL, 0x505b, | |
3402 | "%s: NULL response queue pointer.\n", __func__); | |
3403 | return IRQ_NONE; | |
3404 | } | |
3405 | ha = qpair->hw; | |
3406 | ||
3407 | /* Clear the interrupt, if enabled, for this response queue */ | |
3408 | if (unlikely(!ha->flags.disable_msix_handshake)) { | |
3409 | reg = &ha->iobase->isp24; | |
3410 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3411 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
3412 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3413 | } | |
3414 | ||
3415 | queue_work(ha->wq, &qpair->q_work); | |
3416 | ||
3417 | return IRQ_HANDLED; | |
3418 | } | |
3419 | ||
a8488abe AV |
3420 | /* Interrupt handling helpers. */ |
3421 | ||
3422 | struct qla_init_msix_entry { | |
a8488abe | 3423 | const char *name; |
476834c2 | 3424 | irq_handler_t handler; |
a8488abe AV |
3425 | }; |
3426 | ||
44a8f954 | 3427 | static const struct qla_init_msix_entry msix_entries[] = { |
e326d22a QT |
3428 | { "default", qla24xx_msix_default }, |
3429 | { "rsp_q", qla24xx_msix_rsp_q }, | |
3430 | { "atio_q", qla83xx_msix_atio_q }, | |
3431 | { "qpair_multiq", qla2xxx_msix_rsp_q }, | |
a8488abe AV |
3432 | }; |
3433 | ||
44a8f954 | 3434 | static const struct qla_init_msix_entry qla82xx_msix_entries[] = { |
a9083016 GM |
3435 | { "qla2xxx (default)", qla82xx_msix_default }, |
3436 | { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q }, | |
3437 | }; | |
3438 | ||
a8488abe | 3439 | static int |
73208dfd | 3440 | qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe AV |
3441 | { |
3442 | int i, ret; | |
a8488abe | 3443 | struct qla_msix_entry *qentry; |
7c3df132 | 3444 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
67f2db87 | 3445 | int min_vecs = QLA_BASE_VECTORS; |
17e5fc58 CH |
3446 | struct irq_affinity desc = { |
3447 | .pre_vectors = QLA_BASE_VECTORS, | |
3448 | }; | |
3449 | ||
c9558869 HM |
3450 | if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && |
3451 | IS_ATIO_MSIX_CAPABLE(ha)) { | |
17e5fc58 | 3452 | desc.pre_vectors++; |
67f2db87 MH |
3453 | min_vecs++; |
3454 | } | |
17e5fc58 | 3455 | |
f3e02695 | 3456 | if (USER_CTRL_IRQ(ha) || !ha->mqiobase) { |
09620eeb QT |
3457 | /* user wants to control IRQ setting for target mode */ |
3458 | ret = pci_alloc_irq_vectors(ha->pdev, min_vecs, | |
3459 | ha->msix_count, PCI_IRQ_MSIX); | |
3460 | } else | |
3461 | ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs, | |
3462 | ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, | |
3463 | &desc); | |
73208dfd | 3464 | |
84e32a06 AG |
3465 | if (ret < 0) { |
3466 | ql_log(ql_log_fatal, vha, 0x00c7, | |
3467 | "MSI-X: Failed to enable support, " | |
3468 | "giving up -- %d/%d.\n", | |
3469 | ha->msix_count, ret); | |
3470 | goto msix_out; | |
3471 | } else if (ret < ha->msix_count) { | |
7c3df132 SK |
3472 | ql_log(ql_log_warn, vha, 0x00c6, |
3473 | "MSI-X: Failed to enable support " | |
d7459527 MH |
3474 | "with %d vectors, using %d vectors.\n", |
3475 | ha->msix_count, ret); | |
cb43285f | 3476 | ha->msix_count = ret; |
d7459527 | 3477 | /* Recalculate queue values */ |
c38d1baf | 3478 | if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) { |
d7459527 MH |
3479 | ha->max_req_queues = ha->msix_count - 1; |
3480 | ||
3481 | /* ATIOQ needs 1 vector. That's 1 less QPair */ | |
3482 | if (QLA_TGT_MODE_ENABLED()) | |
3483 | ha->max_req_queues--; | |
3484 | ||
3485 | ha->max_rsp_queues = ha->max_req_queues; | |
3486 | ||
3487 | ha->max_qpairs = ha->max_req_queues - 1; | |
3488 | ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190, | |
3489 | "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs); | |
3490 | } | |
73208dfd | 3491 | } |
f0783d43 | 3492 | vha->irq_offset = desc.pre_vectors; |
6396bb22 KC |
3493 | ha->msix_entries = kcalloc(ha->msix_count, |
3494 | sizeof(struct qla_msix_entry), | |
3495 | GFP_KERNEL); | |
73208dfd | 3496 | if (!ha->msix_entries) { |
7c3df132 SK |
3497 | ql_log(ql_log_fatal, vha, 0x00c8, |
3498 | "Failed to allocate memory for ha->msix_entries.\n"); | |
73208dfd | 3499 | ret = -ENOMEM; |
24afabdb | 3500 | goto free_irqs; |
a8488abe AV |
3501 | } |
3502 | ha->flags.msix_enabled = 1; | |
3503 | ||
73208dfd AC |
3504 | for (i = 0; i < ha->msix_count; i++) { |
3505 | qentry = &ha->msix_entries[i]; | |
4fa18345 MH |
3506 | qentry->vector = pci_irq_vector(ha->pdev, i); |
3507 | qentry->entry = i; | |
a8488abe | 3508 | qentry->have_irq = 0; |
d7459527 | 3509 | qentry->in_use = 0; |
4fa18345 | 3510 | qentry->handle = NULL; |
a8488abe AV |
3511 | } |
3512 | ||
2afa19a9 | 3513 | /* Enable MSI-X vectors for the base queue */ |
17e5fc58 | 3514 | for (i = 0; i < QLA_BASE_VECTORS; i++) { |
2afa19a9 | 3515 | qentry = &ha->msix_entries[i]; |
4fa18345 | 3516 | qentry->handle = rsp; |
ef8d1d51 | 3517 | rsp->msix = qentry; |
d7459527 | 3518 | scnprintf(qentry->name, sizeof(qentry->name), |
e326d22a | 3519 | "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name); |
f324777e | 3520 | if (IS_P3P_TYPE(ha)) |
a9083016 GM |
3521 | ret = request_irq(qentry->vector, |
3522 | qla82xx_msix_entries[i].handler, | |
3523 | 0, qla82xx_msix_entries[i].name, rsp); | |
f324777e | 3524 | else |
a9083016 GM |
3525 | ret = request_irq(qentry->vector, |
3526 | msix_entries[i].handler, | |
e326d22a | 3527 | 0, qentry->name, rsp); |
f324777e CD |
3528 | if (ret) |
3529 | goto msix_register_fail; | |
3530 | qentry->have_irq = 1; | |
093df737 | 3531 | qentry->in_use = 1; |
f324777e CD |
3532 | } |
3533 | ||
3534 | /* | |
3535 | * If target mode is enable, also request the vector for the ATIO | |
3536 | * queue. | |
3537 | */ | |
c9558869 HM |
3538 | if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && |
3539 | IS_ATIO_MSIX_CAPABLE(ha)) { | |
093df737 | 3540 | qentry = &ha->msix_entries[QLA_ATIO_VECTOR]; |
ef8d1d51 | 3541 | rsp->msix = qentry; |
d7459527 MH |
3542 | qentry->handle = rsp; |
3543 | scnprintf(qentry->name, sizeof(qentry->name), | |
e326d22a QT |
3544 | "qla2xxx%lu_%s", vha->host_no, |
3545 | msix_entries[QLA_ATIO_VECTOR].name); | |
093df737 | 3546 | qentry->in_use = 1; |
f324777e | 3547 | ret = request_irq(qentry->vector, |
093df737 | 3548 | msix_entries[QLA_ATIO_VECTOR].handler, |
e326d22a | 3549 | 0, qentry->name, rsp); |
2afa19a9 | 3550 | qentry->have_irq = 1; |
73208dfd | 3551 | } |
73208dfd | 3552 | |
f324777e CD |
3553 | msix_register_fail: |
3554 | if (ret) { | |
3555 | ql_log(ql_log_fatal, vha, 0x00cb, | |
3556 | "MSI-X: unable to register handler -- %x/%d.\n", | |
3557 | qentry->vector, ret); | |
4fa18345 | 3558 | qla2x00_free_irqs(vha); |
f324777e CD |
3559 | ha->mqenable = 0; |
3560 | goto msix_out; | |
3561 | } | |
3562 | ||
73208dfd | 3563 | /* Enable MSI-X vector for response queue update for queue 0 */ |
ecc89f25 | 3564 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) { |
6246b8a1 | 3565 | if (ha->msixbase && ha->mqiobase && |
d7459527 MH |
3566 | (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || |
3567 | ql2xmqsupport)) | |
6246b8a1 GM |
3568 | ha->mqenable = 1; |
3569 | } else | |
d7459527 MH |
3570 | if (ha->mqiobase && |
3571 | (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || | |
3572 | ql2xmqsupport)) | |
6246b8a1 | 3573 | ha->mqenable = 1; |
7c3df132 SK |
3574 | ql_dbg(ql_dbg_multiq, vha, 0xc005, |
3575 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
3576 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
3577 | ql_dbg(ql_dbg_init, vha, 0x0055, | |
3578 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
3579 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
73208dfd | 3580 | |
a8488abe AV |
3581 | msix_out: |
3582 | return ret; | |
24afabdb BVA |
3583 | |
3584 | free_irqs: | |
3585 | pci_free_irq_vectors(ha->pdev); | |
3586 | goto msix_out; | |
a8488abe AV |
3587 | } |
3588 | ||
3589 | int | |
73208dfd | 3590 | qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe | 3591 | { |
7fa3e239 | 3592 | int ret = QLA_FUNCTION_FAILED; |
f73cb695 | 3593 | device_reg_t *reg = ha->iobase; |
7c3df132 | 3594 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
a8488abe AV |
3595 | |
3596 | /* If possible, enable MSI-X. */ | |
e7240af5 HM |
3597 | if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) && |
3598 | !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && | |
ecc89f25 | 3599 | !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))) |
6377a7ae BH |
3600 | goto skip_msi; |
3601 | ||
e7240af5 HM |
3602 | if (ql2xenablemsix == 2) |
3603 | goto skip_msix; | |
3604 | ||
6377a7ae BH |
3605 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && |
3606 | (ha->pdev->subsystem_device == 0x7040 || | |
3607 | ha->pdev->subsystem_device == 0x7041 || | |
3608 | ha->pdev->subsystem_device == 0x1705)) { | |
7c3df132 SK |
3609 | ql_log(ql_log_warn, vha, 0x0034, |
3610 | "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n", | |
6377a7ae | 3611 | ha->pdev->subsystem_vendor, |
7c3df132 | 3612 | ha->pdev->subsystem_device); |
6377a7ae BH |
3613 | goto skip_msi; |
3614 | } | |
a8488abe | 3615 | |
42cd4f5d | 3616 | if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { |
7c3df132 SK |
3617 | ql_log(ql_log_warn, vha, 0x0035, |
3618 | "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", | |
42cd4f5d | 3619 | ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); |
a8488abe AV |
3620 | goto skip_msix; |
3621 | } | |
3622 | ||
73208dfd | 3623 | ret = qla24xx_enable_msix(ha, rsp); |
a8488abe | 3624 | if (!ret) { |
7c3df132 SK |
3625 | ql_dbg(ql_dbg_init, vha, 0x0036, |
3626 | "MSI-X: Enabled (0x%X, 0x%X).\n", | |
3627 | ha->chip_revision, ha->fw_attributes); | |
963b0fdd | 3628 | goto clear_risc_ints; |
a8488abe | 3629 | } |
7fa3e239 | 3630 | |
a8488abe | 3631 | skip_msix: |
cbedb601 | 3632 | |
7fa3e239 SC |
3633 | ql_log(ql_log_info, vha, 0x0037, |
3634 | "Falling back-to MSI mode -%d.\n", ret); | |
3635 | ||
3a03eb79 | 3636 | if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && |
f73cb695 | 3637 | !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) && |
ecc89f25 | 3638 | !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) |
cbedb601 AV |
3639 | goto skip_msi; |
3640 | ||
4fa18345 | 3641 | ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI); |
cbedb601 | 3642 | if (!ret) { |
7c3df132 SK |
3643 | ql_dbg(ql_dbg_init, vha, 0x0038, |
3644 | "MSI: Enabled.\n"); | |
cbedb601 | 3645 | ha->flags.msi_enabled = 1; |
a9083016 | 3646 | } else |
7c3df132 | 3647 | ql_log(ql_log_warn, vha, 0x0039, |
7fa3e239 SC |
3648 | "Falling back-to INTa mode -- %d.\n", ret); |
3649 | skip_msi: | |
a033b655 GM |
3650 | |
3651 | /* Skip INTx on ISP82xx. */ | |
3652 | if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) | |
3653 | return QLA_FUNCTION_FAILED; | |
3654 | ||
fd34f556 | 3655 | ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, |
7992abfc MH |
3656 | ha->flags.msi_enabled ? 0 : IRQF_SHARED, |
3657 | QLA2XXX_DRIVER_NAME, rsp); | |
963b0fdd | 3658 | if (ret) { |
7c3df132 | 3659 | ql_log(ql_log_warn, vha, 0x003a, |
a8488abe AV |
3660 | "Failed to reserve interrupt %d already in use.\n", |
3661 | ha->pdev->irq); | |
963b0fdd | 3662 | goto fail; |
8ae6d9c7 | 3663 | } else if (!ha->flags.msi_enabled) { |
68d91cbd SK |
3664 | ql_dbg(ql_dbg_init, vha, 0x0125, |
3665 | "INTa mode: Enabled.\n"); | |
8ae6d9c7 GM |
3666 | ha->flags.mr_intr_valid = 1; |
3667 | } | |
7992abfc | 3668 | |
963b0fdd | 3669 | clear_risc_ints: |
4bb2efc4 JC |
3670 | if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) |
3671 | goto fail; | |
963b0fdd | 3672 | |
c6952483 | 3673 | spin_lock_irq(&ha->hardware_lock); |
4bb2efc4 | 3674 | WRT_REG_WORD(®->isp.semaphore, 0); |
c6952483 | 3675 | spin_unlock_irq(&ha->hardware_lock); |
a8488abe | 3676 | |
963b0fdd | 3677 | fail: |
a8488abe AV |
3678 | return ret; |
3679 | } | |
3680 | ||
3681 | void | |
e315cd28 | 3682 | qla2x00_free_irqs(scsi_qla_host_t *vha) |
a8488abe | 3683 | { |
e315cd28 | 3684 | struct qla_hw_data *ha = vha->hw; |
9a347ff4 | 3685 | struct rsp_que *rsp; |
4fa18345 MH |
3686 | struct qla_msix_entry *qentry; |
3687 | int i; | |
9a347ff4 CD |
3688 | |
3689 | /* | |
3690 | * We need to check that ha->rsp_q_map is valid in case we are called | |
3691 | * from a probe failure context. | |
3692 | */ | |
3693 | if (!ha->rsp_q_map || !ha->rsp_q_map[0]) | |
27873de9 | 3694 | goto free_irqs; |
9a347ff4 | 3695 | rsp = ha->rsp_q_map[0]; |
a8488abe | 3696 | |
4fa18345 MH |
3697 | if (ha->flags.msix_enabled) { |
3698 | for (i = 0; i < ha->msix_count; i++) { | |
3699 | qentry = &ha->msix_entries[i]; | |
3700 | if (qentry->have_irq) { | |
3701 | irq_set_affinity_notifier(qentry->vector, NULL); | |
3702 | free_irq(pci_irq_vector(ha->pdev, i), qentry->handle); | |
3703 | } | |
3704 | } | |
3705 | kfree(ha->msix_entries); | |
3706 | ha->msix_entries = NULL; | |
3707 | ha->flags.msix_enabled = 0; | |
3708 | ql_dbg(ql_dbg_init, vha, 0x0042, | |
3709 | "Disabled MSI-X.\n"); | |
3710 | } else { | |
3711 | free_irq(pci_irq_vector(ha->pdev, 0), rsp); | |
3712 | } | |
e315cd28 | 3713 | |
27873de9 | 3714 | free_irqs: |
4fa18345 | 3715 | pci_free_irq_vectors(ha->pdev); |
a8488abe | 3716 | } |
73208dfd | 3717 | |
d7459527 MH |
3718 | int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair, |
3719 | struct qla_msix_entry *msix, int vector_type) | |
73208dfd | 3720 | { |
44a8f954 | 3721 | const struct qla_init_msix_entry *intr = &msix_entries[vector_type]; |
7c3df132 | 3722 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
73208dfd AC |
3723 | int ret; |
3724 | ||
d7459527 MH |
3725 | scnprintf(msix->name, sizeof(msix->name), |
3726 | "qla2xxx%lu_qpair%d", vha->host_no, qpair->id); | |
3727 | ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair); | |
73208dfd | 3728 | if (ret) { |
7c3df132 SK |
3729 | ql_log(ql_log_fatal, vha, 0x00e6, |
3730 | "MSI-X: Unable to register handler -- %x/%d.\n", | |
3731 | msix->vector, ret); | |
73208dfd AC |
3732 | return ret; |
3733 | } | |
3734 | msix->have_irq = 1; | |
d7459527 | 3735 | msix->handle = qpair; |
73208dfd AC |
3736 | return ret; |
3737 | } |