[linux-2.6-block.git] / drivers / regulator / twl-regulator.c

/*
 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
 *
 * Copyright (C) 2008 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>


/*
 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
 * USB OTG transceiver, an RTC, ADC, PWM, and lots more.  Some versions
 * include an audio codec, battery charger, and more voltage regulators.
 * These chips are often used in OMAP-based systems.
 *
 * This driver implements software-based resource control for various
 * voltage regulators.  This is usually augmented with state machine
 * based control.
 */

struct twlreg_info {
	/* start of regulator's PM_RECEIVER control register bank */
	u8			base;

	/* twl resource ID, for resource control state machine */
	u8			id;

	/* voltage in mV = table[VSEL]; table_len must be a power-of-two */
	u8			table_len;
	const u16		*table;

	/* regulator specific turn-on delay */
	u16			delay;

	/* State REMAP default configuration */
	u8			remap;

	/* chip constraints on regulator behavior */
	u16			min_mV;

	/* used by regulator core */
	struct regulator_desc	desc;
};


/* LDO control registers ... offset is from the base of its register bank.
 * The first three registers of all power resource banks help hardware to
 * manage the various resource groups.
 */
/* Common offset in TWL4030/6030 */
#define VREG_GRP		0
/* TWL4030 register offsets */
#define VREG_TYPE		1
#define VREG_REMAP		2
#define VREG_DEDICATED		3	/* LDO control */
/* TWL6030 register offsets */
#define VREG_TRANS		1
#define VREG_STATE		2
#define VREG_VOLTAGE		3
/* TWL6030 Misc register offsets */
#define VREG_BC_ALL		1
#define VREG_BC_REF		2
#define VREG_BC_PROC		3
#define VREG_BC_CLK_RST		4

static inline int
twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
{
	u8 value;
	int status;

	status = twl_i2c_read_u8(slave_subgp,
			&value, info->base + offset);
	return (status < 0) ? status : value;
}

static inline int
twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
						 u8 value)
{
	return twl_i2c_write_u8(slave_subgp,
			value, info->base + offset);
}

/*----------------------------------------------------------------------*/

/* generic power resource operations, which work on all regulators */

static int twlreg_grp(struct regulator_dev *rdev)
{
	return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
								 VREG_GRP);
}

/*
 * Enable/disable regulators by joining/leaving the P1 (processor) group.
 * We assume nobody else is updating the DEV_GRP registers.
 */
/* definition for 4030 family */
#define P3_GRP_4030	BIT(7)		/* "peripherals" */
#define P2_GRP_4030	BIT(6)		/* secondary processor, modem, etc */
#define P1_GRP_4030	BIT(5)		/* CPU/Linux */
/* definition for 6030 family */
#define P3_GRP_6030	BIT(2)		/* secondary processor, modem, etc */
#define P2_GRP_6030	BIT(1)		/* "peripherals" */
#define P1_GRP_6030	BIT(0)		/* CPU/Linux */

static int twlreg_is_enabled(struct regulator_dev *rdev)
{
	int	state = twlreg_grp(rdev);

	if (state < 0)
		return state;

	if (twl_class_is_4030())
		state &= P1_GRP_4030;
	else
		state &= P1_GRP_6030;
	return state;
}

static int twlreg_enable(struct regulator_dev *rdev)
{
	struct twlreg_info	*info = rdev_get_drvdata(rdev);
	int			grp;

	grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
	if (grp < 0)
		return grp;

	if (twl_class_is_4030())
		grp |= P1_GRP_4030;
	else
		grp |= P1_GRP_6030;

	return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
}

static int twlreg_disable(struct regulator_dev *rdev)
{
	struct twlreg_info	*info = rdev_get_drvdata(rdev);
	int			grp;

	grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
	if (grp < 0)
		return grp;

	if (twl_class_is_4030())
		grp &= ~P1_GRP_4030;
	else
		grp &= ~P1_GRP_6030;

	return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
}

static int twlreg_get_status(struct regulator_dev *rdev)
{
	int	state = twlreg_grp(rdev);

	if (twl_class_is_6030())
		return 0; /* FIXME return for 6030 regulator */

	if (state < 0)
		return state;
	state &= 0x0f;

	/* assume state != WARM_RESET; we'd not be running...  */
	if (!state)
		return REGULATOR_STATUS_OFF;
	return (state & BIT(3))
		? REGULATOR_STATUS_NORMAL
		: REGULATOR_STATUS_STANDBY;
}

static int twlreg_set_mode(struct regulator_dev *rdev, unsigned mode)
{
	struct twlreg_info	*info = rdev_get_drvdata(rdev);
	unsigned		message;
	int			status;

	if (twl_class_is_6030())
		return 0; /* FIXME return for 6030 regulator */

	/* We can only set the mode through state machine commands... */
	switch (mode) {
	case REGULATOR_MODE_NORMAL:
		message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
		break;
	case REGULATOR_MODE_STANDBY:
		message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
		break;
	default:
		return -EINVAL;
	}

	/* Ensure the resource is associated with some group */
	status = twlreg_grp(rdev);
	if (status < 0)
		return status;
	if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
		return -EACCES;

	status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
			message >> 8, 0x15 /* PB_WORD_MSB */ );
	if (status >= 0)
		return status;

	return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
			message, 0x16 /* PB_WORD_LSB */ );
}

/*----------------------------------------------------------------------*/

/*
 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
 * select field in its control register.   We use tables indexed by VSEL
 * to record voltages in milliVolts.  (Accuracy is about three percent.)
 *
 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
 * currently handled by listing two slightly different VAUX2 regulators,
 * only one of which will be configured.
 *
 * VSEL values documented as "TI cannot support these values" are flagged
 * in these tables as UNSUP() values; we normally won't assign them.
 *
 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
 */
#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
#define UNSUP_MASK	0x0000
#else
#define UNSUP_MASK	0x8000
#endif

#define UNSUP(x)	(UNSUP_MASK | (x))
#define IS_UNSUP(x)	(UNSUP_MASK & (x))
#define LDO_MV(x)	(~UNSUP_MASK & (x))


static const u16 VAUX1_VSEL_table[] = {
	UNSUP(1500), UNSUP(1800), 2500, 2800,
	3000, 3000, 3000, 3000,
};
static const u16 VAUX2_4030_VSEL_table[] = {
	UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
	1500, 1800, UNSUP(1850), 2500,
	UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
	UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
};
static const u16 VAUX2_VSEL_table[] = {
	1700, 1700, 1900, 1300,
	1500, 1800, 2000, 2500,
	2100, 2800, 2200, 2300,
	2400, 2400, 2400, 2400,
};
static const u16 VAUX3_VSEL_table[] = {
	1500, 1800, 2500, 2800,
	3000, 3000, 3000, 3000,
};
static const u16 VAUX4_VSEL_table[] = {
	700, 1000, 1200, UNSUP(1300),
	1500, 1800, UNSUP(1850), 2500,
	UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
	UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
};
static const u16 VMMC1_VSEL_table[] = {
	1850, 2850, 3000, 3150,
};
static const u16 VMMC2_VSEL_table[] = {
	UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
	UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
	2600, 2800, 2850, 3000,
	3150, 3150, 3150, 3150,
};
static const u16 VPLL1_VSEL_table[] = {
	1000, 1200, 1300, 1800,
	UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
};
static const u16 VPLL2_VSEL_table[] = {
	700, 1000, 1200, 1300,
	UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
	UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
	UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
};
static const u16 VSIM_VSEL_table[] = {
	UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
	2800, 3000, 3000, 3000,
};
static const u16 VDAC_VSEL_table[] = {
	1200, 1300, 1800, 1800,
};
static const u16 VDD1_VSEL_table[] = {
	800, 1450,
};
static const u16 VDD2_VSEL_table[] = {
	800, 1450, 1500,
};
static const u16 VIO_VSEL_table[] = {
	1800, 1850,
};
static const u16 VINTANA2_VSEL_table[] = {
	2500, 2750,
};
static const u16 VAUX1_6030_VSEL_table[] = {
	1000, 1300, 1800, 2500,
	2800, 2900, 3000, 3000,
};
static const u16 VAUX2_6030_VSEL_table[] = {
	1200, 1800, 2500, 2750,
	2800, 2800, 2800, 2800,
};
static const u16 VAUX3_6030_VSEL_table[] = {
	1000, 1200, 1300, 1800,
	2500, 2800, 3000, 3000,
};
static const u16 VMMC_VSEL_table[] = {
	1200, 1800, 2800, 2900,
	3000, 3000, 3000, 3000,
};
static const u16 VPP_VSEL_table[] = {
	1800, 1900, 2000, 2100,
	2200, 2300, 2400, 2500,
};
static const u16 VUSIM_VSEL_table[] = {
	1200, 1800, 2500, 2900,
};

static int twlldo_list_voltage(struct regulator_dev *rdev, unsigned index)
{
	struct twlreg_info	*info = rdev_get_drvdata(rdev);
	int			mV = info->table[index];

	return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
}

static int
twlldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV)
{
	struct twlreg_info	*info = rdev_get_drvdata(rdev);
	int			vsel;

	for (vsel = 0; vsel < info->table_len; vsel++) {
		int mV = info->table[vsel];
		int uV;

		if (IS_UNSUP(mV))
			continue;
		uV = LDO_MV(mV) * 1000;

		/* REVISIT for VAUX2, first match may not be best/lowest */

		/* use the first in-range value */
		if (min_uV <= uV && uV <= max_uV)
			return twlreg_write(info, TWL_MODULE_PM_RECEIVER,
							VREG_VOLTAGE, vsel);
	}

	return -EDOM;
}

static int twlldo_get_voltage(struct regulator_dev *rdev)
{
	struct twlreg_info	*info = rdev_get_drvdata(rdev);
	int		vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
								VREG_VOLTAGE);

	if (vsel < 0)
		return vsel;

	vsel &= info->table_len - 1;
	return LDO_MV(info->table[vsel]) * 1000;
}

static struct regulator_ops twlldo_ops = {
	.list_voltage	= twlldo_list_voltage,

	.set_voltage	= twlldo_set_voltage,
	.get_voltage	= twlldo_get_voltage,

	.enable		= twlreg_enable,
	.disable	= twlreg_disable,
	.is_enabled	= twlreg_is_enabled,

	.set_mode	= twlreg_set_mode,

	.get_status	= twlreg_get_status,
};

/*----------------------------------------------------------------------*/

/*
 * Fixed voltage LDOs don't have a VSEL field to update.
 */
static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
{
	struct twlreg_info	*info = rdev_get_drvdata(rdev);

	return info->min_mV * 1000;
}

static int twlfixed_get_voltage(struct regulator_dev *rdev)
{
	struct twlreg_info	*info = rdev_get_drvdata(rdev);

	return info->min_mV * 1000;
}

static struct regulator_ops twlfixed_ops = {
	.list_voltage	= twlfixed_list_voltage,

	.get_voltage	= twlfixed_get_voltage,

	.enable		= twlreg_enable,
	.disable	= twlreg_disable,
	.is_enabled	= twlreg_is_enabled,

	.set_mode	= twlreg_set_mode,

	.get_status	= twlreg_get_status,
};

/*----------------------------------------------------------------------*/

#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
		TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
			remap_conf, TWL4030)
#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
			remap_conf) \
		TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
			remap_conf, TWL4030)
#define TWL6030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
			remap_conf) \
		TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
			remap_conf, TWL6030)
#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
			remap_conf) \
		TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
			remap_conf, TWL6030)

#define TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf, \
		family) { \
	.base = offset, \
	.id = num, \
	.table_len = ARRAY_SIZE(label##_VSEL_table), \
	.table = label##_VSEL_table, \
	.delay = turnon_delay, \
	.remap = remap_conf, \
	.desc = { \
		.name = #label, \
		.id = family##_REG_##label, \
		.n_voltages = ARRAY_SIZE(label##_VSEL_table), \
		.ops = &twlldo_ops, \
		.type = REGULATOR_VOLTAGE, \
		.owner = THIS_MODULE, \
		}, \
	}

#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
		family) { \
	.base = offset, \
	.id = num, \
	.min_mV = mVolts, \
	.delay = turnon_delay, \
	.remap = remap_conf, \
	.desc = { \
		.name = #label, \
		.id = family##_REG_##label, \
		.n_voltages = 1, \
		.ops = &twlfixed_ops, \
		.type = REGULATOR_VOLTAGE, \
		.owner = THIS_MODULE, \
		}, \
	}

/*
 * We list regulators here if systems need some level of
 * software control over them after boot.
 */
static struct twlreg_info twl_regs[] = {
	TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
	TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
	TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
	TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
	TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
	TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
	TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
	TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
	TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
	TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
	TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
	/* VUSBCP is managed *only* by the USB subchip */

	/* 6030 REG with base as PMC Slave Misc : 0x0030 */
	/* Turnon-delay and remap configuration values for 6030 are not
	   verified since the specification is not public */
	TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1, 0, 0x08),
	TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2, 0, 0x08),
	TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3, 0, 0x08),
	TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4, 0, 0x08),
	TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5, 0, 0x08),
	TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7, 0, 0x08),
	TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0, 0x08),
	TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0, 0x08),
	TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0, 0x08),
	TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0, 0x08)
};

static int twlreg_probe(struct platform_device *pdev)
{
	int				i;
	struct twlreg_info		*info;
	struct regulator_init_data	*initdata;
	struct regulation_constraints	*c;
	struct regulator_dev		*rdev;

	for (i = 0, info = NULL; i < ARRAY_SIZE(twl_regs); i++) {
		if (twl_regs[i].desc.id != pdev->id)
			continue;
		info = twl_regs + i;
		break;
	}
	if (!info)
		return -ENODEV;

	initdata = pdev->dev.platform_data;
	if (!initdata)
		return -EINVAL;

	/* Constrain board-specific capabilities according to what
	 * this driver and the chip itself can actually do.
	 */
	c = &initdata->constraints;
	c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
	c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
				| REGULATOR_CHANGE_MODE
				| REGULATOR_CHANGE_STATUS;
	switch (pdev->id) {
	case TWL4030_REG_VIO:
	case TWL4030_REG_VDD1:
	case TWL4030_REG_VDD2:
	case TWL4030_REG_VPLL1:
	case TWL4030_REG_VINTANA1:
	case TWL4030_REG_VINTANA2:
	case TWL4030_REG_VINTDIG:
		c->always_on = true;
		break;
	default:
		break;
	}

	rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
	if (IS_ERR(rdev)) {
		dev_err(&pdev->dev, "can't register %s, %ld\n",
				info->desc.name, PTR_ERR(rdev));
		return PTR_ERR(rdev);
	}
	platform_set_drvdata(pdev, rdev);

	twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
						info->remap);

	/* NOTE:  many regulators support short-circuit IRQs (presentable
	 * as REGULATOR_OVER_CURRENT notifications?) configured via:
	 *  - SC_CONFIG
	 *  - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
	 *  - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
	 *  - IT_CONFIG
	 */

	return 0;
}

static int __devexit twlreg_remove(struct platform_device *pdev)
{
	regulator_unregister(platform_get_drvdata(pdev));
	return 0;
}

MODULE_ALIAS("platform:twl_reg");

static struct platform_driver twlreg_driver = {
	.probe		= twlreg_probe,
	.remove		= __devexit_p(twlreg_remove),
	/* NOTE: short name, to work around driver model truncation of
	 * "twl_regulator.12" (and friends) to "twl_regulator.1".
	 */
	.driver.name	= "twl_reg",
	.driver.owner	= THIS_MODULE,
};

static int __init twlreg_init(void)
{
	return platform_driver_register(&twlreg_driver);
}
subsys_initcall(twlreg_init);

static void __exit twlreg_exit(void)
{
	platform_driver_unregister(&twlreg_driver);
}
module_exit(twlreg_exit)

MODULE_DESCRIPTION("TWL regulator driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
fa16a5c1	1	/*
c4aa6f31	2	* twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1 DB	3	*
	4	* Copyright (C) 2008 David Brownell
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/init.h>
	14	#include <linux/err.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/regulator/driver.h>
	17	#include <linux/regulator/machine.h>
b07682b6	18	#include <linux/i2c/twl.h>
fa16a5c1 DB	19
	20
	21	/*
c4aa6f31	22	* The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1 DB	23	* USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
	24	* include an audio codec, battery charger, and more voltage regulators.
	25	* These chips are often used in OMAP-based systems.
	26	*
	27	* This driver implements software-based resource control for various
	28	* voltage regulators. This is usually augmented with state machine
	29	* based control.
	30	*/
	31
	32	struct twlreg_info {
	33	/* start of regulator's PM_RECEIVER control register bank */
	34	u8 base;
	35
c4aa6f31	36	/* twl resource ID, for resource control state machine */
fa16a5c1 DB	37	u8 id;
	38
	39	/* voltage in mV = table[VSEL]; table_len must be a power-of-two */
	40	u8 table_len;
	41	const u16 *table;
	42
045f972f JKS	43	/* regulator specific turn-on delay */
	44	u16 delay;
	45
	46	/* State REMAP default configuration */
	47	u8 remap;
	48
fa16a5c1 DB	49	/* chip constraints on regulator behavior */
fa16a5c1 DB	50	u16 min_mV;
fa16a5c1 DB	51
	52	/* used by regulator core */
	53	struct regulator_desc desc;
	54	};
	55
	56
	57	/* LDO control registers ... offset is from the base of its register bank.
	58	* The first three registers of all power resource banks help hardware to
	59	* manage the various resource groups.
	60	*/
441a4505	61	/* Common offset in TWL4030/6030 */
fa16a5c1	62	#define VREG_GRP 0
441a4505	63	/* TWL4030 register offsets */
fa16a5c1 DB	64	#define VREG_TYPE 1
	65	#define VREG_REMAP 2
	66	#define VREG_DEDICATED 3 /* LDO control */
441a4505 RN	67	/* TWL6030 register offsets */
	68	#define VREG_TRANS 1
	69	#define VREG_STATE 2
	70	#define VREG_VOLTAGE 3
	71	/* TWL6030 Misc register offsets */
	72	#define VREG_BC_ALL 1
	73	#define VREG_BC_REF 2
	74	#define VREG_BC_PROC 3
	75	#define VREG_BC_CLK_RST 4
fa16a5c1 DB	76
fa16a5c1 DB	77	static inline int
441a4505	78	twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1 DB	79	{
	80	u8 value;
	81	int status;
	82
441a4505	83	status = twl_i2c_read_u8(slave_subgp,
fa16a5c1 DB	84	&value, info->base + offset);
	85	return (status < 0) ? status : value;
	86	}
	87
	88	static inline int
441a4505 RN	89	twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
441a4505 RN	90	u8 value)
fa16a5c1	91	{
441a4505	92	return twl_i2c_write_u8(slave_subgp,
fa16a5c1 DB	93	value, info->base + offset);
	94	}
	95
	96	/----------------------------------------------------------------------/
	97
	98	/* generic power resource operations, which work on all regulators */
	99
c4aa6f31	100	static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1	101	{
441a4505 RN	102	return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
441a4505 RN	103	VREG_GRP);
fa16a5c1 DB	104	}
	105
	106	/*
	107	* Enable/disable regulators by joining/leaving the P1 (processor) group.
	108	* We assume nobody else is updating the DEV_GRP registers.
	109	*/
441a4505 RN	110	/* definition for 4030 family */
	111	#define P3_GRP_4030 BIT(7) /* "peripherals" */
	112	#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
	113	#define P1_GRP_4030 BIT(5) /* CPU/Linux */
	114	/* definition for 6030 family */
	115	#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
	116	#define P2_GRP_6030 BIT(1) /* "peripherals" */
	117	#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1	118
c4aa6f31	119	static int twlreg_is_enabled(struct regulator_dev *rdev)
fa16a5c1	120	{
c4aa6f31	121	int state = twlreg_grp(rdev);
fa16a5c1 DB	122
	123	if (state < 0)
	124	return state;
	125
441a4505 RN	126	if (twl_class_is_4030())
	127	state &= P1_GRP_4030;
	128	else
	129	state &= P1_GRP_6030;
	130	return state;
fa16a5c1 DB	131	}
fa16a5c1 DB	132
c4aa6f31	133	static int twlreg_enable(struct regulator_dev *rdev)
fa16a5c1 DB	134	{
	135	struct twlreg_info *info = rdev_get_drvdata(rdev);
	136	int grp;
	137
441a4505	138	grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1 DB	139	if (grp < 0)
	140	return grp;
	141
441a4505 RN	142	if (twl_class_is_4030())
	143	grp \|= P1_GRP_4030;
	144	else
	145	grp \|= P1_GRP_6030;
	146
	147	return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
fa16a5c1 DB	148	}
fa16a5c1 DB	149
c4aa6f31	150	static int twlreg_disable(struct regulator_dev *rdev)
fa16a5c1 DB	151	{
	152	struct twlreg_info *info = rdev_get_drvdata(rdev);
	153	int grp;
	154
441a4505	155	grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1 DB	156	if (grp < 0)
	157	return grp;
	158
441a4505 RN	159	if (twl_class_is_4030())
	160	grp &= ~P1_GRP_4030;
	161	else
	162	grp &= ~P1_GRP_6030;
	163
	164	return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
fa16a5c1 DB	165	}
fa16a5c1 DB	166
c4aa6f31	167	static int twlreg_get_status(struct regulator_dev *rdev)
fa16a5c1	168	{
c4aa6f31	169	int state = twlreg_grp(rdev);
fa16a5c1	170
441a4505 RN	171	if (twl_class_is_6030())
	172	return 0; /* FIXME return for 6030 regulator */
	173
fa16a5c1 DB	174	if (state < 0)
	175	return state;
	176	state &= 0x0f;
	177
	178	/* assume state != WARM_RESET; we'd not be running... */
	179	if (!state)
	180	return REGULATOR_STATUS_OFF;
	181	return (state & BIT(3))
	182	? REGULATOR_STATUS_NORMAL
	183	: REGULATOR_STATUS_STANDBY;
	184	}
	185
c4aa6f31	186	static int twlreg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1 DB	187	{
	188	struct twlreg_info *info = rdev_get_drvdata(rdev);
	189	unsigned message;
	190	int status;
	191
441a4505 RN	192	if (twl_class_is_6030())
	193	return 0; /* FIXME return for 6030 regulator */
	194
fa16a5c1 DB	195	/* We can only set the mode through state machine commands... */
	196	switch (mode) {
	197	case REGULATOR_MODE_NORMAL:
	198	message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
	199	break;
	200	case REGULATOR_MODE_STANDBY:
	201	message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
	202	break;
	203	default:
	204	return -EINVAL;
	205	}
	206
	207	/* Ensure the resource is associated with some group */
c4aa6f31	208	status = twlreg_grp(rdev);
fa16a5c1 DB	209	if (status < 0)
fa16a5c1 DB	210	return status;
441a4505	211	if (!(status & (P3_GRP_4030 \| P2_GRP_4030 \| P1_GRP_4030)))
fa16a5c1 DB	212	return -EACCES;
fa16a5c1 DB	213
c4aa6f31	214	status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
fa16a5c1 DB	215	message >> 8, 0x15 /* PB_WORD_MSB */ );
	216	if (status >= 0)
	217	return status;
	218
c4aa6f31	219	return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
fa16a5c1 DB	220	message, 0x16 /* PB_WORD_LSB */ );
	221	}
	222
	223	/----------------------------------------------------------------------/
	224
	225	/*
	226	* Support for adjustable-voltage LDOs uses a four bit (or less) voltage
	227	* select field in its control register. We use tables indexed by VSEL
	228	* to record voltages in milliVolts. (Accuracy is about three percent.)
	229	*
	230	* Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
	231	* currently handled by listing two slightly different VAUX2 regulators,
	232	* only one of which will be configured.
	233	*
	234	* VSEL values documented as "TI cannot support these values" are flagged
	235	* in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf AH	236	*
	237	* VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
	238	* TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1 DB	239	*/
	240	#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
	241	#define UNSUP_MASK 0x0000
	242	#else
	243	#define UNSUP_MASK 0x8000
	244	#endif
	245
	246	#define UNSUP(x) (UNSUP_MASK \| (x))
	247	#define IS_UNSUP(x) (UNSUP_MASK & (x))
	248	#define LDO_MV(x) (~UNSUP_MASK & (x))
	249
	250
	251	static const u16 VAUX1_VSEL_table[] = {
	252	UNSUP(1500), UNSUP(1800), 2500, 2800,
	253	3000, 3000, 3000, 3000,
	254	};
	255	static const u16 VAUX2_4030_VSEL_table[] = {
	256	UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
	257	1500, 1800, UNSUP(1850), 2500,
	258	UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
	259	UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
	260	};
	261	static const u16 VAUX2_VSEL_table[] = {
	262	1700, 1700, 1900, 1300,
	263	1500, 1800, 2000, 2500,
	264	2100, 2800, 2200, 2300,
	265	2400, 2400, 2400, 2400,
	266	};
	267	static const u16 VAUX3_VSEL_table[] = {
	268	1500, 1800, 2500, 2800,
d6bb69cf	269	3000, 3000, 3000, 3000,
fa16a5c1 DB	270	};
	271	static const u16 VAUX4_VSEL_table[] = {
	272	700, 1000, 1200, UNSUP(1300),
	273	1500, 1800, UNSUP(1850), 2500,
1897e742 DB	274	UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
1897e742 DB	275	UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1 DB	276	};
	277	static const u16 VMMC1_VSEL_table[] = {
	278	1850, 2850, 3000, 3150,
	279	};
	280	static const u16 VMMC2_VSEL_table[] = {
	281	UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
	282	UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
	283	2600, 2800, 2850, 3000,
	284	3150, 3150, 3150, 3150,
	285	};
	286	static const u16 VPLL1_VSEL_table[] = {
	287	1000, 1200, 1300, 1800,
	288	UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
	289	};
	290	static const u16 VPLL2_VSEL_table[] = {
	291	700, 1000, 1200, 1300,
	292	UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
	293	UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
	294	UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
	295	};
	296	static const u16 VSIM_VSEL_table[] = {
	297	UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
	298	2800, 3000, 3000, 3000,
	299	};
	300	static const u16 VDAC_VSEL_table[] = {
	301	1200, 1300, 1800, 1800,
	302	};
07fc493f JKS	303	static const u16 VDD1_VSEL_table[] = {
	304	800, 1450,
	305	};
	306	static const u16 VDD2_VSEL_table[] = {
	307	800, 1450, 1500,
	308	};
	309	static const u16 VIO_VSEL_table[] = {
	310	1800, 1850,
	311	};
	312	static const u16 VINTANA2_VSEL_table[] = {
	313	2500, 2750,
	314	};
441a4505 RN	315	static const u16 VAUX1_6030_VSEL_table[] = {
	316	1000, 1300, 1800, 2500,
	317	2800, 2900, 3000, 3000,
	318	};
	319	static const u16 VAUX2_6030_VSEL_table[] = {
	320	1200, 1800, 2500, 2750,
	321	2800, 2800, 2800, 2800,
	322	};
	323	static const u16 VAUX3_6030_VSEL_table[] = {
	324	1000, 1200, 1300, 1800,
	325	2500, 2800, 3000, 3000,
	326	};
	327	static const u16 VMMC_VSEL_table[] = {
	328	1200, 1800, 2800, 2900,
	329	3000, 3000, 3000, 3000,
	330	};
	331	static const u16 VPP_VSEL_table[] = {
	332	1800, 1900, 2000, 2100,
	333	2200, 2300, 2400, 2500,
	334	};
	335	static const u16 VUSIM_VSEL_table[] = {
	336	1200, 1800, 2500, 2900,
	337	};
fa16a5c1	338
c4aa6f31	339	static int twlldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6 DB	340	{
	341	struct twlreg_info *info = rdev_get_drvdata(rdev);
	342	int mV = info->table[index];
	343
	344	return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
	345	}
	346
fa16a5c1	347	static int
c4aa6f31	348	twlldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV)
fa16a5c1 DB	349	{
	350	struct twlreg_info *info = rdev_get_drvdata(rdev);
	351	int vsel;
	352
	353	for (vsel = 0; vsel < info->table_len; vsel++) {
	354	int mV = info->table[vsel];
	355	int uV;
	356
	357	if (IS_UNSUP(mV))
	358	continue;
	359	uV = LDO_MV(mV) * 1000;
	360
66b659e6 DB	361	/* REVISIT for VAUX2, first match may not be best/lowest */
66b659e6 DB	362
fa16a5c1 DB	363	/* use the first in-range value */
fa16a5c1 DB	364	if (min_uV <= uV && uV <= max_uV)
441a4505 RN	365	return twlreg_write(info, TWL_MODULE_PM_RECEIVER,
441a4505 RN	366	VREG_VOLTAGE, vsel);
fa16a5c1 DB	367	}
	368
	369	return -EDOM;
	370	}
	371
c4aa6f31	372	static int twlldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1 DB	373	{
fa16a5c1 DB	374	struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505 RN	375	int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
441a4505 RN	376	VREG_VOLTAGE);
fa16a5c1 DB	377
	378	if (vsel < 0)
	379	return vsel;
	380
	381	vsel &= info->table_len - 1;
	382	return LDO_MV(info->table[vsel]) * 1000;
	383	}
	384
c4aa6f31 RN	385	static struct regulator_ops twlldo_ops = {
c4aa6f31 RN	386	.list_voltage = twlldo_list_voltage,
66b659e6	387
c4aa6f31 RN	388	.set_voltage = twlldo_set_voltage,
c4aa6f31 RN	389	.get_voltage = twlldo_get_voltage,
fa16a5c1	390
c4aa6f31 RN	391	.enable = twlreg_enable,
	392	.disable = twlreg_disable,
	393	.is_enabled = twlreg_is_enabled,
fa16a5c1	394
c4aa6f31	395	.set_mode = twlreg_set_mode,
fa16a5c1	396
c4aa6f31	397	.get_status = twlreg_get_status,
fa16a5c1 DB	398	};
	399
	400	/----------------------------------------------------------------------/
	401
	402	/*
	403	* Fixed voltage LDOs don't have a VSEL field to update.
	404	*/
c4aa6f31	405	static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6 DB	406	{
	407	struct twlreg_info *info = rdev_get_drvdata(rdev);
	408
	409	return info->min_mV * 1000;
	410	}
	411
c4aa6f31	412	static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1 DB	413	{
	414	struct twlreg_info *info = rdev_get_drvdata(rdev);
	415
	416	return info->min_mV * 1000;
	417	}
	418
c4aa6f31 RN	419	static struct regulator_ops twlfixed_ops = {
c4aa6f31 RN	420	.list_voltage = twlfixed_list_voltage,
66b659e6	421
c4aa6f31	422	.get_voltage = twlfixed_get_voltage,
fa16a5c1	423
c4aa6f31 RN	424	.enable = twlreg_enable,
	425	.disable = twlreg_disable,
	426	.is_enabled = twlreg_is_enabled,
fa16a5c1	427
c4aa6f31	428	.set_mode = twlreg_set_mode,
fa16a5c1	429
c4aa6f31	430	.get_status = twlreg_get_status,
fa16a5c1 DB	431	};
	432
	433	/----------------------------------------------------------------------/
	434
045f972f JKS	435	#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
	436	TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
	437	remap_conf, TWL4030)
	438	#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
	439	remap_conf) \
	440	TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
	441	remap_conf, TWL4030)
	442	#define TWL6030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
	443	remap_conf) \
	444	TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
	445	remap_conf, TWL6030)
	446	#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
	447	remap_conf) \
	448	TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
	449	remap_conf, TWL6030)
	450
	451	#define TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf, \
	452	family) { \
fa16a5c1 DB	453	.base = offset, \
	454	.id = num, \
	455	.table_len = ARRAY_SIZE(label##_VSEL_table), \
	456	.table = label##_VSEL_table, \
045f972f JKS	457	.delay = turnon_delay, \
045f972f JKS	458	.remap = remap_conf, \
fa16a5c1 DB	459	.desc = { \
fa16a5c1 DB	460	.name = #label, \
c4aa6f31	461	.id = family##_REG_##label, \
66b659e6	462	.n_voltages = ARRAY_SIZE(label##_VSEL_table), \
c4aa6f31	463	.ops = &twlldo_ops, \
fa16a5c1 DB	464	.type = REGULATOR_VOLTAGE, \
	465	.owner = THIS_MODULE, \
	466	}, \
	467	}
	468
045f972f JKS	469	#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
045f972f JKS	470	family) { \
fa16a5c1 DB	471	.base = offset, \
	472	.id = num, \
	473	.min_mV = mVolts, \
045f972f JKS	474	.delay = turnon_delay, \
045f972f JKS	475	.remap = remap_conf, \
fa16a5c1 DB	476	.desc = { \
fa16a5c1 DB	477	.name = #label, \
c4aa6f31	478	.id = family##_REG_##label, \
66b659e6	479	.n_voltages = 1, \
c4aa6f31	480	.ops = &twlfixed_ops, \
fa16a5c1 DB	481	.type = REGULATOR_VOLTAGE, \
	482	.owner = THIS_MODULE, \
	483	}, \
	484	}
	485
	486	/*
	487	* We list regulators here if systems need some level of
	488	* software control over them after boot.
	489	*/
c4aa6f31	490	static struct twlreg_info twl_regs[] = {
045f972f JKS	491	TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
	492	TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
	493	TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
	494	TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
	495	TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
	496	TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
	497	TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
	498	TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
	499	TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
	500	TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
	501	TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
	502	TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
	503	TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
	504	TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
	505	TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
	506	TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
	507	TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
	508	TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
	509	TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
	510	TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
fa16a5c1	511	/* VUSBCP is managed only by the USB subchip */
441a4505 RN	512
441a4505 RN	513	/* 6030 REG with base as PMC Slave Misc : 0x0030 */
045f972f JKS	514	/* Turnon-delay and remap configuration values for 6030 are not
	515	verified since the specification is not public */
	516	TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1, 0, 0x08),
	517	TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2, 0, 0x08),
	518	TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3, 0, 0x08),
	519	TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4, 0, 0x08),
	520	TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5, 0, 0x08),
	521	TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7, 0, 0x08),
	522	TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0, 0x08),
	523	TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0, 0x08),
	524	TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0, 0x08),
	525	TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0, 0x08)
fa16a5c1 DB	526	};
fa16a5c1 DB	527
c4aa6f31	528	static int twlreg_probe(struct platform_device *pdev)
fa16a5c1 DB	529	{
	530	int i;
	531	struct twlreg_info *info;
	532	struct regulator_init_data *initdata;
	533	struct regulation_constraints *c;
	534	struct regulator_dev *rdev;
fa16a5c1	535
c4aa6f31 RN	536	for (i = 0, info = NULL; i < ARRAY_SIZE(twl_regs); i++) {
c4aa6f31 RN	537	if (twl_regs[i].desc.id != pdev->id)
fa16a5c1	538	continue;
c4aa6f31	539	info = twl_regs + i;
fa16a5c1 DB	540	break;
	541	}
	542	if (!info)
	543	return -ENODEV;
	544
	545	initdata = pdev->dev.platform_data;
	546	if (!initdata)
	547	return -EINVAL;
	548
	549	/* Constrain board-specific capabilities according to what
	550	* this driver and the chip itself can actually do.
	551	*/
	552	c = &initdata->constraints;
fa16a5c1 DB	553	c->valid_modes_mask &= REGULATOR_MODE_NORMAL \| REGULATOR_MODE_STANDBY;
	554	c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
	555	\| REGULATOR_CHANGE_MODE
	556	\| REGULATOR_CHANGE_STATUS;
205e5cd3 JKS	557	switch (pdev->id) {
	558	case TWL4030_REG_VIO:
	559	case TWL4030_REG_VDD1:
	560	case TWL4030_REG_VDD2:
	561	case TWL4030_REG_VPLL1:
	562	case TWL4030_REG_VINTANA1:
	563	case TWL4030_REG_VINTANA2:
	564	case TWL4030_REG_VINTDIG:
	565	c->always_on = true;
	566	break;
	567	default:
	568	break;
	569	}
fa16a5c1 DB	570
	571	rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
	572	if (IS_ERR(rdev)) {
	573	dev_err(&pdev->dev, "can't register %s, %ld\n",
	574	info->desc.name, PTR_ERR(rdev));
	575	return PTR_ERR(rdev);
	576	}
	577	platform_set_drvdata(pdev, rdev);
	578
30010fa5 JKS	579	twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
	580	info->remap);
	581
fa16a5c1 DB	582	/* NOTE: many regulators support short-circuit IRQs (presentable
	583	* as REGULATOR_OVER_CURRENT notifications?) configured via:
	584	* - SC_CONFIG
	585	* - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
	586	* - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
	587	* - IT_CONFIG
	588	*/
	589
	590	return 0;
	591	}
	592
c4aa6f31	593	static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1 DB	594	{
	595	regulator_unregister(platform_get_drvdata(pdev));
	596	return 0;
	597	}
	598
c4aa6f31	599	MODULE_ALIAS("platform:twl_reg");
fa16a5c1	600
c4aa6f31 RN	601	static struct platform_driver twlreg_driver = {
	602	.probe = twlreg_probe,
	603	.remove = __devexit_p(twlreg_remove),
fa16a5c1	604	/* NOTE: short name, to work around driver model truncation of
c4aa6f31	605	* "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1	606	*/
c4aa6f31	607	.driver.name = "twl_reg",
fa16a5c1 DB	608	.driver.owner = THIS_MODULE,
	609	};
	610
c4aa6f31	611	static int __init twlreg_init(void)
fa16a5c1	612	{
c4aa6f31	613	return platform_driver_register(&twlreg_driver);
fa16a5c1	614	}
c4aa6f31	615	subsys_initcall(twlreg_init);
fa16a5c1	616
c4aa6f31	617	static void __exit twlreg_exit(void)
fa16a5c1	618	{
c4aa6f31	619	platform_driver_unregister(&twlreg_driver);
fa16a5c1	620	}
c4aa6f31	621	module_exit(twlreg_exit)
fa16a5c1	622
c4aa6f31	623	MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1	624	MODULE_LICENSE("GPL");